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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
2e34f07f | 6 | * Copyright (C) 1999,2001-2005 Silicon Graphics, Inc. All rights reserved. |
1da177e4 LT |
7 | */ |
8 | ||
9 | #include <linux/config.h> | |
10 | #include <linux/module.h> | |
11 | #include <linux/init.h> | |
12 | #include <linux/delay.h> | |
13 | #include <linux/kernel.h> | |
14 | #include <linux/kdev_t.h> | |
15 | #include <linux/string.h> | |
16 | #include <linux/tty.h> | |
17 | #include <linux/console.h> | |
18 | #include <linux/timex.h> | |
19 | #include <linux/sched.h> | |
20 | #include <linux/ioport.h> | |
21 | #include <linux/mm.h> | |
22 | #include <linux/serial.h> | |
23 | #include <linux/irq.h> | |
24 | #include <linux/bootmem.h> | |
25 | #include <linux/mmzone.h> | |
26 | #include <linux/interrupt.h> | |
27 | #include <linux/acpi.h> | |
28 | #include <linux/compiler.h> | |
29 | #include <linux/sched.h> | |
30 | #include <linux/root_dev.h> | |
31 | #include <linux/nodemask.h> | |
c1298c5c | 32 | #include <linux/pm.h> |
1da177e4 LT |
33 | |
34 | #include <asm/io.h> | |
35 | #include <asm/sal.h> | |
36 | #include <asm/machvec.h> | |
37 | #include <asm/system.h> | |
38 | #include <asm/processor.h> | |
a9f9de73 | 39 | #include <asm/vga.h> |
1da177e4 LT |
40 | #include <asm/sn/arch.h> |
41 | #include <asm/sn/addrs.h> | |
42 | #include <asm/sn/pda.h> | |
43 | #include <asm/sn/nodepda.h> | |
44 | #include <asm/sn/sn_cpuid.h> | |
45 | #include <asm/sn/simulator.h> | |
46 | #include <asm/sn/leds.h> | |
47 | #include <asm/sn/bte.h> | |
48 | #include <asm/sn/shub_mmr.h> | |
49 | #include <asm/sn/clksupport.h> | |
50 | #include <asm/sn/sn_sal.h> | |
51 | #include <asm/sn/geo.h> | |
a1cddb88 | 52 | #include <asm/sn/sn_feature_sets.h> |
1da177e4 LT |
53 | #include "xtalk/xwidgetdev.h" |
54 | #include "xtalk/hubdev.h" | |
55 | #include <asm/sn/klconfig.h> | |
56 | ||
57 | ||
58 | DEFINE_PER_CPU(struct pda_s, pda_percpu); | |
59 | ||
9b17e7e7 | 60 | #define MAX_PHYS_MEMORY (1UL << IA64_MAX_PHYS_BITS) /* Max physical address supported */ |
1da177e4 | 61 | |
1da177e4 LT |
62 | extern void bte_init_node(nodepda_t *, cnodeid_t); |
63 | ||
64 | extern void sn_timer_init(void); | |
65 | extern unsigned long last_time_offset; | |
66 | extern void (*ia64_mark_idle) (int); | |
67 | extern void snidle(int); | |
68 | extern unsigned char acpi_kbd_controller_present; | |
69 | ||
70 | unsigned long sn_rtc_cycles_per_second; | |
71 | EXPORT_SYMBOL(sn_rtc_cycles_per_second); | |
72 | ||
73 | DEFINE_PER_CPU(struct sn_hub_info_s, __sn_hub_info); | |
74 | EXPORT_PER_CPU_SYMBOL(__sn_hub_info); | |
75 | ||
2e34f07f DN |
76 | DEFINE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_NUMNODES]); |
77 | EXPORT_PER_CPU_SYMBOL(__sn_cnodeid_to_nasid); | |
78 | ||
9b48b466 DN |
79 | DEFINE_PER_CPU(struct nodepda_s *, __sn_nodepda); |
80 | EXPORT_PER_CPU_SYMBOL(__sn_nodepda); | |
81 | ||
1da177e4 LT |
82 | char sn_system_serial_number_string[128]; |
83 | EXPORT_SYMBOL(sn_system_serial_number_string); | |
84 | u64 sn_partition_serial_number; | |
85 | EXPORT_SYMBOL(sn_partition_serial_number); | |
86 | u8 sn_partition_id; | |
87 | EXPORT_SYMBOL(sn_partition_id); | |
88 | u8 sn_system_size; | |
89 | EXPORT_SYMBOL(sn_system_size); | |
90 | u8 sn_sharing_domain_size; | |
91 | EXPORT_SYMBOL(sn_sharing_domain_size); | |
92 | u8 sn_coherency_id; | |
93 | EXPORT_SYMBOL(sn_coherency_id); | |
94 | u8 sn_region_size; | |
95 | EXPORT_SYMBOL(sn_region_size); | |
71a5d027 | 96 | int sn_prom_type; /* 0=hardware, 1=medusa/realprom, 2=medusa/fakeprom */ |
1da177e4 | 97 | |
24ee0a6d | 98 | short physical_node_map[MAX_NUMALINK_NODES]; |
a1cddb88 | 99 | static unsigned long sn_prom_features[MAX_PROM_FEATURE_SETS]; |
1da177e4 LT |
100 | |
101 | EXPORT_SYMBOL(physical_node_map); | |
102 | ||
24ee0a6d | 103 | int num_cnodes; |
1da177e4 LT |
104 | |
105 | static void sn_init_pdas(char **); | |
24ee0a6d | 106 | static void build_cnode_tables(void); |
1da177e4 LT |
107 | |
108 | static nodepda_t *nodepdaindr[MAX_COMPACT_NODES]; | |
109 | ||
110 | /* | |
111 | * The format of "screen_info" is strange, and due to early i386-setup | |
112 | * code. This is just enough to make the console code think we're on a | |
113 | * VGA color display. | |
114 | */ | |
115 | struct screen_info sn_screen_info = { | |
116 | .orig_x = 0, | |
117 | .orig_y = 0, | |
118 | .orig_video_mode = 3, | |
119 | .orig_video_cols = 80, | |
120 | .orig_video_ega_bx = 3, | |
121 | .orig_video_lines = 25, | |
122 | .orig_video_isVGA = 1, | |
123 | .orig_video_points = 16 | |
124 | }; | |
125 | ||
126 | /* | |
127 | * This is here so we can use the CMOS detection in ide-probe.c to | |
128 | * determine what drives are present. In theory, we don't need this | |
129 | * as the auto-detection could be done via ide-probe.c:do_probe() but | |
130 | * in practice that would be much slower, which is painful when | |
131 | * running in the simulator. Note that passing zeroes in DRIVE_INFO | |
132 | * is sufficient (the IDE driver will autodetect the drive geometry). | |
133 | */ | |
134 | #ifdef CONFIG_IA64_GENERIC | |
135 | extern char drive_info[4 * 16]; | |
136 | #else | |
137 | char drive_info[4 * 16]; | |
138 | #endif | |
139 | ||
1da177e4 LT |
140 | /* |
141 | * This routine can only be used during init, since | |
142 | * smp_boot_data is an init data structure. | |
143 | * We have to use smp_boot_data.cpu_phys_id to find | |
144 | * the physical id of the processor because the normal | |
145 | * cpu_physical_id() relies on data structures that | |
146 | * may not be initialized yet. | |
147 | */ | |
148 | ||
149 | static int __init pxm_to_nasid(int pxm) | |
150 | { | |
151 | int i; | |
152 | int nid; | |
153 | ||
154 | nid = pxm_to_nid_map[pxm]; | |
155 | for (i = 0; i < num_node_memblks; i++) { | |
156 | if (node_memblk[i].nid == nid) { | |
157 | return NASID_GET(node_memblk[i].start_paddr); | |
158 | } | |
159 | } | |
160 | return -1; | |
161 | } | |
162 | ||
163 | /** | |
164 | * early_sn_setup - early setup routine for SN platforms | |
165 | * | |
166 | * Sets up an initial console to aid debugging. Intended primarily | |
167 | * for bringup. See start_kernel() in init/main.c. | |
168 | */ | |
169 | ||
170 | void __init early_sn_setup(void) | |
171 | { | |
172 | efi_system_table_t *efi_systab; | |
173 | efi_config_table_t *config_tables; | |
174 | struct ia64_sal_systab *sal_systab; | |
175 | struct ia64_sal_desc_entry_point *ep; | |
176 | char *p; | |
177 | int i, j; | |
178 | ||
179 | /* | |
180 | * Parse enough of the SAL tables to locate the SAL entry point. Since, console | |
181 | * IO on SN2 is done via SAL calls, early_printk won't work without this. | |
182 | * | |
183 | * This code duplicates some of the ACPI table parsing that is in efi.c & sal.c. | |
184 | * Any changes to those file may have to be made hereas well. | |
185 | */ | |
186 | efi_systab = (efi_system_table_t *) __va(ia64_boot_param->efi_systab); | |
187 | config_tables = __va(efi_systab->tables); | |
188 | for (i = 0; i < efi_systab->nr_tables; i++) { | |
189 | if (efi_guidcmp(config_tables[i].guid, SAL_SYSTEM_TABLE_GUID) == | |
190 | 0) { | |
191 | sal_systab = __va(config_tables[i].table); | |
192 | p = (char *)(sal_systab + 1); | |
193 | for (j = 0; j < sal_systab->entry_count; j++) { | |
194 | if (*p == SAL_DESC_ENTRY_POINT) { | |
195 | ep = (struct ia64_sal_desc_entry_point | |
196 | *)p; | |
197 | ia64_sal_handler_init(__va | |
198 | (ep->sal_proc), | |
199 | __va(ep->gp)); | |
200 | return; | |
201 | } | |
202 | p += SAL_DESC_SIZE(*p); | |
203 | } | |
204 | } | |
205 | } | |
206 | /* Uh-oh, SAL not available?? */ | |
207 | printk(KERN_ERR "failed to find SAL entry point\n"); | |
208 | } | |
209 | ||
210 | extern int platform_intr_list[]; | |
ff89bf3b | 211 | static int __initdata shub_1_1_found = 0; |
1da177e4 LT |
212 | |
213 | /* | |
214 | * sn_check_for_wars | |
215 | * | |
216 | * Set flag for enabling shub specific wars | |
217 | */ | |
218 | ||
219 | static inline int __init is_shub_1_1(int nasid) | |
220 | { | |
221 | unsigned long id; | |
222 | int rev; | |
223 | ||
224 | if (is_shub2()) | |
225 | return 0; | |
226 | id = REMOTE_HUB_L(nasid, SH1_SHUB_ID); | |
227 | rev = (id & SH1_SHUB_ID_REVISION_MASK) >> SH1_SHUB_ID_REVISION_SHFT; | |
228 | return rev <= 2; | |
229 | } | |
230 | ||
231 | static void __init sn_check_for_wars(void) | |
232 | { | |
233 | int cnode; | |
234 | ||
235 | if (is_shub2()) { | |
236 | /* none yet */ | |
237 | } else { | |
238 | for_each_online_node(cnode) { | |
239 | if (is_shub_1_1(cnodeid_to_nasid(cnode))) | |
ff89bf3b | 240 | shub_1_1_found = 1; |
1da177e4 LT |
241 | } |
242 | } | |
243 | } | |
244 | ||
245 | /** | |
246 | * sn_setup - SN platform setup routine | |
247 | * @cmdline_p: kernel command line | |
248 | * | |
249 | * Handles platform setup for SN machines. This includes determining | |
250 | * the RTC frequency (via a SAL call), initializing secondary CPUs, and | |
251 | * setting up per-node data areas. The console is also initialized here. | |
252 | */ | |
253 | void __init sn_setup(char **cmdline_p) | |
254 | { | |
255 | long status, ticks_per_sec, drift; | |
283c7f6a | 256 | u32 version = sn_sal_rev(); |
1da177e4 LT |
257 | extern void sn_cpu_init(void); |
258 | ||
a1cddb88 JS |
259 | ia64_sn_plat_set_error_handling_features(); // obsolete |
260 | ia64_sn_set_os_feature(OSF_MCA_SLV_TO_OS_INIT_SLV); | |
261 | ia64_sn_set_os_feature(OSF_FEAT_LOG_SBES); | |
262 | ||
6872ec54 | 263 | |
a9f9de73 | 264 | #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE) |
1da177e4 | 265 | /* |
a9f9de73 MM |
266 | * If there was a primary vga adapter identified through the |
267 | * EFI PCDP table, make it the preferred console. Otherwise | |
268 | * zero out conswitchp. | |
1da177e4 | 269 | */ |
a9f9de73 MM |
270 | |
271 | if (vga_console_membase) { | |
272 | /* usable vga ... make tty0 the preferred default console */ | |
273 | add_preferred_console("tty", 0, NULL); | |
274 | } else { | |
1da177e4 LT |
275 | printk(KERN_DEBUG "SGI: Disabling VGA console\n"); |
276 | #ifdef CONFIG_DUMMY_CONSOLE | |
277 | conswitchp = &dummy_con; | |
278 | #else | |
279 | conswitchp = NULL; | |
280 | #endif /* CONFIG_DUMMY_CONSOLE */ | |
281 | } | |
282 | #endif /* def(CONFIG_VT) && def(CONFIG_VGA_CONSOLE) */ | |
283 | ||
284 | MAX_DMA_ADDRESS = PAGE_OFFSET + MAX_PHYS_MEMORY; | |
285 | ||
24ee0a6d JS |
286 | /* |
287 | * Build the tables for managing cnodes. | |
288 | */ | |
289 | build_cnode_tables(); | |
1da177e4 LT |
290 | |
291 | /* | |
292 | * Old PROMs do not provide an ACPI FADT. Disable legacy keyboard | |
293 | * support here so we don't have to listen to failed keyboard probe | |
294 | * messages. | |
295 | */ | |
283c7f6a | 296 | if (version <= 0x0209 && acpi_kbd_controller_present) { |
1da177e4 LT |
297 | printk(KERN_INFO "Disabling legacy keyboard support as prom " |
298 | "is too old and doesn't provide FADT\n"); | |
299 | acpi_kbd_controller_present = 0; | |
300 | } | |
301 | ||
283c7f6a | 302 | printk("SGI SAL version %x.%02x\n", version >> 8, version & 0x00FF); |
1da177e4 | 303 | |
1da177e4 LT |
304 | status = |
305 | ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec, | |
306 | &drift); | |
307 | if (status != 0 || ticks_per_sec < 100000) { | |
308 | printk(KERN_WARNING | |
309 | "unable to determine platform RTC clock frequency, guessing.\n"); | |
310 | /* PROM gives wrong value for clock freq. so guess */ | |
311 | sn_rtc_cycles_per_second = 1000000000000UL / 30000UL; | |
312 | } else | |
313 | sn_rtc_cycles_per_second = ticks_per_sec; | |
314 | ||
315 | platform_intr_list[ACPI_INTERRUPT_CPEI] = IA64_CPE_VECTOR; | |
316 | ||
317 | /* | |
318 | * we set the default root device to /dev/hda | |
319 | * to make simulation easy | |
320 | */ | |
321 | ROOT_DEV = Root_HDA1; | |
322 | ||
323 | /* | |
324 | * Create the PDAs and NODEPDAs for all the cpus. | |
325 | */ | |
326 | sn_init_pdas(cmdline_p); | |
327 | ||
328 | ia64_mark_idle = &snidle; | |
329 | ||
71a5d027 | 330 | /* |
1da177e4 LT |
331 | * For the bootcpu, we do this here. All other cpus will make the |
332 | * call as part of cpu_init in slave cpu initialization. | |
333 | */ | |
334 | sn_cpu_init(); | |
335 | ||
336 | #ifdef CONFIG_SMP | |
337 | init_smp_config(); | |
338 | #endif | |
339 | screen_info = sn_screen_info; | |
340 | ||
341 | sn_timer_init(); | |
c1298c5c AY |
342 | |
343 | /* | |
344 | * set pm_power_off to a SAL call to allow | |
345 | * sn machines to power off. The SAL call can be replaced | |
346 | * by an ACPI interface call when ACPI is fully implemented | |
347 | * for sn. | |
348 | */ | |
349 | pm_power_off = ia64_sn_power_down; | |
1da177e4 LT |
350 | } |
351 | ||
352 | /** | |
353 | * sn_init_pdas - setup node data areas | |
354 | * | |
355 | * One time setup for Node Data Area. Called by sn_setup(). | |
356 | */ | |
357 | static void __init sn_init_pdas(char **cmdline_p) | |
358 | { | |
359 | cnodeid_t cnode; | |
360 | ||
1da177e4 LT |
361 | /* |
362 | * Allocate & initalize the nodepda for each node. | |
363 | */ | |
364 | for_each_online_node(cnode) { | |
365 | nodepdaindr[cnode] = | |
366 | alloc_bootmem_node(NODE_DATA(cnode), sizeof(nodepda_t)); | |
367 | memset(nodepdaindr[cnode], 0, sizeof(nodepda_t)); | |
71a5d027 | 368 | memset(nodepdaindr[cnode]->phys_cpuid, -1, |
1da177e4 | 369 | sizeof(nodepdaindr[cnode]->phys_cpuid)); |
470ceb05 | 370 | spin_lock_init(&nodepdaindr[cnode]->ptc_lock); |
1da177e4 LT |
371 | } |
372 | ||
373 | /* | |
374 | * Allocate & initialize nodepda for TIOs. For now, put them on node 0. | |
375 | */ | |
24ee0a6d | 376 | for (cnode = num_online_nodes(); cnode < num_cnodes; cnode++) { |
1da177e4 LT |
377 | nodepdaindr[cnode] = |
378 | alloc_bootmem_node(NODE_DATA(0), sizeof(nodepda_t)); | |
379 | memset(nodepdaindr[cnode], 0, sizeof(nodepda_t)); | |
380 | } | |
381 | ||
382 | /* | |
383 | * Now copy the array of nodepda pointers to each nodepda. | |
384 | */ | |
24ee0a6d | 385 | for (cnode = 0; cnode < num_cnodes; cnode++) |
1da177e4 LT |
386 | memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr, |
387 | sizeof(nodepdaindr)); | |
388 | ||
389 | /* | |
390 | * Set up IO related platform-dependent nodepda fields. | |
391 | * The following routine actually sets up the hubinfo struct | |
392 | * in nodepda. | |
393 | */ | |
394 | for_each_online_node(cnode) { | |
395 | bte_init_node(nodepdaindr[cnode], cnode); | |
396 | } | |
397 | ||
398 | /* | |
71a5d027 | 399 | * Initialize the per node hubdev. This includes IO Nodes and |
1da177e4 LT |
400 | * headless/memless nodes. |
401 | */ | |
24ee0a6d | 402 | for (cnode = 0; cnode < num_cnodes; cnode++) { |
1da177e4 LT |
403 | hubdev_init_node(nodepdaindr[cnode], cnode); |
404 | } | |
405 | } | |
406 | ||
407 | /** | |
408 | * sn_cpu_init - initialize per-cpu data areas | |
409 | * @cpuid: cpuid of the caller | |
410 | * | |
411 | * Called during cpu initialization on each cpu as it starts. | |
412 | * Currently, initializes the per-cpu data area for SNIA. | |
413 | * Also sets up a few fields in the nodepda. Also known as | |
414 | * platform_cpu_init() by the ia64 machvec code. | |
415 | */ | |
416 | void __init sn_cpu_init(void) | |
417 | { | |
418 | int cpuid; | |
419 | int cpuphyid; | |
420 | int nasid; | |
421 | int subnode; | |
422 | int slice; | |
423 | int cnode; | |
424 | int i; | |
425 | static int wars_have_been_checked; | |
426 | ||
71a5d027 JS |
427 | if (smp_processor_id() == 0 && IS_MEDUSA()) { |
428 | if (ia64_sn_is_fake_prom()) | |
429 | sn_prom_type = 2; | |
430 | else | |
431 | sn_prom_type = 1; | |
432 | printk("Running on medusa with %s PROM\n", (sn_prom_type == 1) ? "real" : "fake"); | |
433 | } | |
434 | ||
1da177e4 LT |
435 | memset(pda, 0, sizeof(pda)); |
436 | if (ia64_sn_get_sn_info(0, &sn_hub_info->shub2, &sn_hub_info->nasid_bitmask, &sn_hub_info->nasid_shift, | |
437 | &sn_system_size, &sn_sharing_domain_size, &sn_partition_id, | |
438 | &sn_coherency_id, &sn_region_size)) | |
439 | BUG(); | |
440 | sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2; | |
441 | ||
442 | /* | |
443 | * The boot cpu makes this call again after platform initialization is | |
444 | * complete. | |
445 | */ | |
446 | if (nodepdaindr[0] == NULL) | |
447 | return; | |
448 | ||
a1cddb88 JS |
449 | for (i = 0; i < MAX_PROM_FEATURE_SETS; i++) |
450 | if (ia64_sn_get_prom_feature_set(i, &sn_prom_features[i]) != 0) | |
451 | break; | |
452 | ||
1da177e4 LT |
453 | cpuid = smp_processor_id(); |
454 | cpuphyid = get_sapicid(); | |
455 | ||
456 | if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice)) | |
457 | BUG(); | |
458 | ||
459 | for (i=0; i < MAX_NUMNODES; i++) { | |
460 | if (nodepdaindr[i]) { | |
461 | nodepdaindr[i]->phys_cpuid[cpuid].nasid = nasid; | |
462 | nodepdaindr[i]->phys_cpuid[cpuid].slice = slice; | |
463 | nodepdaindr[i]->phys_cpuid[cpuid].subnode = subnode; | |
464 | } | |
465 | } | |
466 | ||
467 | cnode = nasid_to_cnodeid(nasid); | |
468 | ||
9b48b466 DN |
469 | sn_nodepda = nodepdaindr[cnode]; |
470 | ||
1da177e4 LT |
471 | pda->led_address = |
472 | (typeof(pda->led_address)) (LED0 + (slice << LED_CPU_SHIFT)); | |
473 | pda->led_state = LED_ALWAYS_SET; | |
474 | pda->hb_count = HZ / 2; | |
475 | pda->hb_state = 0; | |
476 | pda->idle_flag = 0; | |
477 | ||
478 | if (cpuid != 0) { | |
2e34f07f DN |
479 | /* copy cpu 0's sn_cnodeid_to_nasid table to this cpu's */ |
480 | memcpy(sn_cnodeid_to_nasid, | |
481 | (&per_cpu(__sn_cnodeid_to_nasid, 0)), | |
482 | sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid))); | |
1da177e4 LT |
483 | } |
484 | ||
485 | /* | |
486 | * Check for WARs. | |
487 | * Only needs to be done once, on BSP. | |
2e34f07f DN |
488 | * Has to be done after loop above, because it uses this cpu's |
489 | * sn_cnodeid_to_nasid table which was just initialized if this | |
490 | * isn't cpu 0. | |
1da177e4 LT |
491 | * Has to be done before assignment below. |
492 | */ | |
493 | if (!wars_have_been_checked) { | |
494 | sn_check_for_wars(); | |
495 | wars_have_been_checked = 1; | |
496 | } | |
497 | sn_hub_info->shub_1_1_found = shub_1_1_found; | |
498 | ||
499 | /* | |
500 | * Set up addresses of PIO/MEM write status registers. | |
501 | */ | |
502 | { | |
503 | u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0}; | |
2fdbb590 JS |
504 | u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_2, |
505 | SH2_PIO_WRITE_STATUS_1, SH2_PIO_WRITE_STATUS_3}; | |
1da177e4 LT |
506 | u64 *pio; |
507 | pio = is_shub1() ? pio1 : pio2; | |
508 | pda->pio_write_status_addr = (volatile unsigned long *) LOCAL_MMR_ADDR(pio[slice]); | |
509 | pda->pio_write_status_val = is_shub1() ? SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK : 0; | |
510 | } | |
511 | ||
512 | /* | |
513 | * WAR addresses for SHUB 1.x. | |
514 | */ | |
515 | if (local_node_data->active_cpu_count++ == 0 && is_shub1()) { | |
516 | int buddy_nasid; | |
517 | buddy_nasid = | |
518 | cnodeid_to_nasid(numa_node_id() == | |
519 | num_online_nodes() - 1 ? 0 : numa_node_id() + 1); | |
520 | pda->pio_shub_war_cam_addr = | |
521 | (volatile unsigned long *)GLOBAL_MMR_ADDR(nasid, | |
522 | SH1_PI_CAM_CONTROL); | |
523 | } | |
524 | } | |
525 | ||
526 | /* | |
24ee0a6d | 527 | * Build tables for converting between NASIDs and cnodes. |
1da177e4 | 528 | */ |
24ee0a6d JS |
529 | static inline int __init board_needs_cnode(int type) |
530 | { | |
531 | return (type == KLTYPE_SNIA || type == KLTYPE_TIO); | |
532 | } | |
1da177e4 | 533 | |
24ee0a6d | 534 | void __init build_cnode_tables(void) |
1da177e4 | 535 | { |
24ee0a6d JS |
536 | int nasid; |
537 | int node; | |
1da177e4 LT |
538 | lboard_t *brd; |
539 | ||
24ee0a6d JS |
540 | memset(physical_node_map, -1, sizeof(physical_node_map)); |
541 | memset(sn_cnodeid_to_nasid, -1, | |
542 | sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid))); | |
1da177e4 | 543 | |
24ee0a6d JS |
544 | /* |
545 | * First populate the tables with C/M bricks. This ensures that | |
546 | * cnode == node for all C & M bricks. | |
547 | */ | |
548 | for_each_online_node(node) { | |
549 | nasid = pxm_to_nasid(nid_to_pxm_map[node]); | |
550 | sn_cnodeid_to_nasid[node] = nasid; | |
551 | physical_node_map[nasid] = node; | |
1da177e4 LT |
552 | } |
553 | ||
24ee0a6d JS |
554 | /* |
555 | * num_cnodes is total number of C/M/TIO bricks. Because of the 256 node | |
556 | * limit on the number of nodes, we can't use the generic node numbers | |
557 | * for this. Note that num_cnodes is incremented below as TIOs or | |
558 | * headless/memoryless nodes are discovered. | |
559 | */ | |
560 | num_cnodes = num_online_nodes(); | |
1da177e4 | 561 | |
24ee0a6d JS |
562 | /* fakeprom does not support klgraph */ |
563 | if (IS_RUNNING_ON_FAKE_PROM()) | |
564 | return; | |
1da177e4 | 565 | |
24ee0a6d JS |
566 | /* Find TIOs & headless/memoryless nodes and add them to the tables */ |
567 | for_each_online_node(node) { | |
568 | kl_config_hdr_t *klgraph_header; | |
569 | nasid = cnodeid_to_nasid(node); | |
570 | if ((klgraph_header = ia64_sn_get_klconfig_addr(nasid)) == NULL) | |
571 | BUG(); | |
572 | brd = NODE_OFFSET_TO_LBOARD(nasid, klgraph_header->ch_board_info); | |
1da177e4 | 573 | while (brd) { |
24ee0a6d JS |
574 | if (board_needs_cnode(brd->brd_type) && physical_node_map[brd->brd_nasid] < 0) { |
575 | sn_cnodeid_to_nasid[num_cnodes] = brd->brd_nasid; | |
576 | physical_node_map[brd->brd_nasid] = num_cnodes++; | |
577 | } | |
578 | brd = find_lboard_next(brd); | |
1da177e4 LT |
579 | } |
580 | } | |
1da177e4 LT |
581 | } |
582 | ||
583 | int | |
584 | nasid_slice_to_cpuid(int nasid, int slice) | |
585 | { | |
586 | long cpu; | |
71a5d027 JS |
587 | |
588 | for (cpu=0; cpu < NR_CPUS; cpu++) | |
9b48b466 DN |
589 | if (cpuid_to_nasid(cpu) == nasid && |
590 | cpuid_to_slice(cpu) == slice) | |
1da177e4 LT |
591 | return cpu; |
592 | ||
593 | return -1; | |
594 | } | |
a1cddb88 JS |
595 | |
596 | int sn_prom_feature_available(int id) | |
597 | { | |
598 | if (id >= BITS_PER_LONG * MAX_PROM_FEATURE_SETS) | |
599 | return 0; | |
600 | return test_bit(id, sn_prom_features); | |
601 | } | |
602 | EXPORT_SYMBOL(sn_prom_feature_available); | |
603 |