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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/m32r/kernel/setup.c | |
3 | * | |
4 | * Setup routines for Renesas M32R | |
5 | * | |
6 | * Copyright (c) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata, | |
7 | * Hitoshi Yamamoto | |
8 | */ | |
9 | ||
1da177e4 | 10 | #include <linux/init.h> |
7c1c4e54 | 11 | #include <linux/kernel.h> |
1da177e4 LT |
12 | #include <linux/stddef.h> |
13 | #include <linux/fs.h> | |
68e21be2 | 14 | #include <linux/sched/mm.h> |
1da177e4 LT |
15 | #include <linux/ioport.h> |
16 | #include <linux/mm.h> | |
17 | #include <linux/bootmem.h> | |
18 | #include <linux/console.h> | |
19 | #include <linux/initrd.h> | |
20 | #include <linux/major.h> | |
21 | #include <linux/root_dev.h> | |
22 | #include <linux/seq_file.h> | |
23 | #include <linux/timex.h> | |
894673ee | 24 | #include <linux/screen_info.h> |
1da177e4 LT |
25 | #include <linux/cpu.h> |
26 | #include <linux/nodemask.h> | |
22a9835c | 27 | #include <linux/pfn.h> |
1da177e4 LT |
28 | |
29 | #include <asm/processor.h> | |
30 | #include <asm/pgtable.h> | |
31 | #include <asm/io.h> | |
32 | #include <asm/mmu_context.h> | |
33 | #include <asm/m32r.h> | |
34 | #include <asm/setup.h> | |
35 | #include <asm/sections.h> | |
36 | ||
37 | #ifdef CONFIG_MMU | |
38 | extern void init_mmu(void); | |
39 | #endif | |
40 | ||
1da177e4 LT |
41 | extern char _end[]; |
42 | ||
43 | /* | |
44 | * Machine setup.. | |
45 | */ | |
46 | struct cpuinfo_m32r boot_cpu_data; | |
47 | ||
48 | #ifdef CONFIG_BLK_DEV_RAM | |
49 | extern int rd_doload; /* 1 = load ramdisk, 0 = don't load */ | |
50 | extern int rd_prompt; /* 1 = prompt for ramdisk, 0 = don't prompt */ | |
51 | extern int rd_image_start; /* starting block # of image */ | |
52 | #endif | |
53 | ||
54 | #if defined(CONFIG_VGA_CONSOLE) | |
55 | struct screen_info screen_info = { | |
56 | .orig_video_lines = 25, | |
57 | .orig_video_cols = 80, | |
58 | .orig_video_mode = 0, | |
59 | .orig_video_ega_bx = 0, | |
60 | .orig_video_isVGA = 1, | |
61 | .orig_video_points = 8 | |
62 | }; | |
63 | #endif | |
64 | ||
65 | extern int root_mountflags; | |
66 | ||
3561794d | 67 | static char __initdata command_line[COMMAND_LINE_SIZE]; |
1da177e4 LT |
68 | |
69 | static struct resource data_resource = { | |
70 | .name = "Kernel data", | |
71 | .start = 0, | |
72 | .end = 0, | |
35d98e93 | 73 | .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM |
1da177e4 LT |
74 | }; |
75 | ||
76 | static struct resource code_resource = { | |
77 | .name = "Kernel code", | |
78 | .start = 0, | |
79 | .end = 0, | |
35d98e93 | 80 | .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM |
1da177e4 LT |
81 | }; |
82 | ||
83 | unsigned long memory_start; | |
601f1db6 SM |
84 | EXPORT_SYMBOL(memory_start); |
85 | ||
1da177e4 | 86 | unsigned long memory_end; |
601f1db6 | 87 | EXPORT_SYMBOL(memory_end); |
1da177e4 LT |
88 | |
89 | void __init setup_arch(char **); | |
90 | int get_cpuinfo(char *); | |
91 | ||
92 | static __inline__ void parse_mem_cmdline(char ** cmdline_p) | |
93 | { | |
94 | char c = ' '; | |
95 | char *to = command_line; | |
96 | char *from = COMMAND_LINE; | |
97 | int len = 0; | |
98 | int usermem = 0; | |
99 | ||
100 | /* Save unparsed command line copy for /proc/cmdline */ | |
3561794d ABL |
101 | memcpy(boot_command_line, COMMAND_LINE, COMMAND_LINE_SIZE); |
102 | boot_command_line[COMMAND_LINE_SIZE-1] = '\0'; | |
1da177e4 LT |
103 | |
104 | memory_start = (unsigned long)CONFIG_MEMORY_START+PAGE_OFFSET; | |
105 | memory_end = memory_start+(unsigned long)CONFIG_MEMORY_SIZE; | |
106 | ||
107 | for ( ; ; ) { | |
108 | if (c == ' ' && !memcmp(from, "mem=", 4)) { | |
109 | if (to != command_line) | |
110 | to--; | |
111 | ||
112 | { | |
113 | unsigned long mem_size; | |
114 | ||
115 | usermem = 1; | |
116 | mem_size = memparse(from+4, &from); | |
117 | memory_end = memory_start + mem_size; | |
118 | } | |
119 | } | |
120 | c = *(from++); | |
121 | if (!c) | |
122 | break; | |
123 | ||
124 | if (COMMAND_LINE_SIZE <= ++len) | |
125 | break; | |
126 | ||
127 | *(to++) = c; | |
128 | } | |
129 | *to = '\0'; | |
130 | *cmdline_p = command_line; | |
131 | if (usermem) | |
132 | printk(KERN_INFO "user-defined physical RAM map:\n"); | |
133 | } | |
134 | ||
135 | #ifndef CONFIG_DISCONTIGMEM | |
136 | static unsigned long __init setup_memory(void) | |
137 | { | |
138 | unsigned long start_pfn, max_low_pfn, bootmap_size; | |
139 | ||
140 | start_pfn = PFN_UP( __pa(_end) ); | |
141 | max_low_pfn = PFN_DOWN( __pa(memory_end) ); | |
142 | ||
143 | /* | |
144 | * Initialize the boot-time allocator (with low memory only): | |
145 | */ | |
146 | bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn, | |
147 | CONFIG_MEMORY_START>>PAGE_SHIFT, max_low_pfn); | |
148 | ||
149 | /* | |
150 | * Register fully available low RAM pages with the bootmem allocator. | |
151 | */ | |
152 | { | |
153 | unsigned long curr_pfn; | |
154 | unsigned long last_pfn; | |
155 | unsigned long pages; | |
156 | ||
157 | /* | |
158 | * We are rounding up the start address of usable memory: | |
159 | */ | |
160 | curr_pfn = PFN_UP(__pa(memory_start)); | |
161 | ||
162 | /* | |
163 | * ... and at the end of the usable range downwards: | |
164 | */ | |
165 | last_pfn = PFN_DOWN(__pa(memory_end)); | |
166 | ||
167 | if (last_pfn > max_low_pfn) | |
168 | last_pfn = max_low_pfn; | |
169 | ||
170 | pages = last_pfn - curr_pfn; | |
171 | free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(pages)); | |
172 | } | |
173 | ||
174 | /* | |
175 | * Reserve the kernel text and | |
176 | * Reserve the bootmem bitmap. We do this in two steps (first step | |
177 | * was init_bootmem()), because this catches the (definitely buggy) | |
178 | * case of us accidentally initializing the bootmem allocator with | |
179 | * an invalid RAM area. | |
180 | */ | |
181 | reserve_bootmem(CONFIG_MEMORY_START + PAGE_SIZE, | |
182 | (PFN_PHYS(start_pfn) + bootmap_size + PAGE_SIZE - 1) | |
72a7fe39 BW |
183 | - CONFIG_MEMORY_START, |
184 | BOOTMEM_DEFAULT); | |
1da177e4 LT |
185 | |
186 | /* | |
187 | * reserve physical page 0 - it's a special BIOS page on many boxes, | |
188 | * enabling clean reboots, SMP operation, laptop functions. | |
189 | */ | |
72a7fe39 | 190 | reserve_bootmem(CONFIG_MEMORY_START, PAGE_SIZE, BOOTMEM_DEFAULT); |
1da177e4 LT |
191 | |
192 | /* | |
193 | * reserve memory hole | |
194 | */ | |
195 | #ifdef CONFIG_MEMHOLE | |
72a7fe39 BW |
196 | reserve_bootmem(CONFIG_MEMHOLE_START, CONFIG_MEMHOLE_SIZE, |
197 | BOOTMEM_DEFAULT); | |
1da177e4 LT |
198 | #endif |
199 | ||
200 | #ifdef CONFIG_BLK_DEV_INITRD | |
201 | if (LOADER_TYPE && INITRD_START) { | |
202 | if (INITRD_START + INITRD_SIZE <= (max_low_pfn << PAGE_SHIFT)) { | |
72a7fe39 BW |
203 | reserve_bootmem(INITRD_START, INITRD_SIZE, |
204 | BOOTMEM_DEFAULT); | |
19e5d9c0 | 205 | initrd_start = INITRD_START + PAGE_OFFSET; |
1da177e4 LT |
206 | initrd_end = initrd_start + INITRD_SIZE; |
207 | printk("initrd:start[%08lx],size[%08lx]\n", | |
208 | initrd_start, INITRD_SIZE); | |
209 | } else { | |
210 | printk("initrd extends beyond end of memory " | |
211 | "(0x%08lx > 0x%08lx)\ndisabling initrd\n", | |
212 | INITRD_START + INITRD_SIZE, | |
213 | max_low_pfn << PAGE_SHIFT); | |
214 | ||
215 | initrd_start = 0; | |
216 | } | |
217 | } | |
218 | #endif | |
219 | ||
220 | return max_low_pfn; | |
221 | } | |
222 | #else /* CONFIG_DISCONTIGMEM */ | |
223 | extern unsigned long setup_memory(void); | |
224 | #endif /* CONFIG_DISCONTIGMEM */ | |
225 | ||
1da177e4 LT |
226 | void __init setup_arch(char **cmdline_p) |
227 | { | |
228 | ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV); | |
229 | ||
230 | boot_cpu_data.cpu_clock = M32R_CPUCLK; | |
231 | boot_cpu_data.bus_clock = M32R_BUSCLK; | |
232 | boot_cpu_data.timer_divide = M32R_TIMER_DIVIDE; | |
233 | ||
234 | #ifdef CONFIG_BLK_DEV_RAM | |
235 | rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK; | |
236 | rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0); | |
237 | rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0); | |
238 | #endif | |
239 | ||
240 | if (!MOUNT_ROOT_RDONLY) | |
241 | root_mountflags &= ~MS_RDONLY; | |
242 | ||
243 | #ifdef CONFIG_VT | |
244 | #if defined(CONFIG_VGA_CONSOLE) | |
245 | conswitchp = &vga_con; | |
246 | #elif defined(CONFIG_DUMMY_CONSOLE) | |
247 | conswitchp = &dummy_con; | |
248 | #endif | |
249 | #endif | |
250 | ||
251 | #ifdef CONFIG_DISCONTIGMEM | |
252 | nodes_clear(node_online_map); | |
253 | node_set_online(0); | |
254 | node_set_online(1); | |
255 | #endif /* CONFIG_DISCONTIGMEM */ | |
256 | ||
257 | init_mm.start_code = (unsigned long) _text; | |
258 | init_mm.end_code = (unsigned long) _etext; | |
259 | init_mm.end_data = (unsigned long) _edata; | |
260 | init_mm.brk = (unsigned long) _end; | |
261 | ||
262 | code_resource.start = virt_to_phys(_text); | |
263 | code_resource.end = virt_to_phys(_etext)-1; | |
264 | data_resource.start = virt_to_phys(_etext); | |
265 | data_resource.end = virt_to_phys(_edata)-1; | |
266 | ||
267 | parse_mem_cmdline(cmdline_p); | |
268 | ||
269 | setup_memory(); | |
270 | ||
271 | paging_init(); | |
272 | } | |
273 | ||
7c1c4e54 | 274 | static struct cpu cpu_devices[NR_CPUS]; |
1da177e4 LT |
275 | |
276 | static int __init topology_init(void) | |
277 | { | |
7c1c4e54 | 278 | int i; |
1da177e4 | 279 | |
7c1c4e54 | 280 | for_each_present_cpu(i) |
76b67ed9 | 281 | register_cpu(&cpu_devices[i], i); |
1da177e4 LT |
282 | |
283 | return 0; | |
284 | } | |
285 | ||
286 | subsys_initcall(topology_init); | |
287 | ||
288 | #ifdef CONFIG_PROC_FS | |
289 | /* | |
290 | * Get CPU information for use by the procfs. | |
291 | */ | |
292 | static int show_cpuinfo(struct seq_file *m, void *v) | |
293 | { | |
294 | struct cpuinfo_m32r *c = v; | |
295 | unsigned long cpu = c - cpu_data; | |
296 | ||
297 | #ifdef CONFIG_SMP | |
298 | if (!cpu_online(cpu)) | |
299 | return 0; | |
300 | #endif /* CONFIG_SMP */ | |
301 | ||
302 | seq_printf(m, "processor\t: %ld\n", cpu); | |
303 | ||
c978b017 | 304 | #if defined(CONFIG_CHIP_VDEC2) |
1da177e4 LT |
305 | seq_printf(m, "cpu family\t: VDEC2\n" |
306 | "cache size\t: Unknown\n"); | |
c978b017 | 307 | #elif defined(CONFIG_CHIP_M32700) |
1da177e4 LT |
308 | seq_printf(m,"cpu family\t: M32700\n" |
309 | "cache size\t: I-8KB/D-8KB\n"); | |
c978b017 | 310 | #elif defined(CONFIG_CHIP_M32102) |
1da177e4 LT |
311 | seq_printf(m,"cpu family\t: M32102\n" |
312 | "cache size\t: I-8KB\n"); | |
c978b017 | 313 | #elif defined(CONFIG_CHIP_OPSP) |
1da177e4 LT |
314 | seq_printf(m,"cpu family\t: OPSP\n" |
315 | "cache size\t: I-8KB/D-8KB\n"); | |
c978b017 | 316 | #elif defined(CONFIG_CHIP_MP) |
1da177e4 LT |
317 | seq_printf(m, "cpu family\t: M32R-MP\n" |
318 | "cache size\t: I-xxKB/D-xxKB\n"); | |
9287d95e HT |
319 | #elif defined(CONFIG_CHIP_M32104) |
320 | seq_printf(m,"cpu family\t: M32104\n" | |
321 | "cache size\t: I-8KB/D-8KB\n"); | |
1da177e4 LT |
322 | #else |
323 | seq_printf(m, "cpu family\t: Unknown\n"); | |
324 | #endif | |
325 | seq_printf(m, "bogomips\t: %lu.%02lu\n", | |
326 | c->loops_per_jiffy/(500000/HZ), | |
327 | (c->loops_per_jiffy/(5000/HZ)) % 100); | |
c978b017 | 328 | #if defined(CONFIG_PLAT_MAPPI) |
1da177e4 | 329 | seq_printf(m, "Machine\t\t: Mappi Evaluation board\n"); |
c978b017 | 330 | #elif defined(CONFIG_PLAT_MAPPI2) |
1da177e4 | 331 | seq_printf(m, "Machine\t\t: Mappi-II Evaluation board\n"); |
c978b017 | 332 | #elif defined(CONFIG_PLAT_MAPPI3) |
23680863 | 333 | seq_printf(m, "Machine\t\t: Mappi-III Evaluation board\n"); |
c978b017 | 334 | #elif defined(CONFIG_PLAT_M32700UT) |
1da177e4 | 335 | seq_printf(m, "Machine\t\t: M32700UT Evaluation board\n"); |
c978b017 | 336 | #elif defined(CONFIG_PLAT_OPSPUT) |
1da177e4 | 337 | seq_printf(m, "Machine\t\t: OPSPUT Evaluation board\n"); |
c978b017 | 338 | #elif defined(CONFIG_PLAT_USRV) |
1da177e4 | 339 | seq_printf(m, "Machine\t\t: uServer\n"); |
c978b017 | 340 | #elif defined(CONFIG_PLAT_OAKS32R) |
1da177e4 | 341 | seq_printf(m, "Machine\t\t: OAKS32R\n"); |
9287d95e HT |
342 | #elif defined(CONFIG_PLAT_M32104UT) |
343 | seq_printf(m, "Machine\t\t: M3T-M32104UT uT Engine board\n"); | |
1da177e4 LT |
344 | #else |
345 | seq_printf(m, "Machine\t\t: Unknown\n"); | |
346 | #endif | |
347 | ||
348 | #define PRINT_CLOCK(name, value) \ | |
349 | seq_printf(m, name " clock\t: %d.%02dMHz\n", \ | |
350 | ((value) / 1000000), ((value) % 1000000)/10000) | |
351 | ||
352 | PRINT_CLOCK("CPU", (int)c->cpu_clock); | |
353 | PRINT_CLOCK("Bus", (int)c->bus_clock); | |
354 | ||
355 | seq_printf(m, "\n"); | |
356 | ||
357 | return 0; | |
358 | } | |
359 | ||
360 | static void *c_start(struct seq_file *m, loff_t *pos) | |
361 | { | |
362 | return *pos < NR_CPUS ? cpu_data + *pos : NULL; | |
363 | } | |
364 | ||
365 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
366 | { | |
367 | ++*pos; | |
368 | return c_start(m, pos); | |
369 | } | |
370 | ||
371 | static void c_stop(struct seq_file *m, void *v) | |
372 | { | |
373 | } | |
374 | ||
03a44825 | 375 | const struct seq_operations cpuinfo_op = { |
7857a7f5 AV |
376 | .start = c_start, |
377 | .next = c_next, | |
378 | .stop = c_stop, | |
379 | .show = show_cpuinfo, | |
1da177e4 LT |
380 | }; |
381 | #endif /* CONFIG_PROC_FS */ | |
382 | ||
383 | unsigned long cpu_initialized __initdata = 0; | |
384 | ||
385 | /* | |
386 | * cpu_init() initializes state that is per-CPU. Some data is already | |
387 | * initialized (naturally) in the bootstrap process. | |
388 | * We reload them nevertheless, this function acts as a | |
389 | * 'CPU state barrier', nothing should get across. | |
390 | */ | |
391 | #if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \ | |
392 | || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \ | |
9287d95e | 393 | || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) |
1da177e4 LT |
394 | void __init cpu_init (void) |
395 | { | |
396 | int cpu_id = smp_processor_id(); | |
397 | ||
398 | if (test_and_set_bit(cpu_id, &cpu_initialized)) { | |
399 | printk(KERN_WARNING "CPU#%d already initialized!\n", cpu_id); | |
400 | for ( ; ; ) | |
401 | local_irq_enable(); | |
402 | } | |
403 | printk(KERN_INFO "Initializing CPU#%d\n", cpu_id); | |
404 | ||
405 | /* Set up and load the per-CPU TSS and LDT */ | |
f1f10076 | 406 | mmgrab(&init_mm); |
1da177e4 LT |
407 | current->active_mm = &init_mm; |
408 | if (current->mm) | |
409 | BUG(); | |
410 | ||
411 | /* Force FPU initialization */ | |
412 | current_thread_info()->status = 0; | |
413 | clear_used_math(); | |
414 | ||
415 | #ifdef CONFIG_MMU | |
416 | /* Set up MMU */ | |
417 | init_mmu(); | |
418 | #endif | |
419 | ||
420 | /* Set up ICUIMASK */ | |
421 | outl(0x00070000, M32R_ICU_IMASK_PORTL); /* imask=111 */ | |
422 | } | |
423 | #endif /* defined(CONFIG_CHIP_VDEC2) ... */ |