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8c2b58ce GU |
1 | /***************************************************************************/ |
2 | ||
3 | /* | |
99e08374 | 4 | * m68VZ328.c - 68VZ328 specific config |
8c2b58ce GU |
5 | * |
6 | * Copyright (C) 1993 Hamish Macdonald | |
7 | * Copyright (C) 1999 D. Jeff Dionne | |
8 | * Copyright (C) 2001 Georges Menie, Ken Desmet | |
9 | * | |
10 | * This file is subject to the terms and conditions of the GNU General Public | |
11 | * License. See the file COPYING in the main directory of this archive | |
12 | * for more details. | |
13 | */ | |
14 | ||
15 | /***************************************************************************/ | |
16 | ||
df592eb5 | 17 | #include <linux/init.h> |
8c2b58ce GU |
18 | #include <linux/types.h> |
19 | #include <linux/kernel.h> | |
8c2b58ce GU |
20 | #include <linux/kd.h> |
21 | #include <linux/netdevice.h> | |
1ea9acc7 | 22 | #include <linux/interrupt.h> |
65fde4c6 | 23 | #include <linux/irq.h> |
95177461 | 24 | #include <linux/rtc.h> |
8c2b58ce | 25 | |
ca5999fd | 26 | #include <linux/pgtable.h> |
8c2b58ce GU |
27 | #include <asm/machdep.h> |
28 | #include <asm/MC68VZ328.h> | |
29 | #include <asm/bootstd.h> | |
30 | ||
31 | #ifdef CONFIG_INIT_LCD | |
99e08374 | 32 | #include "bootlogo-vz.h" |
8c2b58ce GU |
33 | #endif |
34 | ||
35 | /***************************************************************************/ | |
36 | ||
95177461 | 37 | int m68328_hwclk(int set, struct rtc_time *t); |
8c2b58ce GU |
38 | |
39 | /***************************************************************************/ | |
40 | /* Init Drangon Engine hardware */ | |
41 | /***************************************************************************/ | |
42 | #if defined(CONFIG_DRAGEN2) | |
43 | ||
44 | static void m68vz328_reset(void) | |
45 | { | |
46 | local_irq_disable(); | |
47 | ||
48 | #ifdef CONFIG_INIT_LCD | |
49 | PBDATA |= 0x20; /* disable CCFL light */ | |
50 | PKDATA |= 0x4; /* disable LCD controller */ | |
51 | LCKCON = 0; | |
52 | #endif | |
53 | ||
54 | __asm__ __volatile__( | |
55 | "reset\n\t" | |
56 | "moveal #0x04000000, %a0\n\t" | |
57 | "moveal 0(%a0), %sp\n\t" | |
58 | "moveal 4(%a0), %a0\n\t" | |
59 | "jmp (%a0)" | |
60 | ); | |
61 | } | |
62 | ||
df592eb5 | 63 | static void __init init_hardware(char *command, int size) |
8c2b58ce GU |
64 | { |
65 | #ifdef CONFIG_DIRECT_IO_ACCESS | |
66 | SCR = 0x10; /* allow user access to internal registers */ | |
67 | #endif | |
68 | ||
69 | /* CSGB Init */ | |
70 | CSGBB = 0x4000; | |
71 | CSB = 0x1a1; | |
72 | ||
73 | /* CS8900 init */ | |
74 | /* PK3: hardware sleep function pin, active low */ | |
75 | PKSEL |= PK(3); /* select pin as I/O */ | |
76 | PKDIR |= PK(3); /* select pin as output */ | |
77 | PKDATA |= PK(3); /* set pin high */ | |
78 | ||
79 | /* PF5: hardware reset function pin, active high */ | |
80 | PFSEL |= PF(5); /* select pin as I/O */ | |
81 | PFDIR |= PF(5); /* select pin as output */ | |
82 | PFDATA &= ~PF(5); /* set pin low */ | |
83 | ||
84 | /* cs8900 hardware reset */ | |
85 | PFDATA |= PF(5); | |
86 | { int i; for (i = 0; i < 32000; ++i); } | |
87 | PFDATA &= ~PF(5); | |
88 | ||
89 | /* INT1 enable (cs8900 IRQ) */ | |
90 | PDPOL &= ~PD(1); /* active high signal */ | |
91 | PDIQEG &= ~PD(1); | |
92 | PDIRQEN |= PD(1); /* IRQ enabled */ | |
93 | ||
8c2b58ce GU |
94 | #ifdef CONFIG_INIT_LCD |
95 | /* initialize LCD controller */ | |
96 | LSSA = (long) screen_bits; | |
97 | LVPW = 0x14; | |
98 | LXMAX = 0x140; | |
99 | LYMAX = 0xef; | |
100 | LRRA = 0; | |
101 | LPXCD = 3; | |
102 | LPICF = 0x08; | |
103 | LPOLCF = 0; | |
104 | LCKCON = 0x80; | |
105 | PCPDEN = 0xff; | |
106 | PCSEL = 0; | |
107 | ||
108 | /* Enable LCD controller */ | |
109 | PKDIR |= 0x4; | |
110 | PKSEL |= 0x4; | |
111 | PKDATA &= ~0x4; | |
112 | ||
113 | /* Enable CCFL backlighting circuit */ | |
114 | PBDIR |= 0x20; | |
115 | PBSEL |= 0x20; | |
116 | PBDATA &= ~0x20; | |
117 | ||
118 | /* contrast control register */ | |
119 | PFDIR |= 0x1; | |
120 | PFSEL &= ~0x1; | |
121 | PWMR = 0x037F; | |
122 | #endif | |
123 | } | |
124 | ||
125 | /***************************************************************************/ | |
126 | /* Init RT-Control uCdimm hardware */ | |
127 | /***************************************************************************/ | |
128 | #elif defined(CONFIG_UCDIMM) | |
129 | ||
130 | static void m68vz328_reset(void) | |
131 | { | |
132 | local_irq_disable(); | |
69614fc6 GU |
133 | asm volatile ( |
134 | "moveal #0x10c00000, %a0;\n\t" | |
135 | "moveb #0, 0xFFFFF300;\n\t" | |
136 | "moveal 0(%a0), %sp;\n\t" | |
137 | "moveal 4(%a0), %a0;\n\t" | |
138 | "jmp (%a0);\n" | |
139 | ); | |
8c2b58ce GU |
140 | } |
141 | ||
142 | unsigned char *cs8900a_hwaddr; | |
143 | static int errno; | |
144 | ||
145 | _bsc0(char *, getserialnum) | |
146 | _bsc1(unsigned char *, gethwaddr, int, a) | |
147 | _bsc1(char *, getbenv, char *, a) | |
148 | ||
df592eb5 | 149 | static void __init init_hardware(char *command, int size) |
8c2b58ce GU |
150 | { |
151 | char *p; | |
152 | ||
ed1aded4 | 153 | pr_info("uCdimm serial string [%s]\n", getserialnum()); |
8c2b58ce | 154 | p = cs8900a_hwaddr = gethwaddr(0); |
ed1aded4 | 155 | pr_info("uCdimm hwaddr %pM\n", p); |
8c2b58ce GU |
156 | p = getbenv("APPEND"); |
157 | if (p) | |
158 | strcpy(p, command); | |
159 | else | |
160 | command[0] = 0; | |
161 | } | |
162 | ||
163 | /***************************************************************************/ | |
164 | #else | |
165 | ||
166 | static void m68vz328_reset(void) | |
167 | { | |
168 | } | |
169 | ||
df592eb5 | 170 | static void __init init_hardware(char *command, int size) |
8c2b58ce GU |
171 | { |
172 | } | |
173 | ||
174 | /***************************************************************************/ | |
175 | #endif | |
176 | /***************************************************************************/ | |
177 | ||
df592eb5 | 178 | void __init config_BSP(char *command, int size) |
8c2b58ce | 179 | { |
ed1aded4 | 180 | pr_info("68VZ328 DragonBallVZ support (c) 2001 Lineo, Inc.\n"); |
8c2b58ce | 181 | |
8c2b58ce GU |
182 | init_hardware(command, size); |
183 | ||
0b175516 | 184 | mach_sched_init = hw_timer_init; |
95177461 | 185 | mach_hwclk = m68328_hwclk; |
8c2b58ce GU |
186 | mach_reset = m68vz328_reset; |
187 | } | |
188 | ||
189 | /***************************************************************************/ |