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b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
0e152d80 GU |
2 | comment "Processor Type" |
3 | ||
ad8f955d GU |
4 | choice |
5 | prompt "CPU family support" | |
6 | default M68KCLASSIC if MMU | |
7 | default COLDFIRE if !MMU | |
8 | help | |
9 | The Freescale (was Motorola) M68K family of processors implements | |
10 | the full 68000 processor instruction set. | |
6b2aac42 | 11 | The Freescale ColdFire family of processors is a modern derivative |
ad8f955d GU |
12 | of the 68000 processor family. They are mainly targeted at embedded |
13 | applications, and are all System-On-Chip (SOC) devices, as opposed | |
14 | to stand alone CPUs. They implement a subset of the original 68000 | |
15 | processor instruction set. | |
16 | If you anticipate running this kernel on a computer with a classic | |
17 | MC68xxx processor, select M68KCLASSIC. | |
18 | If you anticipate running this kernel on a computer with a ColdFire | |
19 | processor, select COLDFIRE. | |
20 | ||
21 | config M68KCLASSIC | |
22 | bool "Classic M68K CPU family support" | |
23 | ||
24 | config COLDFIRE | |
25 | bool "Coldfire CPU family support" | |
7563bbf8 | 26 | select ARCH_HAVE_CUSTOM_GPIO_H |
ad8f955d GU |
27 | select CPU_HAS_NO_BITFIELDS |
28 | select CPU_HAS_NO_MULDIV64 | |
29 | select GENERIC_CSUM | |
e05f2e18 | 30 | select GPIOLIB |
e7d6582e | 31 | select HAVE_CLK |
ad8f955d GU |
32 | |
33 | endchoice | |
34 | ||
35 | if M68KCLASSIC | |
36 | ||
0e152d80 | 37 | config M68000 |
4674e8d3 | 38 | bool "MC68000" |
9da1a84a | 39 | depends on !MMU |
0e152d80 | 40 | select CPU_HAS_NO_BITFIELDS |
84f3fb7a | 41 | select CPU_HAS_NO_MULDIV64 |
9f1f1180 | 42 | select CPU_HAS_NO_UNALIGNED |
7f73bafc | 43 | select GENERIC_CSUM |
fff7fb0b | 44 | select CPU_NO_EFFICIENT_FFS |
14c44b95 | 45 | select HAVE_ARCH_HASH |
0e152d80 GU |
46 | help |
47 | The Freescale (was Motorola) 68000 CPU is the first generation of | |
48 | the well known M68K family of processors. The CPU core as well as | |
49 | being available as a stand alone CPU was also used in many | |
50 | System-On-Chip devices (eg 68328, 68302, etc). It does not contain | |
51 | a paging MMU. | |
52 | ||
53 | config MCPU32 | |
54 | bool | |
55 | select CPU_HAS_NO_BITFIELDS | |
7df0d27f | 56 | select CPU_HAS_NO_UNALIGNED |
fff7fb0b | 57 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
58 | help |
59 | The Freescale (was then Motorola) CPU32 is a CPU core that is | |
60 | based on the 68020 processor. For the most part it is used in | |
61 | System-On-Chip parts, and does not contain a paging MMU. | |
62 | ||
0e152d80 GU |
63 | config M68020 |
64 | bool "68020 support" | |
65 | depends on MMU | |
e5f8d1f0 | 66 | select FPU |
e08d703c | 67 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
68 | help |
69 | If you anticipate running this kernel on a computer with a MC68020 | |
70 | processor, say Y. Otherwise, say N. Note that the 68020 requires a | |
71 | 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the | |
72 | Sun 3, which provides its own version. | |
73 | ||
74 | config M68030 | |
75 | bool "68030 support" | |
76 | depends on MMU && !MMU_SUN3 | |
e5f8d1f0 | 77 | select FPU |
e08d703c | 78 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
79 | help |
80 | If you anticipate running this kernel on a computer with a MC68030 | |
81 | processor, say Y. Otherwise, say N. Note that a MC68EC030 will not | |
82 | work, as it does not include an MMU (Memory Management Unit). | |
83 | ||
84 | config M68040 | |
85 | bool "68040 support" | |
86 | depends on MMU && !MMU_SUN3 | |
e5f8d1f0 | 87 | select FPU |
e08d703c | 88 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
89 | help |
90 | If you anticipate running this kernel on a computer with a MC68LC040 | |
91 | or MC68040 processor, say Y. Otherwise, say N. Note that an | |
92 | MC68EC040 will not work, as it does not include an MMU (Memory | |
93 | Management Unit). | |
94 | ||
95 | config M68060 | |
96 | bool "68060 support" | |
97 | depends on MMU && !MMU_SUN3 | |
e5f8d1f0 | 98 | select FPU |
e08d703c | 99 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
100 | help |
101 | If you anticipate running this kernel on a computer with a MC68060 | |
102 | processor, say Y. Otherwise, say N. | |
103 | ||
104 | config M68328 | |
105 | bool "MC68328" | |
106 | depends on !MMU | |
107 | select M68000 | |
108 | help | |
109 | Motorola 68328 processor support. | |
110 | ||
111 | config M68EZ328 | |
112 | bool "MC68EZ328" | |
113 | depends on !MMU | |
114 | select M68000 | |
115 | help | |
116 | Motorola 68EX328 processor support. | |
117 | ||
118 | config M68VZ328 | |
119 | bool "MC68VZ328" | |
120 | depends on !MMU | |
121 | select M68000 | |
122 | help | |
123 | Motorola 68VZ328 processor support. | |
124 | ||
ad8f955d GU |
125 | endif # M68KCLASSIC |
126 | ||
127 | if COLDFIRE | |
128 | ||
fa95a1dd GU |
129 | choice |
130 | prompt "ColdFire SoC type" | |
131 | default M520x | |
132 | help | |
133 | Select the type of ColdFire System-on-Chip (SoC) that you want | |
134 | to build for. | |
135 | ||
0e152d80 GU |
136 | config M5206 |
137 | bool "MCF5206" | |
138 | depends on !MMU | |
0e152d80 GU |
139 | select COLDFIRE_SW_A7 |
140 | select HAVE_MBAR | |
fff7fb0b | 141 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
142 | help |
143 | Motorola ColdFire 5206 processor support. | |
144 | ||
145 | config M5206e | |
146 | bool "MCF5206e" | |
147 | depends on !MMU | |
0e152d80 GU |
148 | select COLDFIRE_SW_A7 |
149 | select HAVE_MBAR | |
fff7fb0b | 150 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
151 | help |
152 | Motorola ColdFire 5206e processor support. | |
153 | ||
154 | config M520x | |
155 | bool "MCF520x" | |
156 | depends on !MMU | |
0e152d80 GU |
157 | select GENERIC_CLOCKEVENTS |
158 | select HAVE_CACHE_SPLIT | |
159 | help | |
160 | Freescale Coldfire 5207/5208 processor support. | |
161 | ||
162 | config M523x | |
163 | bool "MCF523x" | |
164 | depends on !MMU | |
0e152d80 GU |
165 | select GENERIC_CLOCKEVENTS |
166 | select HAVE_CACHE_SPLIT | |
167 | select HAVE_IPSBAR | |
168 | help | |
169 | Freescale Coldfire 5230/1/2/4/5 processor support | |
170 | ||
171 | config M5249 | |
172 | bool "MCF5249" | |
173 | depends on !MMU | |
0e152d80 GU |
174 | select COLDFIRE_SW_A7 |
175 | select HAVE_MBAR | |
fff7fb0b | 176 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
177 | help |
178 | Motorola ColdFire 5249 processor support. | |
179 | ||
04e037aa SK |
180 | config M525x |
181 | bool "MCF525x" | |
182 | depends on !MMU | |
183 | select COLDFIRE_SW_A7 | |
184 | select HAVE_MBAR | |
fff7fb0b | 185 | select CPU_NO_EFFICIENT_FFS |
04e037aa SK |
186 | help |
187 | Freescale (Motorola) Coldfire 5251/5253 processor support. | |
188 | ||
0e152d80 GU |
189 | config M5271 |
190 | bool "MCF5271" | |
191 | depends on !MMU | |
0e152d80 GU |
192 | select M527x |
193 | select HAVE_CACHE_SPLIT | |
194 | select HAVE_IPSBAR | |
195 | select GENERIC_CLOCKEVENTS | |
196 | help | |
197 | Freescale (Motorola) ColdFire 5270/5271 processor support. | |
198 | ||
199 | config M5272 | |
200 | bool "MCF5272" | |
201 | depends on !MMU | |
0e152d80 GU |
202 | select COLDFIRE_SW_A7 |
203 | select HAVE_MBAR | |
fff7fb0b | 204 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
205 | help |
206 | Motorola ColdFire 5272 processor support. | |
207 | ||
208 | config M5275 | |
209 | bool "MCF5275" | |
210 | depends on !MMU | |
0e152d80 GU |
211 | select M527x |
212 | select HAVE_CACHE_SPLIT | |
213 | select HAVE_IPSBAR | |
214 | select GENERIC_CLOCKEVENTS | |
215 | help | |
216 | Freescale (Motorola) ColdFire 5274/5275 processor support. | |
217 | ||
218 | config M528x | |
219 | bool "MCF528x" | |
220 | depends on !MMU | |
0e152d80 GU |
221 | select GENERIC_CLOCKEVENTS |
222 | select HAVE_CACHE_SPLIT | |
223 | select HAVE_IPSBAR | |
224 | help | |
225 | Motorola ColdFire 5280/5282 processor support. | |
226 | ||
227 | config M5307 | |
228 | bool "MCF5307" | |
229 | depends on !MMU | |
0e152d80 GU |
230 | select COLDFIRE_SW_A7 |
231 | select HAVE_CACHE_CB | |
232 | select HAVE_MBAR | |
fff7fb0b | 233 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
234 | help |
235 | Motorola ColdFire 5307 processor support. | |
236 | ||
237 | config M532x | |
238 | bool "MCF532x" | |
239 | depends on !MMU | |
6eac4027 | 240 | select M53xx |
0e152d80 GU |
241 | select HAVE_CACHE_CB |
242 | help | |
243 | Freescale (Motorola) ColdFire 532x processor support. | |
244 | ||
e9d9dc6a GU |
245 | config M537x |
246 | bool "MCF537x" | |
247 | depends on !MMU | |
248 | select M53xx | |
249 | select HAVE_CACHE_CB | |
250 | help | |
251 | Freescale ColdFire 537x processor support. | |
252 | ||
0e152d80 GU |
253 | config M5407 |
254 | bool "MCF5407" | |
255 | depends on !MMU | |
0e152d80 GU |
256 | select COLDFIRE_SW_A7 |
257 | select HAVE_CACHE_CB | |
258 | select HAVE_MBAR | |
fff7fb0b | 259 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
260 | help |
261 | Motorola ColdFire 5407 processor support. | |
262 | ||
0e152d80 GU |
263 | config M547x |
264 | bool "MCF547x" | |
0e152d80 | 265 | select M54xx |
1f7034b9 | 266 | select MMU_COLDFIRE if MMU |
e5f8d1f0 | 267 | select FPU if MMU |
0e152d80 GU |
268 | select HAVE_CACHE_CB |
269 | select HAVE_MBAR | |
fff7fb0b | 270 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
271 | help |
272 | Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. | |
273 | ||
274 | config M548x | |
275 | bool "MCF548x" | |
1f7034b9 | 276 | select MMU_COLDFIRE if MMU |
e5f8d1f0 | 277 | select FPU if MMU |
0e152d80 GU |
278 | select M54xx |
279 | select HAVE_CACHE_CB | |
280 | select HAVE_MBAR | |
fff7fb0b | 281 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
282 | help |
283 | Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. | |
284 | ||
bea8bcb1 SK |
285 | config M5441x |
286 | bool "MCF5441x" | |
b47c7b6f | 287 | select MMU_COLDFIRE if MMU |
bea8bcb1 SK |
288 | select GENERIC_CLOCKEVENTS |
289 | select HAVE_CACHE_CB | |
290 | help | |
291 | Freescale Coldfire 54410/54415/54416/54417/54418 processor support. | |
292 | ||
fa95a1dd GU |
293 | endchoice |
294 | ||
295 | config M527x | |
296 | bool | |
297 | ||
298 | config M53xx | |
299 | bool | |
300 | ||
301 | config M54xx | |
eb01d42a | 302 | select HAVE_PCI |
fa95a1dd GU |
303 | bool |
304 | ||
ad8f955d GU |
305 | endif # COLDFIRE |
306 | ||
0e152d80 GU |
307 | |
308 | comment "Processor Specific Options" | |
309 | ||
310 | config M68KFPU_EMU | |
112f8b12 | 311 | bool "Math emulation support" |
0e152d80 | 312 | depends on MMU |
0e152d80 GU |
313 | help |
314 | At some point in the future, this will cause floating-point math | |
315 | instructions to be emulated by the kernel on machines that lack a | |
316 | floating-point math coprocessor. Thrill-seekers and chronically | |
317 | sleep-deprived psychotic hacker types can say Y now, everyone else | |
318 | should probably wait a while. | |
319 | ||
320 | config M68KFPU_EMU_EXTRAPREC | |
321 | bool "Math emulation extra precision" | |
322 | depends on M68KFPU_EMU | |
323 | help | |
324 | The fpu uses normally a few bit more during calculations for | |
325 | correct rounding, the emulator can (often) do the same but this | |
326 | extra calculation can cost quite some time, so you can disable | |
327 | it here. The emulator will then "only" calculate with a 64 bit | |
328 | mantissa and round slightly incorrect, what is more than enough | |
329 | for normal usage. | |
330 | ||
331 | config M68KFPU_EMU_ONLY | |
332 | bool "Math emulation only kernel" | |
333 | depends on M68KFPU_EMU | |
334 | help | |
335 | This option prevents any floating-point instructions from being | |
336 | compiled into the kernel, thereby the kernel doesn't save any | |
337 | floating point context anymore during task switches, so this | |
338 | kernel will only be usable on machines without a floating-point | |
339 | math coprocessor. This makes the kernel a bit faster as no tests | |
340 | needs to be executed whether a floating-point instruction in the | |
341 | kernel should be executed or not. | |
342 | ||
343 | config ADVANCED | |
344 | bool "Advanced configuration options" | |
345 | depends on MMU | |
346 | ---help--- | |
347 | This gives you access to some advanced options for the CPU. The | |
348 | defaults should be fine for most users, but these options may make | |
349 | it possible for you to improve performance somewhat if you know what | |
350 | you are doing. | |
351 | ||
352 | Note that the answer to this question won't directly affect the | |
353 | kernel: saying N will just cause the configurator to skip all | |
354 | the questions about these options. | |
355 | ||
356 | Most users should say N to this question. | |
357 | ||
358 | config RMW_INSNS | |
359 | bool "Use read-modify-write instructions" | |
360 | depends on ADVANCED | |
361 | ---help--- | |
362 | This allows to use certain instructions that work with indivisible | |
363 | read-modify-write bus cycles. While this is faster than the | |
364 | workaround of disabling interrupts, it can conflict with DMA | |
365 | ( = direct memory access) on many Amiga systems, and it is also said | |
366 | to destabilize other machines. It is very likely that this will | |
367 | cause serious problems on any Amiga or Atari Medusa if set. The only | |
368 | configuration where it should work are 68030-based Ataris, where it | |
369 | apparently improves performance. But you've been warned! Unless you | |
370 | really know what you are doing, say N. Try Y only if you're quite | |
371 | adventurous. | |
372 | ||
373 | config SINGLE_MEMORY_CHUNK | |
374 | bool "Use one physical chunk of memory only" if ADVANCED && !SUN3 | |
375 | depends on MMU | |
376 | default y if SUN3 | |
377 | select NEED_MULTIPLE_NODES | |
378 | help | |
379 | Ignore all but the first contiguous chunk of physical memory for VM | |
380 | purposes. This will save a few bytes kernel size and may speed up | |
381 | some operations. Say N if not sure. | |
382 | ||
383 | config ARCH_DISCONTIGMEM_ENABLE | |
384 | def_bool MMU && !SINGLE_MEMORY_CHUNK | |
385 | ||
386 | config 060_WRITETHROUGH | |
387 | bool "Use write-through caching for 68060 supervisor accesses" | |
388 | depends on ADVANCED && M68060 | |
389 | ---help--- | |
390 | The 68060 generally uses copyback caching of recently accessed data. | |
391 | Copyback caching means that memory writes will be held in an on-chip | |
392 | cache and only written back to memory some time later. Saying Y | |
393 | here will force supervisor (kernel) accesses to use writethrough | |
394 | caching. Writethrough caching means that data is written to memory | |
395 | straight away, so that cache and memory data always agree. | |
396 | Writethrough caching is less efficient, but is needed for some | |
397 | drivers on 68060 based systems where the 68060 bus snooping signal | |
398 | is hardwired on. The 53c710 SCSI driver is known to suffer from | |
399 | this problem. | |
400 | ||
401 | config M68K_L2_CACHE | |
402 | bool | |
403 | depends on MAC | |
404 | default y | |
405 | ||
406 | config NODES_SHIFT | |
407 | int | |
408 | default "3" | |
409 | depends on !SINGLE_MEMORY_CHUNK | |
410 | ||
022613e0 GU |
411 | config CPU_HAS_NO_BITFIELDS |
412 | bool | |
413 | ||
414 | config CPU_HAS_NO_MULDIV64 | |
415 | bool | |
416 | ||
9f1f1180 GU |
417 | config CPU_HAS_NO_UNALIGNED |
418 | bool | |
419 | ||
022613e0 GU |
420 | config CPU_HAS_ADDRESS_SPACES |
421 | bool | |
422 | ||
0e152d80 GU |
423 | config FPU |
424 | bool | |
425 | ||
426 | config COLDFIRE_SW_A7 | |
427 | bool | |
428 | ||
429 | config HAVE_CACHE_SPLIT | |
430 | bool | |
431 | ||
432 | config HAVE_CACHE_CB | |
433 | bool | |
434 | ||
435 | config HAVE_MBAR | |
436 | bool | |
437 | ||
438 | config HAVE_IPSBAR | |
439 | bool | |
440 | ||
0e152d80 GU |
441 | config CLOCK_FREQ |
442 | int "Set the core clock frequency" | |
15c2ca4e GU |
443 | default "25000000" if M5206 |
444 | default "54000000" if M5206e | |
445 | default "166666666" if M520x | |
446 | default "140000000" if M5249 | |
447 | default "150000000" if M527x || M523x | |
448 | default "90000000" if M5307 | |
449 | default "50000000" if M5407 | |
450 | default "266000000" if M54xx | |
0e152d80 | 451 | default "66666666" |
d9ee4896 | 452 | depends on COLDFIRE |
0e152d80 GU |
453 | help |
454 | Define the CPU clock frequency in use. This is the core clock | |
455 | frequency, it may or may not be the same as the external clock | |
456 | crystal fitted to your board. Some processors have an internal | |
457 | PLL and can have their frequency programmed at run time, others | |
458 | use internal dividers. In general the kernel won't setup a PLL | |
459 | if it is fitted (there are some exceptions). This value will be | |
460 | specific to the exact CPU that you are using. | |
461 | ||
462 | config OLDMASK | |
463 | bool "Old mask 5307 (1H55J) silicon" | |
464 | depends on M5307 | |
465 | help | |
466 | Build support for the older revision ColdFire 5307 silicon. | |
467 | Specifically this is the 1H55J mask revision. | |
468 | ||
469 | if HAVE_CACHE_SPLIT | |
470 | choice | |
471 | prompt "Split Cache Configuration" | |
472 | default CACHE_I | |
473 | ||
474 | config CACHE_I | |
475 | bool "Instruction" | |
476 | help | |
477 | Use all of the ColdFire CPU cache memory as an instruction cache. | |
478 | ||
479 | config CACHE_D | |
480 | bool "Data" | |
481 | help | |
482 | Use all of the ColdFire CPU cache memory as a data cache. | |
483 | ||
484 | config CACHE_BOTH | |
485 | bool "Both" | |
486 | help | |
487 | Split the ColdFire CPU cache, and use half as an instruction cache | |
488 | and half as a data cache. | |
489 | endchoice | |
490 | endif | |
491 | ||
492 | if HAVE_CACHE_CB | |
493 | choice | |
494 | prompt "Data cache mode" | |
495 | default CACHE_WRITETHRU | |
496 | ||
497 | config CACHE_WRITETHRU | |
498 | bool "Write-through" | |
499 | help | |
500 | The ColdFire CPU cache is set into Write-through mode. | |
501 | ||
502 | config CACHE_COPYBACK | |
503 | bool "Copy-back" | |
504 | help | |
505 | The ColdFire CPU cache is set into Copy-back mode. | |
506 | endchoice | |
507 | endif | |
508 |