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Commit | Line | Data |
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0e152d80 GU |
1 | comment "Processor Type" |
2 | ||
ad8f955d GU |
3 | choice |
4 | prompt "CPU family support" | |
5 | default M68KCLASSIC if MMU | |
6 | default COLDFIRE if !MMU | |
7 | help | |
8 | The Freescale (was Motorola) M68K family of processors implements | |
9 | the full 68000 processor instruction set. | |
6b2aac42 | 10 | The Freescale ColdFire family of processors is a modern derivative |
ad8f955d GU |
11 | of the 68000 processor family. They are mainly targeted at embedded |
12 | applications, and are all System-On-Chip (SOC) devices, as opposed | |
13 | to stand alone CPUs. They implement a subset of the original 68000 | |
14 | processor instruction set. | |
15 | If you anticipate running this kernel on a computer with a classic | |
16 | MC68xxx processor, select M68KCLASSIC. | |
17 | If you anticipate running this kernel on a computer with a ColdFire | |
18 | processor, select COLDFIRE. | |
19 | ||
20 | config M68KCLASSIC | |
21 | bool "Classic M68K CPU family support" | |
22 | ||
23 | config COLDFIRE | |
24 | bool "Coldfire CPU family support" | |
7563bbf8 | 25 | select ARCH_HAVE_CUSTOM_GPIO_H |
ad8f955d GU |
26 | select CPU_HAS_NO_BITFIELDS |
27 | select CPU_HAS_NO_MULDIV64 | |
28 | select GENERIC_CSUM | |
e05f2e18 | 29 | select GPIOLIB |
e7d6582e | 30 | select HAVE_CLK |
ad8f955d GU |
31 | |
32 | endchoice | |
33 | ||
34 | if M68KCLASSIC | |
35 | ||
0e152d80 | 36 | config M68000 |
4674e8d3 | 37 | bool "MC68000" |
9da1a84a | 38 | depends on !MMU |
0e152d80 | 39 | select CPU_HAS_NO_BITFIELDS |
84f3fb7a | 40 | select CPU_HAS_NO_MULDIV64 |
9f1f1180 | 41 | select CPU_HAS_NO_UNALIGNED |
7f73bafc | 42 | select GENERIC_CSUM |
fff7fb0b | 43 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
44 | help |
45 | The Freescale (was Motorola) 68000 CPU is the first generation of | |
46 | the well known M68K family of processors. The CPU core as well as | |
47 | being available as a stand alone CPU was also used in many | |
48 | System-On-Chip devices (eg 68328, 68302, etc). It does not contain | |
49 | a paging MMU. | |
50 | ||
51 | config MCPU32 | |
52 | bool | |
53 | select CPU_HAS_NO_BITFIELDS | |
7df0d27f | 54 | select CPU_HAS_NO_UNALIGNED |
fff7fb0b | 55 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
56 | help |
57 | The Freescale (was then Motorola) CPU32 is a CPU core that is | |
58 | based on the 68020 processor. For the most part it is used in | |
59 | System-On-Chip parts, and does not contain a paging MMU. | |
60 | ||
0e152d80 GU |
61 | config M68020 |
62 | bool "68020 support" | |
63 | depends on MMU | |
e08d703c | 64 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
65 | help |
66 | If you anticipate running this kernel on a computer with a MC68020 | |
67 | processor, say Y. Otherwise, say N. Note that the 68020 requires a | |
68 | 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the | |
69 | Sun 3, which provides its own version. | |
70 | ||
71 | config M68030 | |
72 | bool "68030 support" | |
73 | depends on MMU && !MMU_SUN3 | |
e08d703c | 74 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
75 | help |
76 | If you anticipate running this kernel on a computer with a MC68030 | |
77 | processor, say Y. Otherwise, say N. Note that a MC68EC030 will not | |
78 | work, as it does not include an MMU (Memory Management Unit). | |
79 | ||
80 | config M68040 | |
81 | bool "68040 support" | |
82 | depends on MMU && !MMU_SUN3 | |
e08d703c | 83 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
84 | help |
85 | If you anticipate running this kernel on a computer with a MC68LC040 | |
86 | or MC68040 processor, say Y. Otherwise, say N. Note that an | |
87 | MC68EC040 will not work, as it does not include an MMU (Memory | |
88 | Management Unit). | |
89 | ||
90 | config M68060 | |
91 | bool "68060 support" | |
92 | depends on MMU && !MMU_SUN3 | |
e08d703c | 93 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
94 | help |
95 | If you anticipate running this kernel on a computer with a MC68060 | |
96 | processor, say Y. Otherwise, say N. | |
97 | ||
98 | config M68328 | |
99 | bool "MC68328" | |
100 | depends on !MMU | |
101 | select M68000 | |
102 | help | |
103 | Motorola 68328 processor support. | |
104 | ||
105 | config M68EZ328 | |
106 | bool "MC68EZ328" | |
107 | depends on !MMU | |
108 | select M68000 | |
109 | help | |
110 | Motorola 68EX328 processor support. | |
111 | ||
112 | config M68VZ328 | |
113 | bool "MC68VZ328" | |
114 | depends on !MMU | |
115 | select M68000 | |
116 | help | |
117 | Motorola 68VZ328 processor support. | |
118 | ||
ad8f955d GU |
119 | endif # M68KCLASSIC |
120 | ||
121 | if COLDFIRE | |
122 | ||
fa95a1dd GU |
123 | choice |
124 | prompt "ColdFire SoC type" | |
125 | default M520x | |
126 | help | |
127 | Select the type of ColdFire System-on-Chip (SoC) that you want | |
128 | to build for. | |
129 | ||
0e152d80 GU |
130 | config M5206 |
131 | bool "MCF5206" | |
132 | depends on !MMU | |
0e152d80 GU |
133 | select COLDFIRE_SW_A7 |
134 | select HAVE_MBAR | |
fff7fb0b | 135 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
136 | help |
137 | Motorola ColdFire 5206 processor support. | |
138 | ||
139 | config M5206e | |
140 | bool "MCF5206e" | |
141 | depends on !MMU | |
0e152d80 GU |
142 | select COLDFIRE_SW_A7 |
143 | select HAVE_MBAR | |
fff7fb0b | 144 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
145 | help |
146 | Motorola ColdFire 5206e processor support. | |
147 | ||
148 | config M520x | |
149 | bool "MCF520x" | |
150 | depends on !MMU | |
0e152d80 GU |
151 | select GENERIC_CLOCKEVENTS |
152 | select HAVE_CACHE_SPLIT | |
153 | help | |
154 | Freescale Coldfire 5207/5208 processor support. | |
155 | ||
156 | config M523x | |
157 | bool "MCF523x" | |
158 | depends on !MMU | |
0e152d80 GU |
159 | select GENERIC_CLOCKEVENTS |
160 | select HAVE_CACHE_SPLIT | |
161 | select HAVE_IPSBAR | |
162 | help | |
163 | Freescale Coldfire 5230/1/2/4/5 processor support | |
164 | ||
165 | config M5249 | |
166 | bool "MCF5249" | |
167 | depends on !MMU | |
0e152d80 GU |
168 | select COLDFIRE_SW_A7 |
169 | select HAVE_MBAR | |
fff7fb0b | 170 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
171 | help |
172 | Motorola ColdFire 5249 processor support. | |
173 | ||
04e037aa SK |
174 | config M525x |
175 | bool "MCF525x" | |
176 | depends on !MMU | |
177 | select COLDFIRE_SW_A7 | |
178 | select HAVE_MBAR | |
fff7fb0b | 179 | select CPU_NO_EFFICIENT_FFS |
04e037aa SK |
180 | help |
181 | Freescale (Motorola) Coldfire 5251/5253 processor support. | |
182 | ||
0e152d80 GU |
183 | config M5271 |
184 | bool "MCF5271" | |
185 | depends on !MMU | |
0e152d80 GU |
186 | select M527x |
187 | select HAVE_CACHE_SPLIT | |
188 | select HAVE_IPSBAR | |
189 | select GENERIC_CLOCKEVENTS | |
190 | help | |
191 | Freescale (Motorola) ColdFire 5270/5271 processor support. | |
192 | ||
193 | config M5272 | |
194 | bool "MCF5272" | |
195 | depends on !MMU | |
0e152d80 GU |
196 | select COLDFIRE_SW_A7 |
197 | select HAVE_MBAR | |
fff7fb0b | 198 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
199 | help |
200 | Motorola ColdFire 5272 processor support. | |
201 | ||
202 | config M5275 | |
203 | bool "MCF5275" | |
204 | depends on !MMU | |
0e152d80 GU |
205 | select M527x |
206 | select HAVE_CACHE_SPLIT | |
207 | select HAVE_IPSBAR | |
208 | select GENERIC_CLOCKEVENTS | |
209 | help | |
210 | Freescale (Motorola) ColdFire 5274/5275 processor support. | |
211 | ||
212 | config M528x | |
213 | bool "MCF528x" | |
214 | depends on !MMU | |
0e152d80 GU |
215 | select GENERIC_CLOCKEVENTS |
216 | select HAVE_CACHE_SPLIT | |
217 | select HAVE_IPSBAR | |
218 | help | |
219 | Motorola ColdFire 5280/5282 processor support. | |
220 | ||
221 | config M5307 | |
222 | bool "MCF5307" | |
223 | depends on !MMU | |
0e152d80 GU |
224 | select COLDFIRE_SW_A7 |
225 | select HAVE_CACHE_CB | |
226 | select HAVE_MBAR | |
fff7fb0b | 227 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
228 | help |
229 | Motorola ColdFire 5307 processor support. | |
230 | ||
231 | config M532x | |
232 | bool "MCF532x" | |
233 | depends on !MMU | |
6eac4027 | 234 | select M53xx |
0e152d80 GU |
235 | select HAVE_CACHE_CB |
236 | help | |
237 | Freescale (Motorola) ColdFire 532x processor support. | |
238 | ||
e9d9dc6a GU |
239 | config M537x |
240 | bool "MCF537x" | |
241 | depends on !MMU | |
242 | select M53xx | |
243 | select HAVE_CACHE_CB | |
244 | help | |
245 | Freescale ColdFire 537x processor support. | |
246 | ||
0e152d80 GU |
247 | config M5407 |
248 | bool "MCF5407" | |
249 | depends on !MMU | |
0e152d80 GU |
250 | select COLDFIRE_SW_A7 |
251 | select HAVE_CACHE_CB | |
252 | select HAVE_MBAR | |
fff7fb0b | 253 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
254 | help |
255 | Motorola ColdFire 5407 processor support. | |
256 | ||
0e152d80 GU |
257 | config M547x |
258 | bool "MCF547x" | |
0e152d80 | 259 | select M54xx |
1f7034b9 | 260 | select MMU_COLDFIRE if MMU |
0e152d80 GU |
261 | select HAVE_CACHE_CB |
262 | select HAVE_MBAR | |
fff7fb0b | 263 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
264 | help |
265 | Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. | |
266 | ||
267 | config M548x | |
268 | bool "MCF548x" | |
1f7034b9 | 269 | select MMU_COLDFIRE if MMU |
0e152d80 GU |
270 | select M54xx |
271 | select HAVE_CACHE_CB | |
272 | select HAVE_MBAR | |
fff7fb0b | 273 | select CPU_NO_EFFICIENT_FFS |
0e152d80 GU |
274 | help |
275 | Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. | |
276 | ||
bea8bcb1 SK |
277 | config M5441x |
278 | bool "MCF5441x" | |
279 | depends on !MMU | |
280 | select GENERIC_CLOCKEVENTS | |
281 | select HAVE_CACHE_CB | |
282 | help | |
283 | Freescale Coldfire 54410/54415/54416/54417/54418 processor support. | |
284 | ||
fa95a1dd GU |
285 | endchoice |
286 | ||
287 | config M527x | |
288 | bool | |
289 | ||
290 | config M53xx | |
291 | bool | |
292 | ||
293 | config M54xx | |
294 | bool | |
295 | ||
ad8f955d GU |
296 | endif # COLDFIRE |
297 | ||
0e152d80 GU |
298 | |
299 | comment "Processor Specific Options" | |
300 | ||
301 | config M68KFPU_EMU | |
112f8b12 | 302 | bool "Math emulation support" |
0e152d80 | 303 | depends on MMU |
0e152d80 GU |
304 | help |
305 | At some point in the future, this will cause floating-point math | |
306 | instructions to be emulated by the kernel on machines that lack a | |
307 | floating-point math coprocessor. Thrill-seekers and chronically | |
308 | sleep-deprived psychotic hacker types can say Y now, everyone else | |
309 | should probably wait a while. | |
310 | ||
311 | config M68KFPU_EMU_EXTRAPREC | |
312 | bool "Math emulation extra precision" | |
313 | depends on M68KFPU_EMU | |
314 | help | |
315 | The fpu uses normally a few bit more during calculations for | |
316 | correct rounding, the emulator can (often) do the same but this | |
317 | extra calculation can cost quite some time, so you can disable | |
318 | it here. The emulator will then "only" calculate with a 64 bit | |
319 | mantissa and round slightly incorrect, what is more than enough | |
320 | for normal usage. | |
321 | ||
322 | config M68KFPU_EMU_ONLY | |
323 | bool "Math emulation only kernel" | |
324 | depends on M68KFPU_EMU | |
325 | help | |
326 | This option prevents any floating-point instructions from being | |
327 | compiled into the kernel, thereby the kernel doesn't save any | |
328 | floating point context anymore during task switches, so this | |
329 | kernel will only be usable on machines without a floating-point | |
330 | math coprocessor. This makes the kernel a bit faster as no tests | |
331 | needs to be executed whether a floating-point instruction in the | |
332 | kernel should be executed or not. | |
333 | ||
334 | config ADVANCED | |
335 | bool "Advanced configuration options" | |
336 | depends on MMU | |
337 | ---help--- | |
338 | This gives you access to some advanced options for the CPU. The | |
339 | defaults should be fine for most users, but these options may make | |
340 | it possible for you to improve performance somewhat if you know what | |
341 | you are doing. | |
342 | ||
343 | Note that the answer to this question won't directly affect the | |
344 | kernel: saying N will just cause the configurator to skip all | |
345 | the questions about these options. | |
346 | ||
347 | Most users should say N to this question. | |
348 | ||
349 | config RMW_INSNS | |
350 | bool "Use read-modify-write instructions" | |
351 | depends on ADVANCED | |
352 | ---help--- | |
353 | This allows to use certain instructions that work with indivisible | |
354 | read-modify-write bus cycles. While this is faster than the | |
355 | workaround of disabling interrupts, it can conflict with DMA | |
356 | ( = direct memory access) on many Amiga systems, and it is also said | |
357 | to destabilize other machines. It is very likely that this will | |
358 | cause serious problems on any Amiga or Atari Medusa if set. The only | |
359 | configuration where it should work are 68030-based Ataris, where it | |
360 | apparently improves performance. But you've been warned! Unless you | |
361 | really know what you are doing, say N. Try Y only if you're quite | |
362 | adventurous. | |
363 | ||
364 | config SINGLE_MEMORY_CHUNK | |
365 | bool "Use one physical chunk of memory only" if ADVANCED && !SUN3 | |
366 | depends on MMU | |
367 | default y if SUN3 | |
368 | select NEED_MULTIPLE_NODES | |
369 | help | |
370 | Ignore all but the first contiguous chunk of physical memory for VM | |
371 | purposes. This will save a few bytes kernel size and may speed up | |
372 | some operations. Say N if not sure. | |
373 | ||
374 | config ARCH_DISCONTIGMEM_ENABLE | |
375 | def_bool MMU && !SINGLE_MEMORY_CHUNK | |
376 | ||
377 | config 060_WRITETHROUGH | |
378 | bool "Use write-through caching for 68060 supervisor accesses" | |
379 | depends on ADVANCED && M68060 | |
380 | ---help--- | |
381 | The 68060 generally uses copyback caching of recently accessed data. | |
382 | Copyback caching means that memory writes will be held in an on-chip | |
383 | cache and only written back to memory some time later. Saying Y | |
384 | here will force supervisor (kernel) accesses to use writethrough | |
385 | caching. Writethrough caching means that data is written to memory | |
386 | straight away, so that cache and memory data always agree. | |
387 | Writethrough caching is less efficient, but is needed for some | |
388 | drivers on 68060 based systems where the 68060 bus snooping signal | |
389 | is hardwired on. The 53c710 SCSI driver is known to suffer from | |
390 | this problem. | |
391 | ||
392 | config M68K_L2_CACHE | |
393 | bool | |
394 | depends on MAC | |
395 | default y | |
396 | ||
397 | config NODES_SHIFT | |
398 | int | |
399 | default "3" | |
400 | depends on !SINGLE_MEMORY_CHUNK | |
401 | ||
022613e0 GU |
402 | config CPU_HAS_NO_BITFIELDS |
403 | bool | |
404 | ||
405 | config CPU_HAS_NO_MULDIV64 | |
406 | bool | |
407 | ||
9f1f1180 GU |
408 | config CPU_HAS_NO_UNALIGNED |
409 | bool | |
410 | ||
022613e0 GU |
411 | config CPU_HAS_ADDRESS_SPACES |
412 | bool | |
413 | ||
0e152d80 GU |
414 | config FPU |
415 | bool | |
416 | ||
417 | config COLDFIRE_SW_A7 | |
418 | bool | |
419 | ||
420 | config HAVE_CACHE_SPLIT | |
421 | bool | |
422 | ||
423 | config HAVE_CACHE_CB | |
424 | bool | |
425 | ||
426 | config HAVE_MBAR | |
427 | bool | |
428 | ||
429 | config HAVE_IPSBAR | |
430 | bool | |
431 | ||
0e152d80 GU |
432 | config CLOCK_FREQ |
433 | int "Set the core clock frequency" | |
15c2ca4e GU |
434 | default "25000000" if M5206 |
435 | default "54000000" if M5206e | |
436 | default "166666666" if M520x | |
437 | default "140000000" if M5249 | |
438 | default "150000000" if M527x || M523x | |
439 | default "90000000" if M5307 | |
440 | default "50000000" if M5407 | |
441 | default "266000000" if M54xx | |
0e152d80 | 442 | default "66666666" |
d9ee4896 | 443 | depends on COLDFIRE |
0e152d80 GU |
444 | help |
445 | Define the CPU clock frequency in use. This is the core clock | |
446 | frequency, it may or may not be the same as the external clock | |
447 | crystal fitted to your board. Some processors have an internal | |
448 | PLL and can have their frequency programmed at run time, others | |
449 | use internal dividers. In general the kernel won't setup a PLL | |
450 | if it is fitted (there are some exceptions). This value will be | |
451 | specific to the exact CPU that you are using. | |
452 | ||
453 | config OLDMASK | |
454 | bool "Old mask 5307 (1H55J) silicon" | |
455 | depends on M5307 | |
456 | help | |
457 | Build support for the older revision ColdFire 5307 silicon. | |
458 | Specifically this is the 1H55J mask revision. | |
459 | ||
460 | if HAVE_CACHE_SPLIT | |
461 | choice | |
462 | prompt "Split Cache Configuration" | |
463 | default CACHE_I | |
464 | ||
465 | config CACHE_I | |
466 | bool "Instruction" | |
467 | help | |
468 | Use all of the ColdFire CPU cache memory as an instruction cache. | |
469 | ||
470 | config CACHE_D | |
471 | bool "Data" | |
472 | help | |
473 | Use all of the ColdFire CPU cache memory as a data cache. | |
474 | ||
475 | config CACHE_BOTH | |
476 | bool "Both" | |
477 | help | |
478 | Split the ColdFire CPU cache, and use half as an instruction cache | |
479 | and half as a data cache. | |
480 | endchoice | |
481 | endif | |
482 | ||
483 | if HAVE_CACHE_CB | |
484 | choice | |
485 | prompt "Data cache mode" | |
486 | default CACHE_WRITETHRU | |
487 | ||
488 | config CACHE_WRITETHRU | |
489 | bool "Write-through" | |
490 | help | |
491 | The ColdFire CPU cache is set into Write-through mode. | |
492 | ||
493 | config CACHE_COPYBACK | |
494 | bool "Copy-back" | |
495 | help | |
496 | The ColdFire CPU cache is set into Copy-back mode. | |
497 | endchoice | |
498 | endif | |
499 |