projects / mirror_ubuntu-artful-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | config FPU |
| 2 | bool | |
| 3 | default n | |
| 4 | ||
| af39bb8b | 5 | config GENERIC_GPIO |
| 6 | bool | |
| 7 | default n | |
| 8 | ||
| 95469bd6 SS |
9 | config GENERIC_CMOS_UPDATE |
| 10 | bool | |
| 11 | default y | |
| 12 | ||
| 2b9a6986 SS |
13 | config GENERIC_CLOCKEVENTS |
| 14 | bool | |
| 15 | default n | |
| 16 | ||
| 62356725 GU |
17 | config M68000 |
| 18 | bool | |
| 171d809d | 19 | select CPU_HAS_NO_BITFIELDS |
| 62356725 GU |
20 | help |
| 21 | The Freescale (was Motorola) 68000 CPU is the first generation of | |
| 22 | the well known M68K family of processors. The CPU core as well as | |
| 23 | being available as a stand alone CPU was also used in many | |
| 24 | System-On-Chip devices (eg 68328, 68302, etc). It does not contain | |
| 25 | a paging MMU. | |
| 26 | ||
| 27 | config MCPU32 | |
| 28 | bool | |
| 171d809d | 29 | select CPU_HAS_NO_BITFIELDS |
| 62356725 GU |
30 | help |
| 31 | The Freescale (was then Motorola) CPU32 is a CPU core that is | |
| 32 | based on the 68020 processor. For the most part it is used in | |
| 33 | System-On-Chip parts, and does not contain a paging MMU. | |
| 34 | ||
| 35 | config COLDFIRE | |
| 36 | bool | |
| 37 | select GENERIC_GPIO | |
| 38 | select ARCH_REQUIRE_GPIOLIB | |
| 171d809d | 39 | select CPU_HAS_NO_BITFIELDS |
| 62356725 GU |
40 | help |
| 41 | The Freescale ColdFire family of processors is a modern derivitive | |
| 42 | of the 68000 processor family. They are mainly targeted at embedded | |
| 43 | applications, and are all System-On-Chip (SOC) devices, as opposed | |
| 44 | to stand alone CPUs. They implement a subset of the original 68000 | |
| 45 | processor instruction set. | |
| 46 | ||
| 1c83af5f GU |
47 | config COLDFIRE_SW_A7 |
| 48 | bool | |
| 49 | default n | |
| 50 | ||
| 0ef6c9b8 GU |
51 | config HAVE_CACHE_SPLIT |
| 52 | bool | |
| 53 | ||
| 4a5bae41 GU |
54 | config HAVE_CACHE_CB |
| 55 | bool | |
| 56 | ||
| d4852a34 GU |
57 | config HAVE_MBAR |
| 58 | bool | |
| 59 | ||
| 60 | config HAVE_IPSBAR | |
| 61 | bool | |
| 62 | ||
| 1da177e4 LT |
63 | choice |
| 64 | prompt "CPU" | |
| 65 | default M68EZ328 | |
| 66 | ||
| 67 | config M68328 | |
| 68 | bool "MC68328" | |
| 62356725 | 69 | select M68000 |
| 1da177e4 LT |
70 | help |
| 71 | Motorola 68328 processor support. | |
| 72 | ||
| 73 | config M68EZ328 | |
| 74 | bool "MC68EZ328" | |
| 62356725 | 75 | select M68000 |
| 1da177e4 LT |
76 | help |
| 77 | Motorola 68EX328 processor support. | |
| 78 | ||
| 79 | config M68VZ328 | |
| 80 | bool "MC68VZ328" | |
| 62356725 | 81 | select M68000 |
| 1da177e4 LT |
82 | help |
| 83 | Motorola 68VZ328 processor support. | |
| 84 | ||
| 85 | config M68360 | |
| 86 | bool "MC68360" | |
| 62356725 | 87 | select MCPU32 |
| 1da177e4 LT |
88 | help |
| 89 | Motorola 68360 processor support. | |
| 90 | ||
| 91 | config M5206 | |
| 92 | bool "MCF5206" | |
| 62356725 | 93 | select COLDFIRE |
| 1c83af5f | 94 | select COLDFIRE_SW_A7 |
| d4852a34 | 95 | select HAVE_MBAR |
| 1da177e4 LT |
96 | help |
| 97 | Motorola ColdFire 5206 processor support. | |
| 98 | ||
| 99 | config M5206e | |
| 100 | bool "MCF5206e" | |
| 62356725 | 101 | select COLDFIRE |
| 1c83af5f | 102 | select COLDFIRE_SW_A7 |
| d4852a34 | 103 | select HAVE_MBAR |
| 1da177e4 LT |
104 | help |
| 105 | Motorola ColdFire 5206e processor support. | |
| 106 | ||
| 4e51f674 GU |
107 | config M520x |
| 108 | bool "MCF520x" | |
| 62356725 | 109 | select COLDFIRE |
| 2b9a6986 | 110 | select GENERIC_CLOCKEVENTS |
| 0ef6c9b8 | 111 | select HAVE_CACHE_SPLIT |
| 4e51f674 GU |
112 | help |
| 113 | Freescale Coldfire 5207/5208 processor support. | |
| 114 | ||
| 5c4dbba9 GU |
115 | config M523x |
| 116 | bool "MCF523x" | |
| 62356725 | 117 | select COLDFIRE |
| 2b9a6986 | 118 | select GENERIC_CLOCKEVENTS |
| 0ef6c9b8 | 119 | select HAVE_CACHE_SPLIT |
| d4852a34 | 120 | select HAVE_IPSBAR |
| 5c4dbba9 GU |
121 | help |
| 122 | Freescale Coldfire 5230/1/2/4/5 processor support | |
| 123 | ||
| 1da177e4 LT |
124 | config M5249 |
| 125 | bool "MCF5249" | |
| 62356725 | 126 | select COLDFIRE |
| 1c83af5f | 127 | select COLDFIRE_SW_A7 |
| d4852a34 | 128 | select HAVE_MBAR |
| 1da177e4 LT |
129 | help |
| 130 | Motorola ColdFire 5249 processor support. | |
| 131 | ||
| 5c4dbba9 GU |
132 | config M5271 |
| 133 | bool "MCF5271" | |
| 62356725 | 134 | select COLDFIRE |
| 0ef6c9b8 | 135 | select HAVE_CACHE_SPLIT |
| d4852a34 | 136 | select HAVE_IPSBAR |
| 1da177e4 | 137 | help |
| 5c4dbba9 | 138 | Freescale (Motorola) ColdFire 5270/5271 processor support. |
| 1da177e4 LT |
139 | |
| 140 | config M5272 | |
| 141 | bool "MCF5272" | |
| 62356725 | 142 | select COLDFIRE |
| 1c83af5f | 143 | select COLDFIRE_SW_A7 |
| d4852a34 | 144 | select HAVE_MBAR |
| 1da177e4 LT |
145 | help |
| 146 | Motorola ColdFire 5272 processor support. | |
| 147 | ||
| 5c4dbba9 GU |
148 | config M5275 |
| 149 | bool "MCF5275" | |
| 62356725 | 150 | select COLDFIRE |
| 0ef6c9b8 | 151 | select HAVE_CACHE_SPLIT |
| d4852a34 | 152 | select HAVE_IPSBAR |
| 5c4dbba9 GU |
153 | help |
| 154 | Freescale (Motorola) ColdFire 5274/5275 processor support. | |
| 155 | ||
| 1da177e4 LT |
156 | config M528x |
| 157 | bool "MCF528x" | |
| 62356725 | 158 | select COLDFIRE |
| 2b9a6986 | 159 | select GENERIC_CLOCKEVENTS |
| 0ef6c9b8 | 160 | select HAVE_CACHE_SPLIT |
| d4852a34 | 161 | select HAVE_IPSBAR |
| 1da177e4 LT |
162 | help |
| 163 | Motorola ColdFire 5280/5282 processor support. | |
| 164 | ||
| 165 | config M5307 | |
| 166 | bool "MCF5307" | |
| 62356725 | 167 | select COLDFIRE |
| 1c83af5f | 168 | select COLDFIRE_SW_A7 |
| 4a5bae41 | 169 | select HAVE_CACHE_CB |
| d4852a34 | 170 | select HAVE_MBAR |
| 1da177e4 LT |
171 | help |
| 172 | Motorola ColdFire 5307 processor support. | |
| 173 | ||
| 5d36f8eb GU |
174 | config M532x |
| 175 | bool "MCF532x" | |
| 62356725 | 176 | select COLDFIRE |
| 4a5bae41 | 177 | select HAVE_CACHE_CB |
| 5d36f8eb GU |
178 | help |
| 179 | Freescale (Motorola) ColdFire 532x processor support. | |
| 180 | ||
| 1da177e4 LT |
181 | config M5407 |
| 182 | bool "MCF5407" | |
| 62356725 | 183 | select COLDFIRE |
| 1c83af5f | 184 | select COLDFIRE_SW_A7 |
| 4a5bae41 | 185 | select HAVE_CACHE_CB |
| d4852a34 | 186 | select HAVE_MBAR |
| 1da177e4 LT |
187 | help |
| 188 | Motorola ColdFire 5407 processor support. | |
| 189 | ||
| 9e29949c GU |
190 | config M547x |
| 191 | bool "MCF547x" | |
| 62356725 | 192 | select COLDFIRE |
| 4a5bae41 | 193 | select HAVE_CACHE_CB |
| d4852a34 | 194 | select HAVE_MBAR |
| 9e29949c GU |
195 | help |
| 196 | Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. | |
| 197 | ||
| ea49f8ff PDM |
198 | config M548x |
| 199 | bool "MCF548x" | |
| 62356725 | 200 | select COLDFIRE |
| 4a5bae41 | 201 | select HAVE_CACHE_CB |
| d4852a34 | 202 | select HAVE_MBAR |
| ea49f8ff PDM |
203 | help |
| 204 | Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. | |
| 205 | ||
| 1da177e4 LT |
206 | endchoice |
| 207 | ||
| 5c4dbba9 GU |
208 | config M527x |
| 209 | bool | |
| 210 | depends on (M5271 || M5275) | |
| 2b9a6986 | 211 | select GENERIC_CLOCKEVENTS |
| 5c4dbba9 GU |
212 | default y |
| 213 | ||
| 5b2e6555 GU |
214 | config M54xx |
| 215 | bool | |
| 9e29949c | 216 | depends on (M548x || M547x) |
| 5b2e6555 GU |
217 | default y |
| 218 | ||
| e648cd26 GU |
219 | config CLOCK_SET |
| 220 | bool "Enable setting the CPU clock frequency" | |
| 221 | default n | |
| 1da177e4 | 222 | help |
| e648cd26 GU |
223 | On some CPU's you do not need to know what the core CPU clock |
| 224 | frequency is. On these you can disable clock setting. On some | |
| 225 | traditional 68K parts, and on all ColdFire parts you need to set | |
| 226 | the appropriate CPU clock frequency. On these devices many of the | |
| 227 | onboard peripherals derive their timing from the master CPU clock | |
| 228 | frequency. | |
| 229 | ||
| 230 | config CLOCK_FREQ | |
| 231 | int "Set the core clock frequency" | |
| 232 | default "66666666" | |
| 233 | depends on CLOCK_SET | |
| 234 | help | |
| 235 | Define the CPU clock frequency in use. This is the core clock | |
| 236 | frequency, it may or may not be the same as the external clock | |
| 237 | crystal fitted to your board. Some processors have an internal | |
| 238 | PLL and can have their frequency programmed at run time, others | |
| 44c09201 ML |
239 | use internal dividers. In general the kernel won't setup a PLL |
| 240 | if it is fitted (there are some exceptions). This value will be | |
| e648cd26 GU |
241 | specific to the exact CPU that you are using. |
| 242 | ||
| 1da177e4 LT |
243 | config OLDMASK |
| 244 | bool "Old mask 5307 (1H55J) silicon" | |
| 245 | depends on M5307 | |
| 246 | help | |
| 247 | Build support for the older revision ColdFire 5307 silicon. | |
| 248 | Specifically this is the 1H55J mask revision. | |
| 249 | ||
| 0ef6c9b8 GU |
250 | if HAVE_CACHE_SPLIT |
| 251 | choice | |
| 252 | prompt "Split Cache Configuration" | |
| 253 | default CACHE_I | |
| 254 | ||
| 255 | config CACHE_I | |
| 256 | bool "Instruction" | |
| 257 | help | |
| 258 | Use all of the ColdFire CPU cache memory as an instruction cache. | |
| 259 | ||
| 260 | config CACHE_D | |
| 261 | bool "Data" | |
| 262 | help | |
| 263 | Use all of the ColdFire CPU cache memory as a data cache. | |
| 264 | ||
| 265 | config CACHE_BOTH | |
| 266 | bool "Both" | |
| 267 | help | |
| 268 | Split the ColdFire CPU cache, and use half as an instruction cache | |
| 269 | and half as a data cache. | |
| 270 | endchoice | |
| 4a5bae41 GU |
271 | endif |
| 272 | ||
| 273 | if HAVE_CACHE_CB | |
| 274 | choice | |
| 275 | prompt "Data cache mode" | |
| 276 | default CACHE_WRITETHRU | |
| 0ef6c9b8 | 277 | |
| 4a5bae41 GU |
278 | config CACHE_WRITETHRU |
| 279 | bool "Write-through" | |
| 280 | help | |
| 281 | The ColdFire CPU cache is set into Write-through mode. | |
| 282 | ||
| 283 | config CACHE_COPYBACK | |
| 284 | bool "Copy-back" | |
| 285 | help | |
| 286 | The ColdFire CPU cache is set into Copy-back mode. | |
| 287 | endchoice | |
| 0ef6c9b8 GU |
288 | endif |
| 289 | ||
| 1da177e4 LT |
290 | comment "Platform" |
| 291 | ||
| 292 | config PILOT3 | |
| 293 | bool "Pilot 1000/5000, PalmPilot Personal/Pro, or PalmIII support" | |
| 294 | depends on M68328 | |
| 295 | help | |
| 296 | Support for the Palm Pilot 1000/5000, Personal/Pro and PalmIII. | |
| 297 | ||
| 298 | config XCOPILOT_BUGS | |
| 6869e940 | 299 | bool "(X)Copilot support" |
| 1da177e4 LT |
300 | depends on PILOT3 |
| 301 | help | |
| 302 | Support the bugs of Xcopilot. | |
| 303 | ||
| 36995223 | 304 | config UC5272 |
| 0a977ca3 PDM |
305 | bool 'Arcturus Networks uC5272 dimm board support' |
| 306 | depends on M5272 | |
| 307 | help | |
| 308 | Support for the Arcturus Networks uC5272 dimm board. | |
| 36995223 DW |
309 | |
| 310 | config UC5282 | |
| 0a977ca3 PDM |
311 | bool "Arcturus Networks uC5282 board support" |
| 312 | depends on M528x | |
| 313 | help | |
| 314 | Support for the Arcturus Networks uC5282 dimm board. | |
| 36995223 | 315 | |
| 1da177e4 LT |
316 | config UCSIMM |
| 317 | bool "uCsimm module support" | |
| 318 | depends on M68EZ328 | |
| 319 | help | |
| 320 | Support for the Arcturus Networks uCsimm module. | |
| 321 | ||
| 322 | config UCDIMM | |
| 323 | bool "uDsimm module support" | |
| 324 | depends on M68VZ328 | |
| 325 | help | |
| 326 | Support for the Arcturus Networks uDsimm module. | |
| 327 | ||
| 328 | config DRAGEN2 | |
| 329 | bool "DragenEngine II board support" | |
| 330 | depends on M68VZ328 | |
| 331 | help | |
| 332 | Support for the DragenEngine II board. | |
| 333 | ||
| 334 | config DIRECT_IO_ACCESS | |
| 6869e940 | 335 | bool "Allow user to access IO directly" |
| 1da177e4 LT |
336 | depends on (UCSIMM || UCDIMM || DRAGEN2) |
| 337 | help | |
| 338 | Disable the CPU internal registers protection in user mode, | |
| 0a977ca3 | 339 | to allow a user application to read/write them. |
| 1da177e4 LT |
340 | |
| 341 | config INIT_LCD | |
| 6869e940 | 342 | bool "Initialize LCD" |
| 1da177e4 LT |
343 | depends on (UCSIMM || UCDIMM || DRAGEN2) |
| 344 | help | |
| 345 | Initialize the LCD controller of the 68x328 processor. | |
| 346 | ||
| 347 | config MEMORY_RESERVE | |
| 6869e940 | 348 | int "Memory reservation (MiB)" |
| 1da177e4 LT |
349 | depends on (UCSIMM || UCDIMM) |
| 350 | help | |
| 351 | Reserve certain memory regions on 68x328 based boards. | |
| 352 | ||
| 353 | config UCQUICC | |
| 354 | bool "Lineo uCquicc board support" | |
| 355 | depends on M68360 | |
| 356 | help | |
| 357 | Support for the Lineo uCquicc board. | |
| 358 | ||
| 359 | config ARN5206 | |
| 360 | bool "Arnewsh 5206 board support" | |
| 361 | depends on M5206 | |
| 362 | help | |
| 363 | Support for the Arnewsh 5206 board. | |
| 364 | ||
| 365 | config M5206eC3 | |
| 366 | bool "Motorola M5206eC3 board support" | |
| 367 | depends on M5206e | |
| 368 | help | |
| 369 | Support for the Motorola M5206eC3 board. | |
| 370 | ||
| 371 | config ELITE | |
| 372 | bool "Motorola M5206eLITE board support" | |
| 373 | depends on M5206e | |
| 374 | help | |
| 375 | Support for the Motorola M5206eLITE board. | |
| 376 | ||
| 4e51f674 GU |
377 | config M5208EVB |
| 378 | bool "Freescale M5208EVB board support" | |
| 379 | depends on M520x | |
| 380 | help | |
| 381 | Support for the Freescale Coldfire M5208EVB. | |
| 382 | ||
| 5c4dbba9 GU |
383 | config M5235EVB |
| 384 | bool "Freescale M5235EVB support" | |
| 385 | depends on M523x | |
| 386 | help | |
| 387 | Support for the Freescale M5235EVB board. | |
| 388 | ||
| 1da177e4 LT |
389 | config M5249C3 |
| 390 | bool "Motorola M5249C3 board support" | |
| 391 | depends on M5249 | |
| 392 | help | |
| 393 | Support for the Motorola M5249C3 board. | |
| 394 | ||
| 395 | config M5271EVB | |
| 396 | bool "Freescale (Motorola) M5271EVB board support" | |
| 5c4dbba9 | 397 | depends on M5271 |
| 1da177e4 LT |
398 | help |
| 399 | Support for the Freescale (Motorola) M5271EVB board. | |
| 400 | ||
| 401 | config M5275EVB | |
| 402 | bool "Freescale (Motorola) M5275EVB board support" | |
| 5c4dbba9 | 403 | depends on M5275 |
| 1da177e4 LT |
404 | help |
| 405 | Support for the Freescale (Motorola) M5275EVB board. | |
| 406 | ||
| 407 | config M5272C3 | |
| 408 | bool "Motorola M5272C3 board support" | |
| 409 | depends on M5272 | |
| 410 | help | |
| 411 | Support for the Motorola M5272C3 board. | |
| 412 | ||
| 413 | config COBRA5272 | |
| 414 | bool "senTec COBRA5272 board support" | |
| 415 | depends on M5272 | |
| 416 | help | |
| 417 | Support for the senTec COBRA5272 board. | |
| 418 | ||
| 04860bd2 GU |
419 | config AVNET5282 |
| 420 | bool "Avnet 5282 board support" | |
| 421 | depends on M528x | |
| 422 | help | |
| 423 | Support for the Avnet 5282 board. | |
| 424 | ||
| 1da177e4 LT |
425 | config M5282EVB |
| 426 | bool "Motorola M5282EVB board support" | |
| 427 | depends on M528x | |
| 428 | help | |
| 429 | Support for the Motorola M5282EVB board. | |
| 430 | ||
| 431 | config COBRA5282 | |
| 432 | bool "senTec COBRA5282 board support" | |
| 433 | depends on M528x | |
| 434 | help | |
| 435 | Support for the senTec COBRA5282 board. | |
| 5c4dbba9 GU |
436 | |
| 437 | config SOM5282EM | |
| 438 | bool "EMAC.Inc SOM5282EM board support" | |
| 439 | depends on M528x | |
| 440 | help | |
| 441 | Support for the EMAC.Inc SOM5282EM module. | |
| 906a2621 GU |
442 | |
| 443 | config WILDFIRE | |
| 444 | bool "Intec Automation Inc. WildFire board support" | |
| 445 | depends on M528x | |
| 446 | help | |
| 447 | Support for the Intec Automation Inc. WildFire. | |
| 448 | ||
| 449 | config WILDFIREMOD | |
| 450 | bool "Intec Automation Inc. WildFire module support" | |
| 451 | depends on M528x | |
| 452 | help | |
| 453 | Support for the Intec Automation Inc. WildFire module. | |
| 1da177e4 LT |
454 | |
| 455 | config ARN5307 | |
| 456 | bool "Arnewsh 5307 board support" | |
| 457 | depends on M5307 | |
| 458 | help | |
| 459 | Support for the Arnewsh 5307 board. | |
| 460 | ||
| 461 | config M5307C3 | |
| 462 | bool "Motorola M5307C3 board support" | |
| 463 | depends on M5307 | |
| 464 | help | |
| 465 | Support for the Motorola M5307C3 board. | |
| 466 | ||
| 1da177e4 LT |
467 | config SECUREEDGEMP3 |
| 468 | bool "SnapGear SecureEdge/MP3 platform support" | |
| 469 | depends on M5307 | |
| 470 | help | |
| 471 | Support for the SnapGear SecureEdge/MP3 platform. | |
| 472 | ||
| 5d36f8eb GU |
473 | config M5329EVB |
| 474 | bool "Freescale (Motorola) M5329EVB board support" | |
| 475 | depends on M532x | |
| 476 | help | |
| 477 | Support for the Freescale (Motorola) M5329EVB board. | |
| 478 | ||
| 479 | config COBRA5329 | |
| 480 | bool "senTec COBRA5329 board support" | |
| 481 | depends on M532x | |
| 482 | help | |
| 483 | Support for the senTec COBRA5329 board. | |
| 484 | ||
| 1da177e4 LT |
485 | config M5407C3 |
| 486 | bool "Motorola M5407C3 board support" | |
| 487 | depends on M5407 | |
| 488 | help | |
| 489 | Support for the Motorola M5407C3 board. | |
| 490 | ||
| 7badfabb GU |
491 | config FIREBEE |
| 492 | bool "FireBee board support" | |
| 493 | depends on M547x | |
| 494 | help | |
| 495 | Support for the FireBee ColdFire 5475 based board. | |
| 496 | ||
| 1da177e4 LT |
497 | config CLEOPATRA |
| 498 | bool "Feith CLEOPATRA board support" | |
| 499 | depends on (M5307 || M5407) | |
| 500 | help | |
| 501 | Support for the Feith Cleopatra boards. | |
| 502 | ||
| 503 | config CANCam | |
| 504 | bool "Feith CANCam board support" | |
| 505 | depends on M5272 | |
| 506 | help | |
| 507 | Support for the Feith CANCam board. | |
| 508 | ||
| 509 | config SCALES | |
| 510 | bool "Feith SCALES board support" | |
| 511 | depends on M5272 | |
| 512 | help | |
| 513 | Support for the Feith SCALES board. | |
| 514 | ||
| 515 | config NETtel | |
| 516 | bool "SecureEdge/NETtel board support" | |
| 517 | depends on (M5206e || M5272 || M5307) | |
| 518 | help | |
| 519 | Support for the SnapGear NETtel/SecureEdge/SnapGear boards. | |
| 520 | ||
| 521 | config SNAPGEAR | |
| 522 | bool "SnapGear router board support" | |
| 523 | depends on NETtel | |
| 524 | help | |
| 525 | Special additional support for SnapGear router boards. | |
| 526 | ||
| 527 | config CPU16B | |
| 528 | bool "Sneha Technologies S.L. Sarasvati board support" | |
| 529 | depends on M5272 | |
| 530 | help | |
| 531 | Support for the SNEHA CPU16B board. | |
| 532 | ||
| 5c4dbba9 GU |
533 | config MOD5272 |
| 534 | bool "Netburner MOD-5272 board support" | |
| 535 | depends on M5272 | |
| 536 | help | |
| 537 | Support for the Netburner MOD-5272 board. | |
| 538 | ||
| c1057c65 WC |
539 | config SAVANTrosie1 |
| 540 | bool "Savant Rosie1 board support" | |
| 541 | depends on M523x | |
| 542 | help | |
| 543 | Support for the Savant Rosie1 board. | |
| 544 | ||
| 1da177e4 | 545 | config ROMFS_FROM_ROM |
| 6869e940 | 546 | bool "ROMFS image not RAM resident" |
| 1da177e4 LT |
547 | depends on (NETtel || SNAPGEAR) |
| 548 | help | |
| 549 | The ROMfs filesystem will stay resident in the FLASH/ROM, not be | |
| 550 | moved into RAM. | |
| 551 | ||
| 552 | config PILOT | |
| 553 | bool | |
| 554 | default y | |
| 555 | depends on (PILOT3 || PILOT5) | |
| 556 | ||
| 557 | config ARNEWSH | |
| 558 | bool | |
| 559 | default y | |
| 560 | depends on (ARN5206 || ARN5307) | |
| 561 | ||
| 4e51f674 | 562 | config FREESCALE |
| 1da177e4 LT |
563 | bool |
| 564 | default y | |
| 5d36f8eb | 565 | depends on (M5206eC3 || M5208EVB || M5235EVB || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5329EVB || M5407C3) |
| 1da177e4 LT |
566 | |
| 567 | config HW_FEITH | |
| 568 | bool | |
| 569 | default y | |
| 570 | depends on (CLEOPATRA || CANCam || SCALES) | |
| 571 | ||
| 572 | config senTec | |
| 573 | bool | |
| 574 | default y | |
| 575 | depends on (COBRA5272 || COBRA5282) | |
| 5c4dbba9 GU |
576 | |
| 577 | config EMAC_INC | |
| 578 | bool | |
| 579 | default y | |
| 580 | depends on (SOM5282EM) | |
| 1da177e4 LT |
581 | |
| 582 | config SNEHA | |
| 0a977ca3 | 583 | bool |
| 1da177e4 LT |
584 | default y |
| 585 | depends on CPU16B | |
| c1057c65 WC |
586 | |
| 587 | config SAVANT | |
| 588 | bool | |
| 589 | default y | |
| 590 | depends on SAVANTrosie1 | |
| 591 | ||
| 04860bd2 GU |
592 | config AVNET |
| 593 | bool | |
| 594 | default y | |
| 595 | depends on (AVNET5282) | |
| 1da177e4 | 596 | |
| 588baeac LS |
597 | config UBOOT |
| 598 | bool "Support for U-Boot command line parameters" | |
| 599 | help | |
| 600 | If you say Y here kernel will try to collect command | |
| 601 | line parameters from the initial u-boot stack. | |
| 602 | default n | |
| 603 | ||
| 5c4dbba9 GU |
604 | config 4KSTACKS |
| 605 | bool "Use 4Kb for kernel stacks instead of 8Kb" | |
| 606 | default y | |
| 607 | help | |
| 608 | If you say Y here the kernel will use a 4Kb stacksize for the | |
| 609 | kernel stack attached to each process/thread. This facilitates | |
| 610 | running more threads on a system and also reduces the pressure | |
| 611 | on the VM subsystem for higher order allocations. | |
| 612 | ||
| 63e413d1 GU |
613 | comment "RAM configuration" |
| 614 | ||
| 615 | config RAMBASE | |
| 616 | hex "Address of the base of RAM" | |
| 617 | default "0" | |
| 618 | help | |
| 619 | Define the address that RAM starts at. On many platforms this is | |
| 620 | 0, the base of the address space. And this is the default. Some | |
| 621 | platforms choose to setup their RAM at other addresses within the | |
| 622 | processor address space. | |
| 623 | ||
| 624 | config RAMSIZE | |
| 73a9983e | 625 | hex "Size of RAM (in bytes), or 0 for automatic" |
| 63e413d1 GU |
626 | default "0x400000" |
| 627 | help | |
| 628 | Define the size of the system RAM. If you select 0 then the | |
| 629 | kernel will try to probe the RAM size at runtime. This is not | |
| 630 | supported on all CPU types. | |
| 631 | ||
| 632 | config VECTORBASE | |
| 633 | hex "Address of the base of system vectors" | |
| 634 | default "0" | |
| 635 | help | |
| 4b3f686d | 636 | Define the address of the system vectors. Commonly this is |
| 63e413d1 GU |
637 | put at the start of RAM, but it doesn't have to be. On ColdFire |
| 638 | platforms this address is programmed into the VBR register, thus | |
| 639 | actually setting the address to use. | |
| 640 | ||
| d4852a34 GU |
641 | config MBAR |
| 642 | hex "Address of the MBAR (internal peripherals)" | |
| 643 | default "0x10000000" | |
| 644 | depends on HAVE_MBAR | |
| 645 | help | |
| 646 | Define the address of the internal system peripherals. This value | |
| 647 | is set in the processors MBAR register. This is generally setup by | |
| 648 | the boot loader, and will not be written by the kernel. By far most | |
| 649 | ColdFire boards use the default 0x10000000 value, so if unsure then | |
| 650 | use this. | |
| 651 | ||
| 652 | config IPSBAR | |
| 653 | hex "Address of the IPSBAR (internal peripherals)" | |
| 654 | default "0x40000000" | |
| 655 | depends on HAVE_IPSBAR | |
| 656 | help | |
| 657 | Define the address of the internal system peripherals. This value | |
| 658 | is set in the processors IPSBAR register. This is generally setup by | |
| 659 | the boot loader, and will not be written by the kernel. By far most | |
| 660 | ColdFire boards use the default 0x40000000 value, so if unsure then | |
| 661 | use this. | |
| 662 | ||
| 63e413d1 GU |
663 | config KERNELBASE |
| 664 | hex "Address of the base of kernel code" | |
| 665 | default "0x400" | |
| 666 | help | |
| 667 | Typically on m68k systems the kernel will not start at the base | |
| 668 | of RAM, but usually some small offset from it. Define the start | |
| 669 | address of the kernel here. The most common setup will have the | |
| 670 | processor vectors at the base of RAM and then the start of the | |
| 671 | kernel. On some platforms some RAM is reserved for boot loaders | |
| 672 | and the kernel starts after that. The 0x400 default was based on | |
| 673 | a system with the RAM based at address 0, and leaving enough room | |
| 674 | for the theoretical maximum number of 256 vectors. | |
| 1da177e4 LT |
675 | |
| 676 | choice | |
| 677 | prompt "RAM bus width" | |
| 678 | default RAMAUTOBIT | |
| 679 | ||
| 680 | config RAMAUTOBIT | |
| 681 | bool "AUTO" | |
| 63e413d1 | 682 | help |
| 1da177e4 LT |
683 | Select the physical RAM data bus size. Not needed on most platforms, |
| 684 | so you can generally choose AUTO. | |
| 685 | ||
| 686 | config RAM8BIT | |
| 687 | bool "8bit" | |
| 688 | help | |
| 689 | Configure RAM bus to be 8 bits wide. | |
| 690 | ||
| 691 | config RAM16BIT | |
| 692 | bool "16bit" | |
| 693 | help | |
| 694 | Configure RAM bus to be 16 bits wide. | |
| 695 | ||
| 696 | config RAM32BIT | |
| 697 | bool "32bit" | |
| 698 | help | |
| 699 | Configure RAM bus to be 32 bits wide. | |
| 700 | ||
| 701 | endchoice | |
| 702 | ||
| c750a012 GU |
703 | comment "ROM configuration" |
| 704 | ||
| 705 | config ROM | |
| 706 | bool "Specify ROM linker regions" | |
| 707 | default n | |
| 708 | help | |
| 709 | Define a ROM region for the linker script. This creates a kernel | |
| 710 | that can be stored in flash, with possibly the text, and data | |
| 711 | regions being copied out to RAM at startup. | |
| 712 | ||
| 713 | config ROMBASE | |
| 714 | hex "Address of the base of ROM device" | |
| 715 | default "0" | |
| 716 | depends on ROM | |
| 717 | help | |
| 718 | Define the address that the ROM region starts at. Some platforms | |
| 719 | use this to set their chip select region accordingly for the boot | |
| 720 | device. | |
| 721 | ||
| 722 | config ROMVEC | |
| 723 | hex "Address of the base of the ROM vectors" | |
| 724 | default "0" | |
| 725 | depends on ROM | |
| 726 | help | |
| 727 | This is almost always the same as the base of the ROM. Since on all | |
| 3cb2fccc | 728 | 68000 type variants the vectors are at the base of the boot device |
| c750a012 GU |
729 | on system startup. |
| 730 | ||
| 731 | config ROMVECSIZE | |
| 732 | hex "Size of ROM vector region (in bytes)" | |
| 733 | default "0x400" | |
| 734 | depends on ROM | |
| 735 | help | |
| 736 | Define the size of the vector region in ROM. For most 68000 | |
| 3cb2fccc | 737 | variants this would be 0x400 bytes in size. Set to 0 if you do |
| c750a012 GU |
738 | not want a vector region at the start of the ROM. |
| 739 | ||
| 740 | config ROMSTART | |
| 741 | hex "Address of the base of system image in ROM" | |
| 742 | default "0x400" | |
| 743 | depends on ROM | |
| 744 | help | |
| 745 | Define the start address of the system image in ROM. Commonly this | |
| 746 | is strait after the ROM vectors. | |
| 747 | ||
| 748 | config ROMSIZE | |
| 749 | hex "Size of the ROM device" | |
| 750 | default "0x100000" | |
| 751 | depends on ROM | |
| 752 | help | |
| 753 | Size of the ROM device. On some platforms this is used to setup | |
| 754 | the chip select that controls the boot ROM device. | |
| 755 | ||
| 1da177e4 LT |
756 | choice |
| 757 | prompt "Kernel executes from" | |
| 758 | ---help--- | |
| 759 | Choose the memory type that the kernel will be running in. | |
| 760 | ||
| 761 | config RAMKERNEL | |
| 762 | bool "RAM" | |
| 763 | help | |
| 764 | The kernel will be resident in RAM when running. | |
| 765 | ||
| 766 | config ROMKERNEL | |
| 767 | bool "ROM" | |
| 768 | help | |
| 63e413d1 GU |
769 | The kernel will be resident in FLASH/ROM when running. This is |
| 770 | often referred to as Execute-in-Place (XIP), since the kernel | |
| 771 | code executes from the position it is stored in the FLASH/ROM. | |
| 1da177e4 LT |
772 | |
| 773 | endchoice | |
| 774 | ||
| 78f508ab SS |
775 | if COLDFIRE |
| 776 | source "kernel/Kconfig.preempt" | |
| 777 | endif | |
| 2b9a6986 SS |
778 | |
| 779 | source "kernel/time/Kconfig" | |
| 780 | ||
| 5cae841b AV |
781 | config ISA_DMA_API |
| 782 | bool | |
| 783 | depends on !M5272 | |
| 784 | default y | |
| 785 | ||
| 1da177e4 LT |
786 | source "drivers/pcmcia/Kconfig" |
| 787 |