[mirror_ubuntu-focal-kernel.git] / arch / m68k / coldfire / clk.c

// SPDX-License-Identifier: GPL-2.0
/***************************************************************************/

/*
 *	clk.c -- general ColdFire CPU kernel clk handling
 *
 *	Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com)
 */

/***************************************************************************/

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/mutex.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/err.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfclk.h>

static DEFINE_SPINLOCK(clk_lock);

#ifdef MCFPM_PPMCR0
/*
 *	For more advanced ColdFire parts that have clocks that can be enabled
 *	we supply enable/disable functions. These must properly define their
 *	clocks in their platform specific code.
 */
void __clk_init_enabled(struct clk *clk)
{
	clk->enabled = 1;
	clk->clk_ops->enable(clk);
}

void __clk_init_disabled(struct clk *clk)
{
	clk->enabled = 0;
	clk->clk_ops->disable(clk);
}

static void __clk_enable0(struct clk *clk)
{
	__raw_writeb(clk->slot, MCFPM_PPMCR0);
}

static void __clk_disable0(struct clk *clk)
{
	__raw_writeb(clk->slot, MCFPM_PPMSR0);
}

struct clk_ops clk_ops0 = {
	.enable		= __clk_enable0,
	.disable	= __clk_disable0,
};

#ifdef MCFPM_PPMCR1
static void __clk_enable1(struct clk *clk)
{
	__raw_writeb(clk->slot, MCFPM_PPMCR1);
}

static void __clk_disable1(struct clk *clk)
{
	__raw_writeb(clk->slot, MCFPM_PPMSR1);
}

struct clk_ops clk_ops1 = {
	.enable		= __clk_enable1,
	.disable	= __clk_disable1,
};
#endif /* MCFPM_PPMCR1 */
#endif /* MCFPM_PPMCR0 */

struct clk *clk_get(struct device *dev, const char *id)
{
	const char *clk_name = dev ? dev_name(dev) : id ? id : NULL;
	struct clk *clk;
	unsigned i;

	for (i = 0; (clk = mcf_clks[i]) != NULL; ++i)
		if (!strcmp(clk->name, clk_name))
			return clk;
	pr_warn("clk_get: didn't find clock %s\n", clk_name);
	return ERR_PTR(-ENOENT);
}
EXPORT_SYMBOL(clk_get);

int clk_enable(struct clk *clk)
{
	unsigned long flags;
	spin_lock_irqsave(&clk_lock, flags);
	if ((clk->enabled++ == 0) && clk->clk_ops)
		clk->clk_ops->enable(clk);
	spin_unlock_irqrestore(&clk_lock, flags);

	return 0;
}
EXPORT_SYMBOL(clk_enable);

void clk_disable(struct clk *clk)
{
	unsigned long flags;

	if (!clk)
		return;

	spin_lock_irqsave(&clk_lock, flags);
	if ((--clk->enabled == 0) && clk->clk_ops)
		clk->clk_ops->disable(clk);
	spin_unlock_irqrestore(&clk_lock, flags);
}
EXPORT_SYMBOL(clk_disable);

void clk_put(struct clk *clk)
{
	if (clk->enabled != 0)
		pr_warn("clk_put %s still enabled\n", clk->name);
}
EXPORT_SYMBOL(clk_put);

unsigned long clk_get_rate(struct clk *clk)
{
	if (!clk)
		return 0;

	return clk->rate;
}
EXPORT_SYMBOL(clk_get_rate);

/***************************************************************************/
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
facdf0ed GU	2	/***************************************************************************/
	3
	4	/*
	5	* clk.c -- general ColdFire CPU kernel clk handling
	6	*
	7	* Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com)
	8	*/
	9
	10	/***************************************************************************/
	11
	12	#include <linux/kernel.h>
96c61242	13	#include <linux/module.h>
bea8bcb1 SK	14	#include <linux/platform_device.h>
bea8bcb1 SK	15	#include <linux/mutex.h>
facdf0ed	16	#include <linux/clk.h>
bea8bcb1 SK	17	#include <linux/io.h>
bea8bcb1 SK	18	#include <linux/err.h>
facdf0ed	19	#include <asm/coldfire.h>
bea8bcb1 SK	20	#include <asm/mcfsim.h>
bea8bcb1 SK	21	#include <asm/mcfclk.h>
facdf0ed	22
280ef31a GU	23	static DEFINE_SPINLOCK(clk_lock);
	24
	25	#ifdef MCFPM_PPMCR0
	26	/*
	27	* For more advanced ColdFire parts that have clocks that can be enabled
	28	* we supply enable/disable functions. These must properly define their
	29	* clocks in their platform specific code.
	30	*/
	31	void __clk_init_enabled(struct clk *clk)
facdf0ed	32	{
280ef31a GU	33	clk->enabled = 1;
280ef31a GU	34	clk->clk_ops->enable(clk);
facdf0ed GU	35	}
facdf0ed GU	36
280ef31a	37	void __clk_init_disabled(struct clk *clk)
facdf0ed	38	{
280ef31a GU	39	clk->enabled = 0;
280ef31a GU	40	clk->clk_ops->disable(clk);
facdf0ed GU	41	}
facdf0ed GU	42
280ef31a	43	static void __clk_enable0(struct clk *clk)
facdf0ed	44	{
280ef31a	45	__raw_writeb(clk->slot, MCFPM_PPMCR0);
facdf0ed GU	46	}
facdf0ed GU	47
280ef31a GU	48	static void __clk_disable0(struct clk *clk)
	49	{
	50	__raw_writeb(clk->slot, MCFPM_PPMSR0);
	51	}
	52
	53	struct clk_ops clk_ops0 = {
	54	.enable = __clk_enable0,
	55	.disable = __clk_disable0,
	56	};
	57
	58	#ifdef MCFPM_PPMCR1
	59	static void __clk_enable1(struct clk *clk)
facdf0ed	60	{
280ef31a	61	__raw_writeb(clk->slot, MCFPM_PPMCR1);
facdf0ed GU	62	}
facdf0ed GU	63
280ef31a	64	static void __clk_disable1(struct clk *clk)
facdf0ed	65	{
280ef31a	66	__raw_writeb(clk->slot, MCFPM_PPMSR1);
facdf0ed	67	}
280ef31a GU	68
	69	struct clk_ops clk_ops1 = {
	70	.enable = __clk_enable1,
	71	.disable = __clk_disable1,
	72	};
	73	#endif /* MCFPM_PPMCR1 */
	74	#endif /* MCFPM_PPMCR0 */
bea8bcb1 SK	75
	76	struct clk clk_get(struct device dev, const char *id)
	77	{
	78	const char *clk_name = dev ? dev_name(dev) : id ? id : NULL;
	79	struct clk *clk;
	80	unsigned i;
	81
	82	for (i = 0; (clk = mcf_clks[i]) != NULL; ++i)
	83	if (!strcmp(clk->name, clk_name))
	84	return clk;
	85	pr_warn("clk_get: didn't find clock %s\n", clk_name);
	86	return ERR_PTR(-ENOENT);
	87	}
	88	EXPORT_SYMBOL(clk_get);
	89
	90	int clk_enable(struct clk *clk)
	91	{
	92	unsigned long flags;
	93	spin_lock_irqsave(&clk_lock, flags);
	94	if ((clk->enabled++ == 0) && clk->clk_ops)
	95	clk->clk_ops->enable(clk);
	96	spin_unlock_irqrestore(&clk_lock, flags);
	97
	98	return 0;
	99	}
	100	EXPORT_SYMBOL(clk_enable);
	101
	102	void clk_disable(struct clk *clk)
	103	{
	104	unsigned long flags;
742859ad MY	105
	106	if (!clk)
	107	return;
	108
bea8bcb1 SK	109	spin_lock_irqsave(&clk_lock, flags);
	110	if ((--clk->enabled == 0) && clk->clk_ops)
	111	clk->clk_ops->disable(clk);
	112	spin_unlock_irqrestore(&clk_lock, flags);
	113	}
	114	EXPORT_SYMBOL(clk_disable);
	115
	116	void clk_put(struct clk *clk)
	117	{
	118	if (clk->enabled != 0)
	119	pr_warn("clk_put %s still enabled\n", clk->name);
	120	}
	121	EXPORT_SYMBOL(clk_put);
	122
	123	unsigned long clk_get_rate(struct clk *clk)
	124	{
94b28226 JG	125	if (!clk)
	126	return 0;
	127
bea8bcb1 SK	128	return clk->rate;
	129	}
	130	EXPORT_SYMBOL(clk_get_rate);
	131
facdf0ed	132	/***************************************************************************/