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1 | /****************************************************************************/ |
2 | ||
3 | /* | |
4 | * nettel.h -- Lineo (formerly Moreton Bay) NETtel support. | |
5 | * | |
6 | * (C) Copyright 1999-2000, Moreton Bay (www.moretonbay.com) | |
7 | * (C) Copyright 2000-2001, Lineo Inc. (www.lineo.com) | |
8 | * (C) Copyright 2001-2002, SnapGear Inc., (www.snapgear.com) | |
9 | */ | |
10 | ||
11 | /****************************************************************************/ | |
12 | #ifndef nettel_h | |
13 | #define nettel_h | |
14 | /****************************************************************************/ | |
15 | ||
1da177e4 LT |
16 | |
17 | /****************************************************************************/ | |
18 | #ifdef CONFIG_NETtel | |
19 | /****************************************************************************/ | |
20 | ||
21 | #ifdef CONFIG_COLDFIRE | |
22 | #include <asm/coldfire.h> | |
23 | #include <asm/mcfsim.h> | |
4fb62ede | 24 | #include <asm/io.h> |
1da177e4 LT |
25 | #endif |
26 | ||
27 | /*---------------------------------------------------------------------------*/ | |
28 | #if defined(CONFIG_M5307) | |
29 | /* | |
30 | * NETtel/5307 based hardware first. DTR/DCD lines are wired to | |
31 | * GPIO lines. Most of the LED's are driver through a latch | |
32 | * connected to CS2. | |
33 | */ | |
34 | #define MCFPP_DCD1 0x0001 | |
35 | #define MCFPP_DCD0 0x0002 | |
36 | #define MCFPP_DTR1 0x0004 | |
37 | #define MCFPP_DTR0 0x0008 | |
38 | ||
39 | #define NETtel_LEDADDR 0x30400000 | |
40 | ||
41 | #ifndef __ASSEMBLY__ | |
42 | ||
43 | extern volatile unsigned short ppdata; | |
44 | ||
45 | /* | |
46 | * These functions defined to give quasi generic access to the | |
47 | * PPIO bits used for DTR/DCD. | |
48 | */ | |
49 | static __inline__ unsigned int mcf_getppdata(void) | |
50 | { | |
51 | volatile unsigned short *pp; | |
732c611e | 52 | pp = (volatile unsigned short *) MCFSIM_PADAT; |
1da177e4 LT |
53 | return((unsigned int) *pp); |
54 | } | |
55 | ||
56 | static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits) | |
57 | { | |
58 | volatile unsigned short *pp; | |
732c611e | 59 | pp = (volatile unsigned short *) MCFSIM_PADAT; |
1da177e4 LT |
60 | ppdata = (ppdata & ~mask) | bits; |
61 | *pp = ppdata; | |
62 | } | |
63 | #endif | |
64 | ||
65 | /*---------------------------------------------------------------------------*/ | |
66 | #elif defined(CONFIG_M5206e) | |
67 | /* | |
68 | * NETtel/5206e based hardware has leds on latch on CS3. | |
69 | * No support modem for lines?? | |
70 | */ | |
71 | #define NETtel_LEDADDR 0x50000000 | |
72 | ||
73 | /*---------------------------------------------------------------------------*/ | |
74 | #elif defined(CONFIG_M5272) | |
75 | /* | |
76 | * NETtel/5272 based hardware. DTR/DCD lines are wired to GPB lines. | |
77 | */ | |
78 | #define MCFPP_DCD0 0x0080 | |
79 | #define MCFPP_DCD1 0x0000 /* Port 1 no DCD support */ | |
80 | #define MCFPP_DTR0 0x0040 | |
81 | #define MCFPP_DTR1 0x0000 /* Port 1 no DTR support */ | |
82 | ||
83 | #ifndef __ASSEMBLY__ | |
84 | /* | |
85 | * These functions defined to give quasi generic access to the | |
86 | * PPIO bits used for DTR/DCD. | |
87 | */ | |
88 | static __inline__ unsigned int mcf_getppdata(void) | |
89 | { | |
4fb62ede | 90 | return readw(MCFSIM_PBDAT); |
1da177e4 LT |
91 | } |
92 | ||
93 | static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits) | |
94 | { | |
4fb62ede | 95 | write((readw(MCFSIM_PBDAT) & ~mask) | bits, MCFSIM_PBDAT); |
1da177e4 LT |
96 | } |
97 | #endif | |
98 | ||
99 | #endif | |
100 | /*---------------------------------------------------------------------------*/ | |
101 | ||
102 | /****************************************************************************/ | |
103 | #endif /* CONFIG_NETtel */ | |
104 | /****************************************************************************/ | |
105 | #endif /* nettel_h */ |