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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 LT |
2 | /* |
3 | * 6522 Versatile Interface Adapter (VIA) | |
4 | * | |
0c79cf6a | 5 | * There are two of these on the Mac II. Some IRQs are vectored |
1da177e4 LT |
6 | * via them as are assorted bits and bobs - eg RTC, ADB. |
7 | * | |
8 | * CSA: Motorola seems to have removed documentation on the 6522 from | |
9 | * their web site; try | |
10 | * http://nerini.drf.com/vectrex/other/text/chips/6522/ | |
11 | * http://www.zymurgy.net/classic/vic20/vicdet1.htm | |
12 | * and | |
13 | * http://193.23.168.87/mikro_laborversuche/via_iobaustein/via6522_1.html | |
14 | * for info. A full-text web search on 6522 AND VIA will probably also | |
15 | * net some usefulness. <cananian@alumni.princeton.edu> 20apr1999 | |
16 | * | |
67dfb153 FT |
17 | * Additional data is here (the SY6522 was used in the Mac II etc): |
18 | * http://www.6502.org/documents/datasheets/synertek/synertek_sy6522.pdf | |
19 | * http://www.6502.org/documents/datasheets/synertek/synertek_sy6522_programming_reference.pdf | |
20 | * | |
1da177e4 LT |
21 | * PRAM/RTC access algorithms are from the NetBSD RTC toolkit version 1.08b |
22 | * by Erik Vogan and adapted to Linux by Joshua M. Thompson (funaho@jurai.org) | |
23 | * | |
24 | */ | |
25 | ||
481fa139 | 26 | #include <linux/clocksource.h> |
1da177e4 LT |
27 | #include <linux/types.h> |
28 | #include <linux/kernel.h> | |
29 | #include <linux/mm.h> | |
30 | #include <linux/delay.h> | |
31 | #include <linux/init.h> | |
deea7775 | 32 | #include <linux/module.h> |
ddc7fd25 | 33 | #include <linux/irq.h> |
1da177e4 | 34 | |
1da177e4 LT |
35 | #include <asm/macintosh.h> |
36 | #include <asm/macints.h> | |
1da177e4 LT |
37 | #include <asm/mac_via.h> |
38 | #include <asm/mac_psc.h> | |
c85627fb | 39 | #include <asm/mac_oss.h> |
1da177e4 LT |
40 | |
41 | volatile __u8 *via1, *via2; | |
deea7775 AB |
42 | int rbv_present; |
43 | int via_alt_mapping; | |
44 | EXPORT_SYMBOL(via_alt_mapping); | |
8dfbdf4a | 45 | static __u8 rbv_clear; |
1da177e4 LT |
46 | |
47 | /* | |
48 | * Globals for accessing the VIA chip registers without having to | |
49 | * check if we're hitting a real VIA or an RBV. Normally you could | |
50 | * just hit the combined register (ie, vIER|rIER) but that seems to | |
51 | * break on AV Macs...probably because they actually decode more than | |
52 | * eight address bits. Why can't Apple engineers at least be | |
53 | * _consistently_ lazy? - 1999-05-21 (jmt) | |
54 | */ | |
55 | ||
56 | static int gIER,gIFR,gBufA,gBufB; | |
57 | ||
c4af5da7 FT |
58 | /* |
59 | * On Macs with a genuine VIA chip there is no way to mask an individual slot | |
60 | * interrupt. This limitation also seems to apply to VIA clone logic cores in | |
61 | * Quadra-like ASICs. (RBV and OSS machines don't have this limitation.) | |
62 | * | |
efbec135 | 63 | * We used to fake it by configuring the relevant VIA pin as an output |
c4af5da7 FT |
64 | * (to mask the interrupt) or input (to unmask). That scheme did not work on |
65 | * (at least) the Quadra 700. A NuBus card's /NMRQ signal is an open-collector | |
66 | * circuit (see Designing Cards and Drivers for Macintosh II and Macintosh SE, | |
67 | * p. 10-11 etc) but VIA outputs are not (see datasheet). | |
68 | * | |
69 | * Driving these outputs high must cause the VIA to source current and the | |
70 | * card to sink current when it asserts /NMRQ. Current will flow but the pin | |
71 | * voltage is uncertain and so the /NMRQ condition may still cause a transition | |
72 | * at the VIA2 CA1 input (which explains the lost interrupts). A side effect | |
73 | * is that a disabled slot IRQ can never be tested as pending or not. | |
74 | * | |
75 | * Driving these outputs low doesn't work either. All the slot /NMRQ lines are | |
76 | * (active low) OR'd together to generate the CA1 (aka "SLOTS") interrupt (see | |
77 | * The Guide To Macintosh Family Hardware, 2nd edition p. 167). If we drive a | |
78 | * disabled /NMRQ line low, the falling edge immediately triggers a CA1 | |
79 | * interrupt and all slot interrupts after that will generate no transition | |
80 | * and therefore no interrupt, even after being re-enabled. | |
81 | * | |
82 | * So we make the VIA port A I/O lines inputs and use nubus_disabled to keep | |
83 | * track of their states. When any slot IRQ becomes disabled we mask the CA1 | |
84 | * umbrella interrupt. Only when all slot IRQs become enabled do we unmask | |
85 | * the CA1 interrupt. It must remain enabled even when cards have no interrupt | |
86 | * handler registered. Drivers must therefore disable a slot interrupt at the | |
87 | * device before they call free_irq (like shared and autovector interrupts). | |
88 | * | |
89 | * There is also a related problem when MacOS is used to boot Linux. A network | |
90 | * card brought up by a MacOS driver may raise an interrupt while Linux boots. | |
91 | * This can be fatal since it can't be handled until the right driver loads | |
92 | * (if such a driver exists at all). Apparently related to this hardware | |
93 | * limitation, "Designing Cards and Drivers", p. 9-8, says that a slot | |
94 | * interrupt with no driver would crash MacOS (the book was written before | |
95 | * the appearance of Macs with RBV or OSS). | |
cd713ddc | 96 | */ |
c4af5da7 | 97 | |
cd713ddc | 98 | static u8 nubus_disabled; |
1da177e4 LT |
99 | |
100 | void via_debug_dump(void); | |
8ee90c5c | 101 | static void via_nubus_init(void); |
1da177e4 | 102 | |
1da177e4 LT |
103 | /* |
104 | * Initialize the VIAs | |
105 | * | |
106 | * First we figure out where they actually _are_ as well as what type of | |
107 | * VIA we have for VIA2 (it could be a real VIA or an RBV or even an OSS.) | |
108 | * Then we pretty much clear them out and disable all IRQ sources. | |
1da177e4 LT |
109 | */ |
110 | ||
111 | void __init via_init(void) | |
112 | { | |
0e37a23e FT |
113 | via1 = (void *)VIA1_BASE; |
114 | pr_debug("VIA1 detected at %p\n", via1); | |
115 | ||
7a0bb442 FT |
116 | if (oss_present) { |
117 | via2 = NULL; | |
118 | rbv_present = 0; | |
119 | } else { | |
120 | switch (macintosh_config->via_type) { | |
1da177e4 LT |
121 | |
122 | /* IIci, IIsi, IIvx, IIvi (P6xx), LC series */ | |
123 | ||
608e287b | 124 | case MAC_VIA_IICI: |
7a0bb442 FT |
125 | via2 = (void *)RBV_BASE; |
126 | pr_debug("VIA2 (RBV) detected at %p\n", via2); | |
127 | rbv_present = 1; | |
1da177e4 LT |
128 | if (macintosh_config->ident == MAC_MODEL_LCIII) { |
129 | rbv_clear = 0x00; | |
130 | } else { | |
131 | /* on most RBVs (& unlike the VIAs), you */ | |
132 | /* need to set bit 7 when you write to IFR */ | |
133 | /* in order for your clear to occur. */ | |
134 | rbv_clear = 0x80; | |
135 | } | |
136 | gIER = rIER; | |
137 | gIFR = rIFR; | |
138 | gBufA = rSIFR; | |
139 | gBufB = rBufB; | |
140 | break; | |
141 | ||
142 | /* Quadra and early MacIIs agree on the VIA locations */ | |
143 | ||
144 | case MAC_VIA_QUADRA: | |
145 | case MAC_VIA_II: | |
1da177e4 | 146 | via2 = (void *) VIA2_BASE; |
0e37a23e | 147 | pr_debug("VIA2 detected at %p\n", via2); |
1da177e4 | 148 | rbv_present = 0; |
1da177e4 LT |
149 | rbv_clear = 0x00; |
150 | gIER = vIER; | |
151 | gIFR = vIFR; | |
152 | gBufA = vBufA; | |
153 | gBufB = vBufB; | |
154 | break; | |
7a0bb442 | 155 | |
1da177e4 LT |
156 | default: |
157 | panic("UNKNOWN VIA TYPE"); | |
7a0bb442 | 158 | } |
1da177e4 LT |
159 | } |
160 | ||
161 | #ifdef DEBUG_VIA | |
162 | via_debug_dump(); | |
163 | #endif | |
164 | ||
165 | /* | |
166 | * Shut down all IRQ sources, reset the timers, and | |
167 | * kill the timer latch on VIA1. | |
168 | */ | |
169 | ||
170 | via1[vIER] = 0x7F; | |
171 | via1[vIFR] = 0x7F; | |
172 | via1[vT1LL] = 0; | |
173 | via1[vT1LH] = 0; | |
174 | via1[vT1CL] = 0; | |
175 | via1[vT1CH] = 0; | |
176 | via1[vT2CL] = 0; | |
177 | via1[vT2CH] = 0; | |
4a973592 | 178 | via1[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */ |
67dfb153 | 179 | via1[vACR] &= ~0x03; /* disable port A & B latches */ |
1da177e4 LT |
180 | |
181 | /* | |
182 | * SE/30: disable video IRQ | |
1da177e4 LT |
183 | */ |
184 | ||
185 | if (macintosh_config->ident == MAC_MODEL_SE30) { | |
186 | via1[vDirB] |= 0x40; | |
187 | via1[vBufB] |= 0x40; | |
188 | } | |
189 | ||
6a93207b FT |
190 | switch (macintosh_config->adb_type) { |
191 | case MAC_ADB_IOP: | |
192 | case MAC_ADB_II: | |
193 | case MAC_ADB_PB1: | |
194 | /* | |
195 | * Set the RTC bits to a known state: all lines to outputs and | |
196 | * RTC disabled (yes that's 0 to enable and 1 to disable). | |
197 | */ | |
198 | via1[vDirB] |= VIA1B_vRTCEnb | VIA1B_vRTCClk | VIA1B_vRTCData; | |
199 | via1[vBufB] |= VIA1B_vRTCEnb | VIA1B_vRTCClk; | |
200 | break; | |
201 | } | |
1da177e4 LT |
202 | |
203 | /* Everything below this point is VIA2/RBV only... */ | |
204 | ||
4a973592 FT |
205 | if (oss_present) |
206 | return; | |
1da177e4 | 207 | |
8d9f014a FT |
208 | if ((macintosh_config->via_type == MAC_VIA_QUADRA) && |
209 | (macintosh_config->adb_type != MAC_ADB_PB1) && | |
210 | (macintosh_config->adb_type != MAC_ADB_PB2) && | |
211 | (macintosh_config->ident != MAC_MODEL_C660) && | |
212 | (macintosh_config->ident != MAC_MODEL_Q840)) { | |
213 | via_alt_mapping = 1; | |
214 | via1[vDirB] |= 0x40; | |
215 | via1[vBufB] &= ~0x40; | |
216 | } else { | |
217 | via_alt_mapping = 0; | |
218 | } | |
1da177e4 LT |
219 | |
220 | /* | |
221 | * Now initialize VIA2. For RBV we just kill all interrupts; | |
222 | * for a regular VIA we also reset the timers and stuff. | |
223 | */ | |
224 | ||
225 | via2[gIER] = 0x7F; | |
226 | via2[gIFR] = 0x7F | rbv_clear; | |
227 | if (!rbv_present) { | |
228 | via2[vT1LL] = 0; | |
229 | via2[vT1LH] = 0; | |
230 | via2[vT1CL] = 0; | |
231 | via2[vT1CH] = 0; | |
232 | via2[vT2CL] = 0; | |
233 | via2[vT2CH] = 0; | |
4a973592 | 234 | via2[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */ |
67dfb153 FT |
235 | via2[vACR] &= ~0x03; /* disable port A & B latches */ |
236 | } | |
237 | ||
8ee90c5c FT |
238 | via_nubus_init(); |
239 | ||
aa8a9fbe FT |
240 | /* Everything below this point is VIA2 only... */ |
241 | ||
242 | if (rbv_present) | |
243 | return; | |
244 | ||
67dfb153 | 245 | /* |
aa8a9fbe FT |
246 | * Set vPCR for control line interrupts. |
247 | * | |
248 | * CA1 (SLOTS IRQ), CB1 (ASC IRQ): negative edge trigger. | |
249 | * | |
250 | * Macs with ESP SCSI have a negative edge triggered SCSI interrupt. | |
251 | * Testing reveals that PowerBooks do too. However, the SE/30 | |
252 | * schematic diagram shows an active high NCR5380 IRQ line. | |
67dfb153 | 253 | */ |
aa8a9fbe FT |
254 | |
255 | pr_debug("VIA2 vPCR is 0x%02X\n", via2[vPCR]); | |
256 | if (macintosh_config->via_type == MAC_VIA_II) { | |
257 | /* CA2 (SCSI DRQ), CB2 (SCSI IRQ): indep. input, pos. edge */ | |
258 | via2[vPCR] = 0x66; | |
259 | } else { | |
260 | /* CA2 (SCSI DRQ), CB2 (SCSI IRQ): indep. input, neg. edge */ | |
261 | via2[vPCR] = 0x22; | |
1da177e4 LT |
262 | } |
263 | } | |
264 | ||
1da177e4 LT |
265 | /* |
266 | * Debugging dump, used in various places to see what's going on. | |
267 | */ | |
268 | ||
269 | void via_debug_dump(void) | |
270 | { | |
271 | printk(KERN_DEBUG "VIA1: DDRA = 0x%02X DDRB = 0x%02X ACR = 0x%02X\n", | |
272 | (uint) via1[vDirA], (uint) via1[vDirB], (uint) via1[vACR]); | |
273 | printk(KERN_DEBUG " PCR = 0x%02X IFR = 0x%02X IER = 0x%02X\n", | |
274 | (uint) via1[vPCR], (uint) via1[vIFR], (uint) via1[vIER]); | |
7a0bb442 FT |
275 | if (!via2) |
276 | return; | |
277 | if (rbv_present) { | |
1da177e4 LT |
278 | printk(KERN_DEBUG "VIA2: IFR = 0x%02X IER = 0x%02X\n", |
279 | (uint) via2[rIFR], (uint) via2[rIER]); | |
280 | printk(KERN_DEBUG " SIFR = 0x%02X SIER = 0x%02X\n", | |
281 | (uint) via2[rSIFR], (uint) via2[rSIER]); | |
282 | } else { | |
283 | printk(KERN_DEBUG "VIA2: DDRA = 0x%02X DDRB = 0x%02X ACR = 0x%02X\n", | |
284 | (uint) via2[vDirA], (uint) via2[vDirB], | |
285 | (uint) via2[vACR]); | |
286 | printk(KERN_DEBUG " PCR = 0x%02X IFR = 0x%02X IER = 0x%02X\n", | |
287 | (uint) via2[vPCR], | |
288 | (uint) via2[vIFR], (uint) via2[vIER]); | |
289 | } | |
290 | } | |
291 | ||
1da177e4 LT |
292 | /* |
293 | * Flush the L2 cache on Macs that have it by flipping | |
294 | * the system into 24-bit mode for an instant. | |
295 | */ | |
296 | ||
bcc44f6b | 297 | void via_l2_flush(int writeback) |
1da177e4 | 298 | { |
bcc44f6b FT |
299 | unsigned long flags; |
300 | ||
301 | local_irq_save(flags); | |
1da177e4 LT |
302 | via2[gBufB] &= ~VIA2B_vMode32; |
303 | via2[gBufB] |= VIA2B_vMode32; | |
bcc44f6b | 304 | local_irq_restore(flags); |
1da177e4 LT |
305 | } |
306 | ||
307 | /* | |
308 | * Return the status of the L2 cache on a IIci | |
309 | */ | |
310 | ||
311 | int via_get_cache_disable(void) | |
312 | { | |
313 | /* Safeguard against being called accidentally */ | |
314 | if (!via2) { | |
315 | printk(KERN_ERR "via_get_cache_disable called on a non-VIA machine!\n"); | |
316 | return 1; | |
317 | } | |
318 | ||
319 | return (int) via2[gBufB] & VIA2B_vCDis; | |
320 | } | |
321 | ||
322 | /* | |
323 | * Initialize VIA2 for Nubus access | |
324 | */ | |
325 | ||
8ee90c5c | 326 | static void __init via_nubus_init(void) |
1da177e4 | 327 | { |
1da177e4 LT |
328 | /* unlock nubus transactions */ |
329 | ||
67dfb153 FT |
330 | if ((macintosh_config->adb_type != MAC_ADB_PB1) && |
331 | (macintosh_config->adb_type != MAC_ADB_PB2)) { | |
1da177e4 | 332 | /* set the line to be an output on non-RBV machines */ |
67dfb153 | 333 | if (!rbv_present) |
1da177e4 | 334 | via2[vDirB] |= 0x02; |
1da177e4 | 335 | |
67dfb153 FT |
336 | /* this seems to be an ADB bit on PMU machines */ |
337 | /* according to MkLinux. -- jmt */ | |
1da177e4 LT |
338 | via2[gBufB] |= 0x02; |
339 | } | |
340 | ||
c4af5da7 FT |
341 | /* |
342 | * Disable the slot interrupts. On some hardware that's not possible. | |
343 | * On some hardware it's unclear what all of these I/O lines do. | |
344 | */ | |
cd713ddc FT |
345 | |
346 | switch (macintosh_config->via_type) { | |
347 | case MAC_VIA_II: | |
c4af5da7 FT |
348 | case MAC_VIA_QUADRA: |
349 | pr_debug("VIA2 vDirA is 0x%02X\n", via2[vDirA]); | |
cd713ddc | 350 | break; |
608e287b | 351 | case MAC_VIA_IICI: |
cd713ddc | 352 | /* RBV. Disable all the slot interrupts. SIER works like IER. */ |
1da177e4 | 353 | via2[rSIER] = 0x7F; |
cd713ddc | 354 | break; |
c4af5da7 FT |
355 | } |
356 | } | |
357 | ||
358 | void via_nubus_irq_startup(int irq) | |
359 | { | |
360 | int irq_idx = IRQ_IDX(irq); | |
361 | ||
362 | switch (macintosh_config->via_type) { | |
363 | case MAC_VIA_II: | |
cd713ddc | 364 | case MAC_VIA_QUADRA: |
c4af5da7 FT |
365 | /* Make the port A line an input. Probably redundant. */ |
366 | if (macintosh_config->via_type == MAC_VIA_II) { | |
367 | /* The top two bits are RAM size outputs. */ | |
368 | via2[vDirA] &= 0xC0 | ~(1 << irq_idx); | |
369 | } else { | |
370 | /* Allow NuBus slots 9 through F. */ | |
371 | via2[vDirA] &= 0x80 | ~(1 << irq_idx); | |
1da177e4 | 372 | } |
c4af5da7 | 373 | /* fall through */ |
608e287b | 374 | case MAC_VIA_IICI: |
c4af5da7 FT |
375 | via_irq_enable(irq); |
376 | break; | |
377 | } | |
378 | } | |
379 | ||
380 | void via_nubus_irq_shutdown(int irq) | |
381 | { | |
382 | switch (macintosh_config->via_type) { | |
383 | case MAC_VIA_II: | |
384 | case MAC_VIA_QUADRA: | |
385 | /* Ensure that the umbrella CA1 interrupt remains enabled. */ | |
386 | via_irq_enable(irq); | |
387 | break; | |
608e287b | 388 | case MAC_VIA_IICI: |
c4af5da7 | 389 | via_irq_disable(irq); |
cd713ddc | 390 | break; |
1da177e4 LT |
391 | } |
392 | } | |
393 | ||
394 | /* | |
395 | * The generic VIA interrupt routines (shamelessly stolen from Alan Cox's | |
396 | * via6522.c :-), disable/pending masks added. | |
1da177e4 LT |
397 | */ |
398 | ||
1efdd4bd FT |
399 | #define VIA_TIMER_1_INT BIT(6) |
400 | ||
bd0b9ac4 | 401 | void via1_irq(struct irq_desc *desc) |
9145db56 GU |
402 | { |
403 | int irq_num; | |
404 | unsigned char irq_bit, events; | |
405 | ||
406 | events = via1[vIFR] & via1[vIER] & 0x7F; | |
407 | if (!events) | |
408 | return; | |
409 | ||
1efdd4bd FT |
410 | irq_num = IRQ_MAC_TIMER_1; |
411 | irq_bit = VIA_TIMER_1_INT; | |
412 | if (events & irq_bit) { | |
413 | unsigned long flags; | |
414 | ||
415 | local_irq_save(flags); | |
416 | via1[vIFR] = irq_bit; | |
417 | generic_handle_irq(irq_num); | |
418 | local_irq_restore(flags); | |
419 | ||
420 | events &= ~irq_bit; | |
421 | if (!events) | |
422 | return; | |
423 | } | |
424 | ||
9145db56 GU |
425 | irq_num = VIA1_SOURCE_BASE; |
426 | irq_bit = 1; | |
427 | do { | |
428 | if (events & irq_bit) { | |
429 | via1[vIFR] = irq_bit; | |
430 | generic_handle_irq(irq_num); | |
431 | } | |
432 | ++irq_num; | |
433 | irq_bit <<= 1; | |
434 | } while (events >= irq_bit); | |
435 | } | |
436 | ||
bd0b9ac4 | 437 | static void via2_irq(struct irq_desc *desc) |
9145db56 GU |
438 | { |
439 | int irq_num; | |
440 | unsigned char irq_bit, events; | |
441 | ||
442 | events = via2[gIFR] & via2[gIER] & 0x7F; | |
443 | if (!events) | |
444 | return; | |
445 | ||
446 | irq_num = VIA2_SOURCE_BASE; | |
447 | irq_bit = 1; | |
448 | do { | |
449 | if (events & irq_bit) { | |
450 | via2[gIFR] = irq_bit | rbv_clear; | |
451 | generic_handle_irq(irq_num); | |
452 | } | |
453 | ++irq_num; | |
454 | irq_bit <<= 1; | |
455 | } while (events >= irq_bit); | |
456 | } | |
1da177e4 LT |
457 | |
458 | /* | |
459 | * Dispatch Nubus interrupts. We are called as a secondary dispatch by the | |
460 | * VIA2 dispatcher as a fast interrupt handler. | |
461 | */ | |
462 | ||
bd0b9ac4 | 463 | static void via_nubus_irq(struct irq_desc *desc) |
9145db56 GU |
464 | { |
465 | int slot_irq; | |
466 | unsigned char slot_bit, events; | |
467 | ||
468 | events = ~via2[gBufA] & 0x7F; | |
469 | if (rbv_present) | |
470 | events &= via2[rSIER]; | |
471 | else | |
472 | events &= ~via2[vDirA]; | |
473 | if (!events) | |
474 | return; | |
475 | ||
476 | do { | |
477 | slot_irq = IRQ_NUBUS_F; | |
478 | slot_bit = 0x40; | |
479 | do { | |
480 | if (events & slot_bit) { | |
481 | events &= ~slot_bit; | |
482 | generic_handle_irq(slot_irq); | |
483 | } | |
484 | --slot_irq; | |
485 | slot_bit >>= 1; | |
486 | } while (events); | |
487 | ||
488 | /* clear the CA1 interrupt and make certain there's no more. */ | |
489 | via2[gIFR] = 0x02 | rbv_clear; | |
490 | events = ~via2[gBufA] & 0x7F; | |
491 | if (rbv_present) | |
492 | events &= via2[rSIER]; | |
493 | else | |
494 | events &= ~via2[vDirA]; | |
495 | } while (events); | |
496 | } | |
9145db56 GU |
497 | |
498 | /* | |
499 | * Register the interrupt dispatchers for VIA or RBV machines only. | |
500 | */ | |
501 | ||
502 | void __init via_register_interrupts(void) | |
503 | { | |
9145db56 GU |
504 | if (via_alt_mapping) { |
505 | /* software interrupt */ | |
506 | irq_set_chained_handler(IRQ_AUTO_1, via1_irq); | |
507 | /* via1 interrupt */ | |
508 | irq_set_chained_handler(IRQ_AUTO_6, via1_irq); | |
509 | } else { | |
510 | irq_set_chained_handler(IRQ_AUTO_1, via1_irq); | |
511 | } | |
512 | irq_set_chained_handler(IRQ_AUTO_2, via2_irq); | |
513 | irq_set_chained_handler(IRQ_MAC_NUBUS, via_nubus_irq); | |
9145db56 | 514 | } |
1da177e4 LT |
515 | |
516 | void via_irq_enable(int irq) { | |
517 | int irq_src = IRQ_SRC(irq); | |
518 | int irq_idx = IRQ_IDX(irq); | |
1da177e4 | 519 | |
1da177e4 | 520 | if (irq_src == 1) { |
cd713ddc | 521 | via1[vIER] = IER_SET_BIT(irq_idx); |
1da177e4 | 522 | } else if (irq_src == 2) { |
cd713ddc FT |
523 | if (irq != IRQ_MAC_NUBUS || nubus_disabled == 0) |
524 | via2[gIER] = IER_SET_BIT(irq_idx); | |
1da177e4 | 525 | } else if (irq_src == 7) { |
cd713ddc FT |
526 | switch (macintosh_config->via_type) { |
527 | case MAC_VIA_II: | |
c4af5da7 | 528 | case MAC_VIA_QUADRA: |
cd713ddc FT |
529 | nubus_disabled &= ~(1 << irq_idx); |
530 | /* Enable the CA1 interrupt when no slot is disabled. */ | |
531 | if (!nubus_disabled) | |
532 | via2[gIER] = IER_SET_BIT(1); | |
533 | break; | |
608e287b | 534 | case MAC_VIA_IICI: |
cd713ddc FT |
535 | /* On RBV, enable the slot interrupt. |
536 | * SIER works like IER. | |
537 | */ | |
1da177e4 | 538 | via2[rSIER] = IER_SET_BIT(irq_idx); |
cd713ddc | 539 | break; |
1da177e4 | 540 | } |
1da177e4 LT |
541 | } |
542 | } | |
543 | ||
544 | void via_irq_disable(int irq) { | |
545 | int irq_src = IRQ_SRC(irq); | |
546 | int irq_idx = IRQ_IDX(irq); | |
1da177e4 | 547 | |
1da177e4 | 548 | if (irq_src == 1) { |
cd713ddc | 549 | via1[vIER] = IER_CLR_BIT(irq_idx); |
1da177e4 | 550 | } else if (irq_src == 2) { |
cd713ddc | 551 | via2[gIER] = IER_CLR_BIT(irq_idx); |
1da177e4 | 552 | } else if (irq_src == 7) { |
cd713ddc FT |
553 | switch (macintosh_config->via_type) { |
554 | case MAC_VIA_II: | |
c4af5da7 | 555 | case MAC_VIA_QUADRA: |
cd713ddc FT |
556 | nubus_disabled |= 1 << irq_idx; |
557 | if (nubus_disabled) | |
558 | via2[gIER] = IER_CLR_BIT(1); | |
559 | break; | |
608e287b | 560 | case MAC_VIA_IICI: |
1da177e4 | 561 | via2[rSIER] = IER_CLR_BIT(irq_idx); |
cd713ddc | 562 | break; |
1da177e4 | 563 | } |
1da177e4 LT |
564 | } |
565 | } | |
566 | ||
8852ecd9 LV |
567 | void via1_set_head(int head) |
568 | { | |
569 | if (head == 0) | |
570 | via1[vBufA] &= ~VIA1A_vHeadSel; | |
571 | else | |
572 | via1[vBufA] |= VIA1A_vHeadSel; | |
573 | } | |
574 | EXPORT_SYMBOL(via1_set_head); | |
30c0527d FT |
575 | |
576 | int via2_scsi_drq_pending(void) | |
577 | { | |
578 | return via2[gIFR] & (1 << IRQ_IDX(IRQ_MAC_SCSIDRQ)); | |
579 | } | |
580 | EXPORT_SYMBOL(via2_scsi_drq_pending); | |
0ca7ce7d FT |
581 | |
582 | /* timer and clock source */ | |
583 | ||
584 | #define VIA_CLOCK_FREQ 783360 /* VIA "phase 2" clock in Hz */ | |
0ca7ce7d FT |
585 | #define VIA_TIMER_CYCLES (VIA_CLOCK_FREQ / HZ) /* clock cycles per jiffy */ |
586 | ||
587 | #define VIA_TC (VIA_TIMER_CYCLES - 2) /* including 0 and -1 */ | |
588 | #define VIA_TC_LOW (VIA_TC & 0xFF) | |
589 | #define VIA_TC_HIGH (VIA_TC >> 8) | |
590 | ||
481fa139 FT |
591 | static u64 mac_read_clk(struct clocksource *cs); |
592 | ||
593 | static struct clocksource mac_clk = { | |
594 | .name = "via1", | |
595 | .rating = 250, | |
596 | .read = mac_read_clk, | |
597 | .mask = CLOCKSOURCE_MASK(32), | |
598 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | |
599 | }; | |
600 | ||
601 | static u32 clk_total, clk_offset; | |
602 | ||
603 | static irqreturn_t via_timer_handler(int irq, void *dev_id) | |
604 | { | |
605 | irq_handler_t timer_routine = dev_id; | |
606 | ||
607 | clk_total += VIA_TIMER_CYCLES; | |
608 | clk_offset = 0; | |
609 | timer_routine(0, NULL); | |
610 | ||
611 | return IRQ_HANDLED; | |
612 | } | |
613 | ||
0ca7ce7d FT |
614 | void __init via_init_clock(irq_handler_t timer_routine) |
615 | { | |
481fa139 FT |
616 | if (request_irq(IRQ_MAC_TIMER_1, via_timer_handler, IRQF_TIMER, "timer", |
617 | timer_routine)) { | |
0ca7ce7d FT |
618 | pr_err("Couldn't register %s interrupt\n", "timer"); |
619 | return; | |
620 | } | |
621 | ||
622 | via1[vT1LL] = VIA_TC_LOW; | |
623 | via1[vT1LH] = VIA_TC_HIGH; | |
624 | via1[vT1CL] = VIA_TC_LOW; | |
625 | via1[vT1CH] = VIA_TC_HIGH; | |
626 | via1[vACR] |= 0x40; | |
481fa139 FT |
627 | |
628 | clocksource_register_hz(&mac_clk, VIA_CLOCK_FREQ); | |
0ca7ce7d FT |
629 | } |
630 | ||
481fa139 | 631 | static u64 mac_read_clk(struct clocksource *cs) |
0ca7ce7d FT |
632 | { |
633 | unsigned long flags; | |
634 | u8 count_high; | |
481fa139 FT |
635 | u16 count; |
636 | u32 ticks; | |
0ca7ce7d FT |
637 | |
638 | /* | |
639 | * Timer counter wrap-around is detected with the timer interrupt flag | |
640 | * but reading the counter low byte (vT1CL) would reset the flag. | |
641 | * Also, accessing both counter registers is essentially a data race. | |
642 | * These problems are avoided by ignoring the low byte. Clock accuracy | |
643 | * is 256 times worse (error can reach 0.327 ms) but CPU overhead is | |
644 | * reduced by avoiding slow VIA register accesses. | |
645 | */ | |
646 | ||
647 | local_irq_save(flags); | |
648 | count_high = via1[vT1CH]; | |
649 | if (count_high == 0xFF) | |
650 | count_high = 0; | |
651 | if (count_high > 0 && (via1[vIFR] & VIA_TIMER_1_INT)) | |
481fa139 | 652 | clk_offset = VIA_TIMER_CYCLES; |
0ca7ce7d | 653 | count = count_high << 8; |
481fa139 FT |
654 | ticks = VIA_TIMER_CYCLES - count; |
655 | ticks += clk_offset + clk_total; | |
656 | local_irq_restore(flags); | |
0ca7ce7d | 657 | |
481fa139 | 658 | return ticks; |
0ca7ce7d | 659 | } |