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1 | /***************************************************************************/ |
2 | ||
3 | /* | |
5b2e6555 | 4 | * linux/arch/m68knommu/platform/54xx/config.c |
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5 | * |
6 | * Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be> | |
7 | */ | |
8 | ||
9 | /***************************************************************************/ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/param.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/io.h> | |
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16 | #include <linux/mm.h> |
17 | #include <linux/bootmem.h> | |
18 | #include <asm/pgalloc.h> | |
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19 | #include <asm/machdep.h> |
20 | #include <asm/coldfire.h> | |
5b2e6555 | 21 | #include <asm/m54xxsim.h> |
ea49f8ff | 22 | #include <asm/mcfuart.h> |
5b2e6555 | 23 | #include <asm/m54xxgpt.h> |
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24 | #ifdef CONFIG_MMU |
25 | #include <asm/mmu_context.h> | |
26 | #endif | |
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27 | |
28 | /***************************************************************************/ | |
29 | ||
5b2e6555 | 30 | static struct mcf_platform_uart m54xx_uart_platform[] = { |
ea49f8ff | 31 | { |
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32 | .mapbase = MCFUART_BASE0, |
33 | .irq = MCF_IRQ_UART0, | |
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34 | }, |
35 | { | |
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36 | .mapbase = MCFUART_BASE1, |
37 | .irq = MCF_IRQ_UART1, | |
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38 | }, |
39 | { | |
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40 | .mapbase = MCFUART_BASE2, |
41 | .irq = MCF_IRQ_UART2, | |
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42 | }, |
43 | { | |
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44 | .mapbase = MCFUART_BASE3, |
45 | .irq = MCF_IRQ_UART3, | |
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46 | }, |
47 | }; | |
48 | ||
5b2e6555 | 49 | static struct platform_device m54xx_uart = { |
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50 | .name = "mcfuart", |
51 | .id = 0, | |
5b2e6555 | 52 | .dev.platform_data = m54xx_uart_platform, |
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53 | }; |
54 | ||
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55 | static struct platform_device *m54xx_devices[] __initdata = { |
56 | &m54xx_uart, | |
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57 | }; |
58 | ||
59 | ||
60 | /***************************************************************************/ | |
61 | ||
5b2e6555 | 62 | static void __init m54xx_uart_init_line(int line, int irq) |
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63 | { |
64 | int rts_cts; | |
65 | ||
66 | /* enable io pins */ | |
67 | switch (line) { | |
68 | case 0: | |
69 | rts_cts = 0; break; | |
70 | case 1: | |
71 | rts_cts = MCF_PAR_PSC_RTS_RTS; break; | |
72 | case 2: | |
73 | rts_cts = MCF_PAR_PSC_RTS_RTS | MCF_PAR_PSC_CTS_CTS; break; | |
74 | case 3: | |
75 | rts_cts = 0; break; | |
76 | } | |
77 | __raw_writeb(MCF_PAR_PSC_TXD | rts_cts | MCF_PAR_PSC_RXD, | |
78 | MCF_MBAR + MCF_PAR_PSC(line)); | |
79 | } | |
80 | ||
5b2e6555 | 81 | static void __init m54xx_uarts_init(void) |
ea49f8ff | 82 | { |
5b2e6555 | 83 | const int nrlines = ARRAY_SIZE(m54xx_uart_platform); |
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84 | int line; |
85 | ||
86 | for (line = 0; (line < nrlines); line++) | |
5b2e6555 | 87 | m54xx_uart_init_line(line, m54xx_uart_platform[line].irq); |
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88 | } |
89 | ||
90 | /***************************************************************************/ | |
91 | ||
5b2e6555 | 92 | static void mcf54xx_reset(void) |
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93 | { |
94 | /* disable interrupts and enable the watchdog */ | |
95 | asm("movew #0x2700, %sr\n"); | |
96 | __raw_writel(0, MCF_MBAR + MCF_GPT_GMS0); | |
97 | __raw_writel(MCF_GPT_GCIR_CNT(1), MCF_MBAR + MCF_GPT_GCIR0); | |
98 | __raw_writel(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS(4), | |
99 | MCF_MBAR + MCF_GPT_GMS0); | |
100 | } | |
101 | ||
102 | /***************************************************************************/ | |
103 | ||
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104 | #ifdef CONFIG_MMU |
105 | ||
106 | unsigned long num_pages; | |
107 | ||
108 | static void __init mcf54xx_bootmem_alloc(void) | |
109 | { | |
110 | unsigned long start_pfn; | |
111 | unsigned long memstart; | |
112 | ||
113 | /* _rambase and _ramend will be naturally page aligned */ | |
114 | m68k_memory[0].addr = _rambase; | |
115 | m68k_memory[0].size = _ramend - _rambase; | |
116 | ||
117 | /* compute total pages in system */ | |
118 | num_pages = (_ramend - _rambase) >> PAGE_SHIFT; | |
119 | ||
120 | /* page numbers */ | |
121 | memstart = PAGE_ALIGN(_ramstart); | |
122 | min_low_pfn = _rambase >> PAGE_SHIFT; | |
123 | start_pfn = memstart >> PAGE_SHIFT; | |
124 | max_low_pfn = _ramend >> PAGE_SHIFT; | |
125 | high_memory = (void *)_ramend; | |
126 | ||
127 | m68k_virt_to_node_shift = fls(_ramend - _rambase - 1) - 6; | |
128 | module_fixup(NULL, __start_fixup, __stop_fixup); | |
129 | ||
130 | /* setup bootmem data */ | |
131 | m68k_setup_node(0); | |
132 | memstart += init_bootmem_node(NODE_DATA(0), start_pfn, | |
133 | min_low_pfn, max_low_pfn); | |
134 | free_bootmem_node(NODE_DATA(0), memstart, _ramend - memstart); | |
135 | } | |
136 | ||
137 | #endif /* CONFIG_MMU */ | |
138 | ||
139 | /***************************************************************************/ | |
140 | ||
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141 | void __init config_BSP(char *commandp, int size) |
142 | { | |
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143 | #ifdef CONFIG_MMU |
144 | mcf54xx_bootmem_alloc(); | |
145 | mmu_context_init(); | |
146 | #endif | |
5b2e6555 | 147 | mach_reset = mcf54xx_reset; |
35aefb26 | 148 | mach_sched_init = hw_timer_init; |
5b2e6555 | 149 | m54xx_uarts_init(); |
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150 | } |
151 | ||
152 | /***************************************************************************/ | |
153 | ||
154 | static int __init init_BSP(void) | |
155 | { | |
156 | ||
5b2e6555 | 157 | platform_add_devices(m54xx_devices, ARRAY_SIZE(m54xx_devices)); |
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158 | return 0; |
159 | } | |
160 | ||
161 | arch_initcall(init_BSP); | |
162 | ||
163 | /***************************************************************************/ |