projects / mirror_ubuntu-bionic-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /***************************************************************************/ |
| 2 | ||
| 3 | /* | |
| 4 | * linux/arch/m68knommu/platform/5249/config.c | |
| 5 | * | |
| 6 | * Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com) | |
| 7 | */ | |
| 8 | ||
| 9 | /***************************************************************************/ | |
| 10 | ||
| 1da177e4 | 11 | #include <linux/kernel.h> |
| 1da177e4 LT |
12 | #include <linux/param.h> |
| 13 | #include <linux/init.h> | |
| 5f84bd52 | 14 | #include <linux/io.h> |
| fa1fc246 | 15 | #include <linux/platform_device.h> |
| 1da177e4 LT |
16 | #include <asm/machdep.h> |
| 17 | #include <asm/coldfire.h> | |
| 1da177e4 | 18 | #include <asm/mcfsim.h> |
| ee1e6b32 GU |
19 | #include <asm/mcfclk.h> |
| 20 | ||
| 21 | /***************************************************************************/ | |
| 22 | ||
| 23 | DEFINE_CLK(pll, "pll.0", MCF_CLK); | |
| 24 | DEFINE_CLK(sys, "sys.0", MCF_BUSCLK); | |
| 25 | DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK); | |
| 26 | DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK); | |
| 27 | DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK); | |
| 28 | DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); | |
| 74859523 | 29 | DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK); |
| ee1e6b32 GU |
30 | |
| 31 | struct clk *mcf_clks[] = { | |
| 32 | &clk_pll, | |
| 33 | &clk_sys, | |
| 34 | &clk_mcftmr0, | |
| 35 | &clk_mcftmr1, | |
| 36 | &clk_mcfuart0, | |
| 37 | &clk_mcfuart1, | |
| 74859523 | 38 | &clk_mcfqspi0, |
| ee1e6b32 GU |
39 | NULL |
| 40 | }; | |
| 1da177e4 LT |
41 | |
| 42 | /***************************************************************************/ | |
| 43 | ||
| 4a1479b6 GU |
44 | #ifdef CONFIG_M5249C3 |
| 45 | ||
| 46 | static struct resource m5249_smc91x_resources[] = { | |
| 47 | { | |
| 48 | .start = 0xe0000300, | |
| 49 | .end = 0xe0000300 + 0x100, | |
| 50 | .flags = IORESOURCE_MEM, | |
| 51 | }, | |
| 52 | { | |
| 5a4acf3e GU |
53 | .start = MCF_IRQ_GPIO6, |
| 54 | .end = MCF_IRQ_GPIO6, | |
| 4a1479b6 GU |
55 | .flags = IORESOURCE_IRQ, |
| 56 | }, | |
| 57 | }; | |
| 58 | ||
| 59 | static struct platform_device m5249_smc91x = { | |
| 60 | .name = "smc91x", | |
| 61 | .id = 0, | |
| 62 | .num_resources = ARRAY_SIZE(m5249_smc91x_resources), | |
| 63 | .resource = m5249_smc91x_resources, | |
| 64 | }; | |
| 65 | ||
| 66 | #endif /* CONFIG_M5249C3 */ | |
| 67 | ||
| fa1fc246 GU |
68 | static struct platform_device *m5249_devices[] __initdata = { |
| 69 | #ifdef CONFIG_M5249C3 | |
| 70 | &m5249_smc91x, | |
| 71 | #endif | |
| 91d60417 SK |
72 | }; |
| 73 | ||
| fa1fc246 | 74 | /***************************************************************************/ |
| 91d60417 | 75 | |
| 83ca6009 | 76 | #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) |
| 91d60417 SK |
77 | |
| 78 | static void __init m5249_qspi_init(void) | |
| 79 | { | |
| 80 | /* QSPI irq setup */ | |
| 81 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, | |
| c986a3d5 | 82 | MCFSIM_QSPIICR); |
| 91d60417 SK |
83 | mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI); |
| 84 | } | |
| 91d60417 | 85 | |
| 83ca6009 | 86 | #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ |
| 5f84bd52 GU |
87 | |
| 88 | /***************************************************************************/ | |
| 89 | ||
| 4a1479b6 GU |
90 | #ifdef CONFIG_M5249C3 |
| 91 | ||
| 92 | static void __init m5249_smc91x_init(void) | |
| 93 | { | |
| 94 | u32 gpio; | |
| 95 | ||
| 96 | /* Set the GPIO line as interrupt source for smc91x device */ | |
| 041a89a4 GU |
97 | gpio = readl(MCFSIM2_GPIOINTENABLE); |
| 98 | writel(gpio | 0x40, MCFSIM2_GPIOINTENABLE); | |
| 4a1479b6 | 99 | |
| 5a4acf3e GU |
100 | gpio = readl(MCFINTC2_INTPRI5); |
| 101 | writel(gpio | 0x04000000, MCFINTC2_INTPRI5); | |
| 4a1479b6 GU |
102 | } |
| 103 | ||
| 104 | #endif /* CONFIG_M5249C3 */ | |
| 105 | ||
| 106 | /***************************************************************************/ | |
| 107 | ||
| 5f84bd52 | 108 | void __init config_BSP(char *commandp, int size) |
| 1da177e4 | 109 | { |
| 35aefb26 | 110 | mach_sched_init = hw_timer_init; |
| d894b89b | 111 | |
| 4a1479b6 GU |
112 | #ifdef CONFIG_M5249C3 |
| 113 | m5249_smc91x_init(); | |
| 114 | #endif | |
| 83ca6009 | 115 | #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) |
| 91d60417 SK |
116 | m5249_qspi_init(); |
| 117 | #endif | |
| 1da177e4 LT |
118 | } |
| 119 | ||
| 120 | /***************************************************************************/ | |
| 5f84bd52 GU |
121 | |
| 122 | static int __init init_BSP(void) | |
| 123 | { | |
| 5f84bd52 GU |
124 | platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices)); |
| 125 | return 0; | |
| 126 | } | |
| 127 | ||
| 128 | arch_initcall(init_BSP); | |
| 129 | ||
| 130 | /***************************************************************************/ |