[mirror_ubuntu-jammy-kernel.git] / arch / m68knommu / platform / 5206e / config.c

/***************************************************************************/

/*
 *	linux/arch/m68knommu/platform/5206e/config.c
 *
 *	Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
 */

/***************************************************************************/

#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfdma.h>
#include <asm/mcfuart.h>

/***************************************************************************/

void coldfire_reset(void);

/***************************************************************************/

static struct mcf_platform_uart m5206e_uart_platform[] = {
	{
		.mapbase	= MCF_MBAR + MCFUART_BASE1,
		.irq		= 73,
	},
	{
		.mapbase 	= MCF_MBAR + MCFUART_BASE2,
		.irq		= 74,
	},
	{ },
};

static struct platform_device m5206e_uart = {
	.name			= "mcfuart",
	.id			= 0,
	.dev.platform_data	= m5206e_uart_platform,
};

static struct platform_device *m5206e_devices[] __initdata = {
	&m5206e_uart,
};

/***************************************************************************/

static void __init m5206e_uart_init_line(int line, int irq)
{
	if (line == 0) {
		writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
		writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
		mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
	} else if (line == 1) {
		writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
		writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
		mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
	}
}

static void __init m5206e_uarts_init(void)
{
	const int nrlines = ARRAY_SIZE(m5206e_uart_platform);
	int line;

	for (line = 0; (line < nrlines); line++)
		m5206e_uart_init_line(line, m5206e_uart_platform[line].irq);
}

/***************************************************************************/

void mcf_autovector(unsigned int vec)
{
	volatile unsigned char  *mbar;
	unsigned char		icr;

	if ((vec >= 25) && (vec <= 31)) {
		vec -= 25;
		mbar = (volatile unsigned char *) MCF_MBAR;
		icr = MCFSIM_ICR_AUTOVEC | (vec << 3);
		*(mbar + MCFSIM_ICR1 + vec) = icr;
		vec = 0x1 << (vec + 1);
		mcf_setimr(mcf_getimr() & ~vec);
	}
}

/***************************************************************************/

void mcf_settimericr(unsigned int timer, unsigned int level)
{
	volatile unsigned char *icrp;
	unsigned int icr, imr;

	if (timer <= 2) {
		switch (timer) {
		case 2:  icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
		default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
		}

		icrp = (volatile unsigned char *) (MCF_MBAR + icr);
		*icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
		mcf_setimr(mcf_getimr() & ~imr);
	}
}

/***************************************************************************/

void __init config_BSP(char *commandp, int size)
{
	mcf_setimr(MCFSIM_IMR_MASKALL);

#if defined(CONFIG_NETtel)
	/* Copy command line from FLASH to local buffer... */
	memcpy(commandp, (char *) 0xf0004000, size);
	commandp[size-1] = 0;
#endif /* CONFIG_NETtel */

	mach_reset = coldfire_reset;
}

/***************************************************************************/

static int __init init_BSP(void)
{
	m5206e_uarts_init();
	platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices));
	return 0;
}

arch_initcall(init_BSP);

/***************************************************************************/
Commit	Line	Data
1da177e4 LT	1	/***************************************************************************/
	2
	3	/*
	4	* linux/arch/m68knommu/platform/5206e/config.c
	5	*
	6	* Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
	7	*/
	8
	9	/***************************************************************************/
	10
1da177e4	11	#include <linux/kernel.h>
1da177e4	12	#include <linux/param.h>
cf64c233	13	#include <linux/init.h>
1da177e4	14	#include <linux/interrupt.h>
cf64c233	15	#include <linux/io.h>
1da177e4 LT	16	#include <asm/machdep.h>
1da177e4 LT	17	#include <asm/coldfire.h>
1da177e4 LT	18	#include <asm/mcfsim.h>
1da177e4 LT	19	#include <asm/mcfdma.h>
9333d826	20	#include <asm/mcfuart.h>
1da177e4 LT	21
	22	/***************************************************************************/
	23
1da177e4 LT	24	void coldfire_reset(void);
	25
	26	/***************************************************************************/
	27
cf64c233 GU	28	static struct mcf_platform_uart m5206e_uart_platform[] = {
	29	{
	30	.mapbase = MCF_MBAR + MCFUART_BASE1,
	31	.irq = 73,
	32	},
	33	{
	34	.mapbase = MCF_MBAR + MCFUART_BASE2,
	35	.irq = 74,
	36	},
	37	{ },
	38	};
	39
	40	static struct platform_device m5206e_uart = {
	41	.name = "mcfuart",
	42	.id = 0,
	43	.dev.platform_data = m5206e_uart_platform,
1da177e4 LT	44	};
1da177e4 LT	45
cf64c233 GU	46	static struct platform_device *m5206e_devices[] __initdata = {
	47	&m5206e_uart,
	48	};
	49
	50	/***************************************************************************/
	51
d259c329	52	static void __init m5206e_uart_init_line(int line, int irq)
cf64c233 GU	53	{
	54	if (line == 0) {
	55	writel(MCFSIM_ICR_LEVEL6 \| MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
	56	writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
	57	mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
	58	} else if (line == 1) {
	59	writel(MCFSIM_ICR_LEVEL6 \| MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
	60	writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
	61	mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
	62	}
	63	}
	64
	65	static void __init m5206e_uarts_init(void)
	66	{
	67	const int nrlines = ARRAY_SIZE(m5206e_uart_platform);
	68	int line;
	69
	70	for (line = 0; (line < nrlines); line++)
	71	m5206e_uart_init_line(line, m5206e_uart_platform[line].irq);
	72	}
1da177e4 LT	73
	74	/***************************************************************************/
	75
	76	void mcf_autovector(unsigned int vec)
	77	{
	78	volatile unsigned char *mbar;
	79	unsigned char icr;
	80
	81	if ((vec >= 25) && (vec <= 31)) {
	82	vec -= 25;
	83	mbar = (volatile unsigned char *) MCF_MBAR;
	84	icr = MCFSIM_ICR_AUTOVEC \| (vec << 3);
	85	*(mbar + MCFSIM_ICR1 + vec) = icr;
	86	vec = 0x1 << (vec + 1);
	87	mcf_setimr(mcf_getimr() & ~vec);
	88	}
	89	}
	90
	91	/***************************************************************************/
	92
	93	void mcf_settimericr(unsigned int timer, unsigned int level)
	94	{
	95	volatile unsigned char *icrp;
	96	unsigned int icr, imr;
	97
	98	if (timer <= 2) {
	99	switch (timer) {
	100	case 2: icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
	101	default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
	102	}
	103
	104	icrp = (volatile unsigned char *) (MCF_MBAR + icr);
	105	*icrp = MCFSIM_ICR_AUTOVEC \| (level << 2) \| MCFSIM_ICR_PRI3;
	106	mcf_setimr(mcf_getimr() & ~imr);
	107	}
	108	}
	109
	110	/***************************************************************************/
	111
cf64c233	112	void __init config_BSP(char *commandp, int size)
1da177e4 LT	113	{
	114	mcf_setimr(MCFSIM_IMR_MASKALL);
	115
bc72450a	116	#if defined(CONFIG_NETtel)
1da177e4 LT	117	/* Copy command line from FLASH to local buffer... */
	118	memcpy(commandp, (char *) 0xf0004000, size);
	119	commandp[size-1] = 0;
1da177e4 LT	120	#endif /* CONFIG_NETtel */
1da177e4 LT	121
1da177e4 LT	122	mach_reset = coldfire_reset;
	123	}
	124
	125	/***************************************************************************/
cf64c233 GU	126
	127	static int __init init_BSP(void)
	128	{
	129	m5206e_uarts_init();
	130	platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices));
	131	return 0;
	132	}
	133
	134	arch_initcall(init_BSP);
	135
	136	/***************************************************************************/