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1/*
2 * linux/arch/m68knommu/platform/68360/config.c
3 *
4 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
5 * Copyright (C) 1993 Hamish Macdonald
6 * Copyright (C) 1999 D. Jeff Dionne <jeff@uclinux.org>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file COPYING in the main directory of this archive
10 * for more details.
11 */
12
13#include <stdarg.h>
14#include <linux/config.h>
15#include <linux/types.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
18#include <linux/tty.h>
19#include <linux/console.h>
20
21#include <asm/setup.h>
22#include <asm/system.h>
23#include <asm/pgtable.h>
24#include <asm/irq.h>
25#include <asm/machdep.h>
26#include <asm/m68360.h>
27
28#ifdef CONFIG_UCQUICC
29#include <asm/bootstd.h>
30#endif
31
32extern void m360_cpm_reset(void);
33
34// Mask to select if the PLL prescaler is enabled.
35#define MCU_PREEN ((unsigned short)(0x0001 << 13))
36
37#if defined(CONFIG_UCQUICC)
38#define OSCILLATOR (unsigned long int)33000000
39#endif
40
41unsigned long int system_clock;
42
43void M68360_init_IRQ(void);
44
45extern QUICC *pquicc;
46
47/* TODO DON"T Hard Code this */
48/* calculate properly using the right PLL and prescaller */
49// unsigned int system_clock = 33000000l;
50extern unsigned long int system_clock; //In kernel setup.c
51
52extern void config_M68360_irq(void);
53
54void BSP_sched_init(void (*timer_routine)(int, void *, struct pt_regs *))
55{
56 unsigned char prescaler;
57 unsigned short tgcr_save;
58 int return_value;
59
60#if 0
61 /* Restart mode, Enable int, 32KHz, Enable timer */
62 TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN;
63 /* Set prescaler (Divide 32KHz by 32)*/
64 TPRER = 31;
65 /* Set compare register 32Khz / 32 / 10 = 100 */
66 TCMP = 10;
67
68 request_irq(IRQ_MACHSPEC | 1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
69#endif
70
71 /* General purpose quicc timers: MC68360UM p7-20 */
72
73 /* Set up timer 1 (in [1..4]) to do 100Hz */
74 tgcr_save = pquicc->timer_tgcr & 0xfff0;
75 pquicc->timer_tgcr = tgcr_save; /* stop and reset timer 1 */
76 /* pquicc->timer_tgcr |= 0x4444; */ /* halt timers when FREEZE (ie bdm freeze) */
77
78 prescaler = 8;
79 pquicc->timer_tmr1 = 0x001a | /* or=1, frr=1, iclk=01b */
80 (unsigned short)((prescaler - 1) << 8);
81
82 pquicc->timer_tcn1 = 0x0000; /* initial count */
83 /* calculate interval for 100Hz based on the _system_clock: */
84 pquicc->timer_trr1 = (system_clock/ prescaler) / HZ; /* reference count */
85
86 pquicc->timer_ter1 = 0x0003; /* clear timer events */
87
88 /* enable timer 1 interrupt in CIMR */
89// request_irq(IRQ_MACHSPEC | CPMVEC_TIMER1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
90 //return_value = request_irq( CPMVEC_TIMER1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
91 return_value = request_irq(CPMVEC_TIMER1 , timer_routine, IRQ_FLG_LOCK,
92 "Timer", NULL);
93
94 /* Start timer 1: */
95 tgcr_save = (pquicc->timer_tgcr & 0xfff0) | 0x0001;
96 pquicc->timer_tgcr = tgcr_save;
97}
98
99
100void BSP_tick(void)
101{
102 /* Reset Timer1 */
103 /* TSTAT &= 0; */
104
105 pquicc->timer_ter1 = 0x0002; /* clear timer event */
106}
107
108unsigned long BSP_gettimeoffset (void)
109{
110 return 0;
111}
112
113void BSP_gettod (int *yearp, int *monp, int *dayp,
114 int *hourp, int *minp, int *secp)
115{
116}
117
118int BSP_hwclk(int op, struct hwclk_time *t)
119{
120 if (!op) {
121 /* read */
122 } else {
123 /* write */
124 }
125 return 0;
126}
127
128int BSP_set_clock_mmss (unsigned long nowtime)
129{
130#if 0
131 short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
132
133 tod->second1 = real_seconds / 10;
134 tod->second2 = real_seconds % 10;
135 tod->minute1 = real_minutes / 10;
136 tod->minute2 = real_minutes % 10;
137#endif
138 return 0;
139}
140
141void BSP_reset (void)
142{
143 local_irq_disable();
144 asm volatile ("
145 moveal #_start, %a0;
146 moveb #0, 0xFFFFF300;
147 moveal 0(%a0), %sp;
148 moveal 4(%a0), %a0;
149 jmp (%a0);
150 ");
151}
152
153unsigned char *scc1_hwaddr;
154static int errno;
155
156#if defined (CONFIG_UCQUICC)
157_bsc0(char *, getserialnum)
158_bsc1(unsigned char *, gethwaddr, int, a)
159_bsc1(char *, getbenv, char *, a)
160#endif
161
162
163void config_BSP(char *command, int len)
164{
165 unsigned char *p;
166
167 m360_cpm_reset();
168
169 /* Calculate the real system clock value. */
170 {
171 unsigned int local_pllcr = (unsigned int)(pquicc->sim_pllcr);
172 if( local_pllcr & MCU_PREEN ) // If the prescaler is dividing by 128
173 {
174 int mf = (int)(pquicc->sim_pllcr & 0x0fff);
175 system_clock = (OSCILLATOR / 128) * (mf + 1);
176 }
177 else
178 {
179 int mf = (int)(pquicc->sim_pllcr & 0x0fff);
180 system_clock = (OSCILLATOR) * (mf + 1);
181 }
182 }
183
184 printk(KERN_INFO "\n68360 QUICC support (C) 2000 Lineo Inc.\n");
185
186#if defined(CONFIG_UCQUICC) && 0
187 printk(KERN_INFO "uCquicc serial string [%s]\n",getserialnum());
188 p = scc1_hwaddr = gethwaddr(0);
189 printk(KERN_INFO "uCquicc hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
190 p[0], p[1], p[2], p[3], p[4], p[5]);
191
192 p = getbenv("APPEND");
193 if (p)
194 strcpy(p,command);
195 else
196 command[0] = 0;
197#else
198 scc1_hwaddr = "\00\01\02\03\04\05";
199#endif
200
201 mach_sched_init = BSP_sched_init;
202 mach_tick = BSP_tick;
203 mach_gettimeoffset = BSP_gettimeoffset;
204 mach_gettod = BSP_gettod;
205 mach_hwclk = NULL;
206 mach_set_clock_mmss = NULL;
207 mach_reset = BSP_reset;
208}