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ca54502b MS |
1 | /* |
2 | * Low-level system-call handling, trap handlers and context-switching | |
3 | * | |
4 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | |
5 | * Copyright (C) 2008-2009 PetaLogix | |
6 | * Copyright (C) 2003 John Williams <jwilliams@itee.uq.edu.au> | |
7 | * Copyright (C) 2001,2002 NEC Corporation | |
8 | * Copyright (C) 2001,2002 Miles Bader <miles@gnu.org> | |
9 | * | |
10 | * This file is subject to the terms and conditions of the GNU General | |
11 | * Public License. See the file COPYING in the main directory of this | |
12 | * archive for more details. | |
13 | * | |
14 | * Written by Miles Bader <miles@gnu.org> | |
15 | * Heavily modified by John Williams for Microblaze | |
16 | */ | |
17 | ||
18 | #include <linux/sys.h> | |
19 | #include <linux/linkage.h> | |
20 | ||
21 | #include <asm/entry.h> | |
22 | #include <asm/current.h> | |
23 | #include <asm/processor.h> | |
24 | #include <asm/exceptions.h> | |
25 | #include <asm/asm-offsets.h> | |
26 | #include <asm/thread_info.h> | |
27 | ||
28 | #include <asm/page.h> | |
29 | #include <asm/unistd.h> | |
30 | ||
31 | #include <linux/errno.h> | |
32 | #include <asm/signal.h> | |
33 | ||
11d51360 MS |
34 | #undef DEBUG |
35 | ||
d8748e73 MS |
36 | #ifdef DEBUG |
37 | /* Create space for syscalls counting. */ | |
38 | .section .data | |
39 | .global syscall_debug_table | |
40 | .align 4 | |
41 | syscall_debug_table: | |
42 | .space (__NR_syscalls * 4) | |
43 | #endif /* DEBUG */ | |
44 | ||
ca54502b MS |
45 | #define C_ENTRY(name) .globl name; .align 4; name |
46 | ||
47 | /* | |
48 | * Various ways of setting and clearing BIP in flags reg. | |
49 | * This is mucky, but necessary using microblaze version that | |
50 | * allows msr ops to write to BIP | |
51 | */ | |
52 | #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR | |
53 | .macro clear_bip | |
66f7de86 | 54 | msrclr r0, MSR_BIP |
ca54502b MS |
55 | .endm |
56 | ||
57 | .macro set_bip | |
66f7de86 | 58 | msrset r0, MSR_BIP |
ca54502b MS |
59 | .endm |
60 | ||
61 | .macro clear_eip | |
66f7de86 | 62 | msrclr r0, MSR_EIP |
ca54502b MS |
63 | .endm |
64 | ||
65 | .macro set_ee | |
66f7de86 | 66 | msrset r0, MSR_EE |
ca54502b MS |
67 | .endm |
68 | ||
69 | .macro disable_irq | |
66f7de86 | 70 | msrclr r0, MSR_IE |
ca54502b MS |
71 | .endm |
72 | ||
73 | .macro enable_irq | |
66f7de86 | 74 | msrset r0, MSR_IE |
ca54502b MS |
75 | .endm |
76 | ||
77 | .macro set_ums | |
66f7de86 | 78 | msrset r0, MSR_UMS |
66f7de86 | 79 | msrclr r0, MSR_VMS |
ca54502b MS |
80 | .endm |
81 | ||
82 | .macro set_vms | |
66f7de86 | 83 | msrclr r0, MSR_UMS |
66f7de86 | 84 | msrset r0, MSR_VMS |
ca54502b MS |
85 | .endm |
86 | ||
b318067e | 87 | .macro clear_ums |
66f7de86 | 88 | msrclr r0, MSR_UMS |
b318067e MS |
89 | .endm |
90 | ||
ca54502b | 91 | .macro clear_vms_ums |
66f7de86 | 92 | msrclr r0, MSR_VMS | MSR_UMS |
ca54502b MS |
93 | .endm |
94 | #else | |
95 | .macro clear_bip | |
96 | mfs r11, rmsr | |
ca54502b MS |
97 | andi r11, r11, ~MSR_BIP |
98 | mts rmsr, r11 | |
ca54502b MS |
99 | .endm |
100 | ||
101 | .macro set_bip | |
102 | mfs r11, rmsr | |
ca54502b MS |
103 | ori r11, r11, MSR_BIP |
104 | mts rmsr, r11 | |
ca54502b MS |
105 | .endm |
106 | ||
107 | .macro clear_eip | |
108 | mfs r11, rmsr | |
ca54502b MS |
109 | andi r11, r11, ~MSR_EIP |
110 | mts rmsr, r11 | |
ca54502b MS |
111 | .endm |
112 | ||
113 | .macro set_ee | |
114 | mfs r11, rmsr | |
ca54502b MS |
115 | ori r11, r11, MSR_EE |
116 | mts rmsr, r11 | |
ca54502b MS |
117 | .endm |
118 | ||
119 | .macro disable_irq | |
120 | mfs r11, rmsr | |
ca54502b MS |
121 | andi r11, r11, ~MSR_IE |
122 | mts rmsr, r11 | |
ca54502b MS |
123 | .endm |
124 | ||
125 | .macro enable_irq | |
126 | mfs r11, rmsr | |
ca54502b MS |
127 | ori r11, r11, MSR_IE |
128 | mts rmsr, r11 | |
ca54502b MS |
129 | .endm |
130 | ||
131 | .macro set_ums | |
132 | mfs r11, rmsr | |
ca54502b MS |
133 | ori r11, r11, MSR_VMS |
134 | andni r11, r11, MSR_UMS | |
135 | mts rmsr, r11 | |
ca54502b MS |
136 | .endm |
137 | ||
138 | .macro set_vms | |
139 | mfs r11, rmsr | |
ca54502b MS |
140 | ori r11, r11, MSR_VMS |
141 | andni r11, r11, MSR_UMS | |
142 | mts rmsr, r11 | |
ca54502b MS |
143 | .endm |
144 | ||
b318067e MS |
145 | .macro clear_ums |
146 | mfs r11, rmsr | |
b318067e MS |
147 | andni r11, r11, MSR_UMS |
148 | mts rmsr,r11 | |
b318067e MS |
149 | .endm |
150 | ||
ca54502b MS |
151 | .macro clear_vms_ums |
152 | mfs r11, rmsr | |
ca54502b MS |
153 | andni r11, r11, (MSR_VMS|MSR_UMS) |
154 | mts rmsr,r11 | |
ca54502b MS |
155 | .endm |
156 | #endif | |
157 | ||
158 | /* Define how to call high-level functions. With MMU, virtual mode must be | |
159 | * enabled when calling the high-level function. Clobbers R11. | |
160 | * VM_ON, VM_OFF, DO_JUMP_BIPCLR, DO_CALL | |
161 | */ | |
162 | ||
163 | /* turn on virtual protected mode save */ | |
164 | #define VM_ON \ | |
a4a94dbf | 165 | set_ums; \ |
ca54502b | 166 | rted r0, 2f; \ |
a4a94dbf MS |
167 | nop; \ |
168 | 2: | |
ca54502b MS |
169 | |
170 | /* turn off virtual protected mode save and user mode save*/ | |
171 | #define VM_OFF \ | |
a4a94dbf | 172 | clear_vms_ums; \ |
ca54502b | 173 | rted r0, TOPHYS(1f); \ |
a4a94dbf MS |
174 | nop; \ |
175 | 1: | |
ca54502b MS |
176 | |
177 | #define SAVE_REGS \ | |
6e83557c MS |
178 | swi r2, r1, PT_R2; /* Save SDA */ \ |
179 | swi r3, r1, PT_R3; \ | |
180 | swi r4, r1, PT_R4; \ | |
181 | swi r5, r1, PT_R5; \ | |
182 | swi r6, r1, PT_R6; \ | |
183 | swi r7, r1, PT_R7; \ | |
184 | swi r8, r1, PT_R8; \ | |
185 | swi r9, r1, PT_R9; \ | |
186 | swi r10, r1, PT_R10; \ | |
187 | swi r11, r1, PT_R11; /* save clobbered regs after rval */\ | |
188 | swi r12, r1, PT_R12; \ | |
189 | swi r13, r1, PT_R13; /* Save SDA2 */ \ | |
190 | swi r14, r1, PT_PC; /* PC, before IRQ/trap */ \ | |
191 | swi r15, r1, PT_R15; /* Save LP */ \ | |
192 | swi r16, r1, PT_R16; \ | |
193 | swi r17, r1, PT_R17; \ | |
194 | swi r18, r1, PT_R18; /* Save asm scratch reg */ \ | |
195 | swi r19, r1, PT_R19; \ | |
196 | swi r20, r1, PT_R20; \ | |
197 | swi r21, r1, PT_R21; \ | |
198 | swi r22, r1, PT_R22; \ | |
199 | swi r23, r1, PT_R23; \ | |
200 | swi r24, r1, PT_R24; \ | |
201 | swi r25, r1, PT_R25; \ | |
202 | swi r26, r1, PT_R26; \ | |
203 | swi r27, r1, PT_R27; \ | |
204 | swi r28, r1, PT_R28; \ | |
205 | swi r29, r1, PT_R29; \ | |
206 | swi r30, r1, PT_R30; \ | |
207 | swi r31, r1, PT_R31; /* Save current task reg */ \ | |
ca54502b | 208 | mfs r11, rmsr; /* save MSR */ \ |
6e83557c | 209 | swi r11, r1, PT_MSR; |
ca54502b MS |
210 | |
211 | #define RESTORE_REGS \ | |
6e83557c | 212 | lwi r11, r1, PT_MSR; \ |
ca54502b | 213 | mts rmsr , r11; \ |
6e83557c MS |
214 | lwi r2, r1, PT_R2; /* restore SDA */ \ |
215 | lwi r3, r1, PT_R3; \ | |
216 | lwi r4, r1, PT_R4; \ | |
217 | lwi r5, r1, PT_R5; \ | |
218 | lwi r6, r1, PT_R6; \ | |
219 | lwi r7, r1, PT_R7; \ | |
220 | lwi r8, r1, PT_R8; \ | |
221 | lwi r9, r1, PT_R9; \ | |
222 | lwi r10, r1, PT_R10; \ | |
223 | lwi r11, r1, PT_R11; /* restore clobbered regs after rval */\ | |
224 | lwi r12, r1, PT_R12; \ | |
225 | lwi r13, r1, PT_R13; /* restore SDA2 */ \ | |
226 | lwi r14, r1, PT_PC; /* RESTORE_LINK PC, before IRQ/trap */\ | |
227 | lwi r15, r1, PT_R15; /* restore LP */ \ | |
228 | lwi r16, r1, PT_R16; \ | |
229 | lwi r17, r1, PT_R17; \ | |
230 | lwi r18, r1, PT_R18; /* restore asm scratch reg */ \ | |
231 | lwi r19, r1, PT_R19; \ | |
232 | lwi r20, r1, PT_R20; \ | |
233 | lwi r21, r1, PT_R21; \ | |
234 | lwi r22, r1, PT_R22; \ | |
235 | lwi r23, r1, PT_R23; \ | |
236 | lwi r24, r1, PT_R24; \ | |
237 | lwi r25, r1, PT_R25; \ | |
238 | lwi r26, r1, PT_R26; \ | |
239 | lwi r27, r1, PT_R27; \ | |
240 | lwi r28, r1, PT_R28; \ | |
241 | lwi r29, r1, PT_R29; \ | |
242 | lwi r30, r1, PT_R30; \ | |
243 | lwi r31, r1, PT_R31; /* Restore cur task reg */ | |
ca54502b | 244 | |
e5d2af2b MS |
245 | #define SAVE_STATE \ |
246 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* save stack */ \ | |
247 | /* See if already in kernel mode.*/ \ | |
248 | mfs r1, rmsr; \ | |
e5d2af2b MS |
249 | andi r1, r1, MSR_UMS; \ |
250 | bnei r1, 1f; \ | |
251 | /* Kernel-mode state save. */ \ | |
252 | /* Reload kernel stack-ptr. */ \ | |
253 | lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); \ | |
287503fa MS |
254 | /* FIXME: I can add these two lines to one */ \ |
255 | /* tophys(r1,r1); */ \ | |
6e83557c MS |
256 | /* addik r1, r1, -PT_SIZE; */ \ |
257 | addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; \ | |
e5d2af2b | 258 | SAVE_REGS \ |
e5d2af2b | 259 | brid 2f; \ |
6e83557c | 260 | swi r1, r1, PT_MODE; \ |
e5d2af2b MS |
261 | 1: /* User-mode state save. */ \ |
262 | lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\ | |
263 | tophys(r1,r1); \ | |
264 | lwi r1, r1, TS_THREAD_INFO; /* get the thread info */ \ | |
287503fa MS |
265 | /* MS these three instructions can be added to one */ \ |
266 | /* addik r1, r1, THREAD_SIZE; */ \ | |
267 | /* tophys(r1,r1); */ \ | |
6e83557c MS |
268 | /* addik r1, r1, -PT_SIZE; */ \ |
269 | addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; \ | |
e5d2af2b | 270 | SAVE_REGS \ |
e5d2af2b | 271 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \ |
6e83557c MS |
272 | swi r11, r1, PT_R1; /* Store user SP. */ \ |
273 | swi r0, r1, PT_MODE; /* Was in user-mode. */ \ | |
e5d2af2b MS |
274 | /* MS: I am clearing UMS even in case when I come from kernel space */ \ |
275 | clear_ums; \ | |
276 | 2: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); | |
277 | ||
ca54502b MS |
278 | .text |
279 | ||
280 | /* | |
281 | * User trap. | |
282 | * | |
283 | * System calls are handled here. | |
284 | * | |
285 | * Syscall protocol: | |
286 | * Syscall number in r12, args in r5-r10 | |
287 | * Return value in r3 | |
288 | * | |
289 | * Trap entered via brki instruction, so BIP bit is set, and interrupts | |
290 | * are masked. This is nice, means we don't have to CLI before state save | |
291 | */ | |
292 | C_ENTRY(_user_exception): | |
0e41c909 | 293 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */ |
9da63458 MS |
294 | addi r14, r14, 4 /* return address is 4 byte after call */ |
295 | ||
296 | mfs r1, rmsr | |
297 | nop | |
298 | andi r1, r1, MSR_UMS | |
299 | bnei r1, 1f | |
300 | ||
301 | /* Kernel-mode state save - kernel execve */ | |
302 | lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/ | |
303 | tophys(r1,r1); | |
304 | ||
6e83557c | 305 | addik r1, r1, -PT_SIZE; /* Make room on the stack. */ |
9da63458 MS |
306 | SAVE_REGS |
307 | ||
6e83557c | 308 | swi r1, r1, PT_MODE; /* pt_regs -> kernel mode */ |
9da63458 MS |
309 | brid 2f; |
310 | nop; /* Fill delay slot */ | |
ca54502b | 311 | |
9da63458 MS |
312 | /* User-mode state save. */ |
313 | 1: | |
ca54502b MS |
314 | lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */ |
315 | tophys(r1,r1); | |
316 | lwi r1, r1, TS_THREAD_INFO; /* get stack from task_struct */ | |
9da63458 MS |
317 | /* calculate kernel stack pointer from task struct 8k */ |
318 | addik r1, r1, THREAD_SIZE; | |
319 | tophys(r1,r1); | |
320 | ||
6e83557c | 321 | addik r1, r1, -PT_SIZE; /* Make room on the stack. */ |
ca54502b | 322 | SAVE_REGS |
6e83557c MS |
323 | swi r0, r1, PT_R3 |
324 | swi r0, r1, PT_R4 | |
ca54502b | 325 | |
6e83557c | 326 | swi r0, r1, PT_MODE; /* Was in user-mode. */ |
ca54502b | 327 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); |
6e83557c | 328 | swi r11, r1, PT_R1; /* Store user SP. */ |
25f6e596 | 329 | clear_ums; |
9da63458 | 330 | 2: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); |
ca54502b | 331 | /* Save away the syscall number. */ |
6e83557c | 332 | swi r12, r1, PT_R0; |
ca54502b MS |
333 | tovirt(r1,r1) |
334 | ||
ca54502b MS |
335 | /* where the trap should return need -8 to adjust for rtsd r15, 8*/ |
336 | /* Jump to the appropriate function for the system call number in r12 | |
337 | * (r12 is not preserved), or return an error if r12 is not valid. The LP | |
338 | * register should point to the location where | |
339 | * the called function should return. [note that MAKE_SYS_CALL uses label 1] */ | |
23575483 | 340 | |
25f6e596 MS |
341 | /* Step into virtual mode */ |
342 | rtbd r0, 3f | |
23575483 MS |
343 | nop |
344 | 3: | |
b1d70c62 | 345 | lwi r11, CURRENT_TASK, TS_THREAD_INFO /* get thread info */ |
23575483 MS |
346 | lwi r11, r11, TI_FLAGS /* get flags in thread info */ |
347 | andi r11, r11, _TIF_WORK_SYSCALL_MASK | |
348 | beqi r11, 4f | |
349 | ||
350 | addik r3, r0, -ENOSYS | |
6e83557c | 351 | swi r3, r1, PT_R3 |
23575483 | 352 | brlid r15, do_syscall_trace_enter |
6e83557c | 353 | addik r5, r1, PT_R0 |
23575483 MS |
354 | |
355 | # do_syscall_trace_enter returns the new syscall nr. | |
356 | addk r12, r0, r3 | |
6e83557c MS |
357 | lwi r5, r1, PT_R5; |
358 | lwi r6, r1, PT_R6; | |
359 | lwi r7, r1, PT_R7; | |
360 | lwi r8, r1, PT_R8; | |
361 | lwi r9, r1, PT_R9; | |
362 | lwi r10, r1, PT_R10; | |
23575483 MS |
363 | 4: |
364 | /* Jump to the appropriate function for the system call number in r12 | |
365 | * (r12 is not preserved), or return an error if r12 is not valid. | |
366 | * The LP register should point to the location where the called function | |
367 | * should return. [note that MAKE_SYS_CALL uses label 1] */ | |
368 | /* See if the system call number is valid */ | |
ca54502b | 369 | addi r11, r12, -__NR_syscalls; |
23575483 | 370 | bgei r11,5f; |
ca54502b MS |
371 | /* Figure out which function to use for this system call. */ |
372 | /* Note Microblaze barrel shift is optional, so don't rely on it */ | |
373 | add r12, r12, r12; /* convert num -> ptr */ | |
374 | add r12, r12, r12; | |
375 | ||
11d51360 | 376 | #ifdef DEBUG |
d8748e73 MS |
377 | /* Trac syscalls and stored them to syscall_debug_table */ |
378 | /* The first syscall location stores total syscall number */ | |
379 | lwi r3, r0, syscall_debug_table | |
380 | addi r3, r3, 1 | |
381 | swi r3, r0, syscall_debug_table | |
382 | lwi r3, r12, syscall_debug_table | |
ca54502b | 383 | addi r3, r3, 1 |
d8748e73 | 384 | swi r3, r12, syscall_debug_table |
11d51360 | 385 | #endif |
23575483 MS |
386 | |
387 | # Find and jump into the syscall handler. | |
388 | lwi r12, r12, sys_call_table | |
389 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ | |
b9ea77e2 | 390 | addi r15, r0, ret_from_trap-8 |
23575483 | 391 | bra r12 |
ca54502b | 392 | |
ca54502b | 393 | /* The syscall number is invalid, return an error. */ |
23575483 | 394 | 5: |
9814cc11 | 395 | rtsd r15, 8; /* looks like a normal subroutine return */ |
ca54502b | 396 | addi r3, r0, -ENOSYS; |
ca54502b | 397 | |
23575483 | 398 | /* Entry point used to return from a syscall/trap */ |
ca54502b MS |
399 | /* We re-enable BIP bit before state restore */ |
400 | C_ENTRY(ret_from_trap): | |
6e83557c MS |
401 | swi r3, r1, PT_R3 |
402 | swi r4, r1, PT_R4 | |
b1d70c62 | 403 | |
6e83557c | 404 | lwi r11, r1, PT_MODE; |
9da63458 MS |
405 | /* See if returning to kernel mode, if so, skip resched &c. */ |
406 | bnei r11, 2f; | |
23575483 MS |
407 | /* We're returning to user mode, so check for various conditions that |
408 | * trigger rescheduling. */ | |
b1d70c62 MS |
409 | /* FIXME: Restructure all these flag checks. */ |
410 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ | |
23575483 MS |
411 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
412 | andi r11, r11, _TIF_WORK_SYSCALL_MASK | |
413 | beqi r11, 1f | |
414 | ||
23575483 | 415 | brlid r15, do_syscall_trace_leave |
6e83557c | 416 | addik r5, r1, PT_R0 |
23575483 | 417 | 1: |
ca54502b MS |
418 | /* We're returning to user mode, so check for various conditions that |
419 | * trigger rescheduling. */ | |
b1d70c62 MS |
420 | /* get thread info from current task */ |
421 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; | |
ca54502b MS |
422 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
423 | andi r11, r11, _TIF_NEED_RESCHED; | |
424 | beqi r11, 5f; | |
425 | ||
ca54502b MS |
426 | bralid r15, schedule; /* Call scheduler */ |
427 | nop; /* delay slot */ | |
ca54502b MS |
428 | |
429 | /* Maybe handle a signal */ | |
b1d70c62 MS |
430 | 5: /* get thread info from current task*/ |
431 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; | |
ca54502b | 432 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
969a9616 | 433 | andi r11, r11, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME; |
ca54502b MS |
434 | beqi r11, 1f; /* Signals to handle, handle them */ |
435 | ||
6e83557c | 436 | addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */ |
969a9616 | 437 | bralid r15, do_notify_resume; /* Handle any signals */ |
83140191 | 438 | addi r6, r0, 1; /* Arg 2: int in_syscall */ |
b1d70c62 MS |
439 | |
440 | /* Finally, return to user state. */ | |
96014cc3 | 441 | 1: set_bip; /* Ints masked for state restore */ |
8633bebc | 442 | swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */ |
ca54502b MS |
443 | VM_OFF; |
444 | tophys(r1,r1); | |
445 | RESTORE_REGS; | |
6e83557c | 446 | addik r1, r1, PT_SIZE /* Clean up stack space. */ |
ca54502b | 447 | lwi r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */ |
9da63458 MS |
448 | bri 6f; |
449 | ||
450 | /* Return to kernel state. */ | |
451 | 2: set_bip; /* Ints masked for state restore */ | |
452 | VM_OFF; | |
453 | tophys(r1,r1); | |
454 | RESTORE_REGS; | |
6e83557c | 455 | addik r1, r1, PT_SIZE /* Clean up stack space. */ |
9da63458 MS |
456 | tovirt(r1,r1); |
457 | 6: | |
ca54502b MS |
458 | TRAP_return: /* Make global symbol for debugging */ |
459 | rtbd r14, 0; /* Instructions to return from an IRQ */ | |
460 | nop; | |
461 | ||
462 | ||
463 | /* These syscalls need access to the struct pt_regs on the stack, so we | |
464 | implement them in assembly (they're basically all wrappers anyway). */ | |
465 | ||
466 | C_ENTRY(sys_fork_wrapper): | |
467 | addi r5, r0, SIGCHLD /* Arg 0: flags */ | |
6e83557c MS |
468 | lwi r6, r1, PT_R1 /* Arg 1: child SP (use parent's) */ |
469 | addik r7, r1, 0 /* Arg 2: parent context */ | |
5dbeaad3 | 470 | add r8, r0, r0 /* Arg 3: (unused) */ |
ca54502b | 471 | add r9, r0, r0; /* Arg 4: (unused) */ |
ca54502b | 472 | brid do_fork /* Do real work (tail-call) */ |
9814cc11 | 473 | add r10, r0, r0; /* Arg 5: (unused) */ |
ca54502b MS |
474 | |
475 | /* This the initial entry point for a new child thread, with an appropriate | |
476 | stack in place that makes it look the the child is in the middle of an | |
477 | syscall. This function is actually `returned to' from switch_thread | |
478 | (copy_thread makes ret_from_fork the return address in each new thread's | |
479 | saved context). */ | |
480 | C_ENTRY(ret_from_fork): | |
481 | bralid r15, schedule_tail; /* ...which is schedule_tail's arg */ | |
482 | add r3, r5, r0; /* switch_thread returns the prev task */ | |
483 | /* ( in the delay slot ) */ | |
ca54502b | 484 | brid ret_from_trap; /* Do normal trap return */ |
9814cc11 | 485 | add r3, r0, r0; /* Child's fork call should return 0. */ |
ca54502b | 486 | |
e513588f AB |
487 | C_ENTRY(sys_vfork): |
488 | brid microblaze_vfork /* Do real work (tail-call) */ | |
6e83557c | 489 | addik r5, r1, 0 |
ca54502b | 490 | |
e513588f | 491 | C_ENTRY(sys_clone): |
ca54502b | 492 | bnei r6, 1f; /* See if child SP arg (arg 1) is 0. */ |
6e83557c MS |
493 | lwi r6, r1, PT_R1; /* If so, use paret's stack ptr */ |
494 | 1: addik r7, r1, 0; /* Arg 2: parent context */ | |
8d95e122 EI |
495 | lwi r9, r1, PT_R8; /* parent tid. */ |
496 | lwi r10, r1, PT_R9; /* child tid. */ | |
497 | /* do_fork will pick up TLS from regs->r10. */ | |
b9ea77e2 | 498 | brid do_fork /* Do real work (tail-call) */ |
8d95e122 | 499 | add r8, r0, r0; /* Arg 3: (unused) */ |
ca54502b | 500 | |
e513588f | 501 | C_ENTRY(sys_execve): |
e513588f | 502 | brid microblaze_execve; /* Do real work (tail-call).*/ |
6e83557c | 503 | addik r8, r1, 0; /* add user context as 4th arg */ |
ca54502b | 504 | |
ca54502b | 505 | C_ENTRY(sys_rt_sigreturn_wrapper): |
791d0a16 | 506 | brid sys_rt_sigreturn /* Do real work */ |
6e83557c | 507 | addik r5, r1, 0; /* add user context as 1st arg */ |
ca54502b MS |
508 | |
509 | /* | |
510 | * HW EXCEPTION rutine start | |
511 | */ | |
ca54502b | 512 | C_ENTRY(full_exception_trap): |
ca54502b MS |
513 | /* adjust exception address for privileged instruction |
514 | * for finding where is it */ | |
515 | addik r17, r17, -4 | |
516 | SAVE_STATE /* Save registers */ | |
06a54604 | 517 | /* PC, before IRQ/trap - this is one instruction above */ |
6e83557c | 518 | swi r17, r1, PT_PC; |
06a54604 | 519 | tovirt(r1,r1) |
ca54502b MS |
520 | /* FIXME this can be store directly in PT_ESR reg. |
521 | * I tested it but there is a fault */ | |
522 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ | |
b9ea77e2 | 523 | addik r15, r0, ret_from_exc - 8 |
ca54502b | 524 | mfs r6, resr |
ca54502b | 525 | mfs r7, rfsr; /* save FSR */ |
131e4e97 | 526 | mts rfsr, r0; /* Clear sticky fsr */ |
c318d483 | 527 | rted r0, full_exception |
6e83557c | 528 | addik r5, r1, 0 /* parameter struct pt_regs * regs */ |
ca54502b MS |
529 | |
530 | /* | |
531 | * Unaligned data trap. | |
532 | * | |
533 | * Unaligned data trap last on 4k page is handled here. | |
534 | * | |
535 | * Trap entered via exception, so EE bit is set, and interrupts | |
536 | * are masked. This is nice, means we don't have to CLI before state save | |
537 | * | |
538 | * The assembler routine is in "arch/microblaze/kernel/hw_exception_handler.S" | |
539 | */ | |
540 | C_ENTRY(unaligned_data_trap): | |
8b110d15 MS |
541 | /* MS: I have to save r11 value and then restore it because |
542 | * set_bit, clear_eip, set_ee use r11 as temp register if MSR | |
543 | * instructions are not used. We don't need to do if MSR instructions | |
544 | * are used and they use r0 instead of r11. | |
545 | * I am using ENTRY_SP which should be primary used only for stack | |
546 | * pointer saving. */ | |
547 | swi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); | |
548 | set_bip; /* equalize initial state for all possible entries */ | |
549 | clear_eip; | |
550 | set_ee; | |
551 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); | |
ca54502b | 552 | SAVE_STATE /* Save registers.*/ |
06a54604 | 553 | /* PC, before IRQ/trap - this is one instruction above */ |
6e83557c | 554 | swi r17, r1, PT_PC; |
06a54604 | 555 | tovirt(r1,r1) |
ca54502b | 556 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ |
b9ea77e2 | 557 | addik r15, r0, ret_from_exc-8 |
ca54502b | 558 | mfs r3, resr /* ESR */ |
ca54502b | 559 | mfs r4, rear /* EAR */ |
c318d483 | 560 | rtbd r0, _unaligned_data_exception |
6e83557c | 561 | addik r7, r1, 0 /* parameter struct pt_regs * regs */ |
ca54502b MS |
562 | |
563 | /* | |
564 | * Page fault traps. | |
565 | * | |
566 | * If the real exception handler (from hw_exception_handler.S) didn't find | |
567 | * the mapping for the process, then we're thrown here to handle such situation. | |
568 | * | |
569 | * Trap entered via exceptions, so EE bit is set, and interrupts | |
570 | * are masked. This is nice, means we don't have to CLI before state save | |
571 | * | |
572 | * Build a standard exception frame for TLB Access errors. All TLB exceptions | |
573 | * will bail out to this point if they can't resolve the lightweight TLB fault. | |
574 | * | |
575 | * The C function called is in "arch/microblaze/mm/fault.c", declared as: | |
576 | * void do_page_fault(struct pt_regs *regs, | |
577 | * unsigned long address, | |
578 | * unsigned long error_code) | |
579 | */ | |
580 | /* data and intruction trap - which is choose is resolved int fault.c */ | |
581 | C_ENTRY(page_fault_data_trap): | |
ca54502b | 582 | SAVE_STATE /* Save registers.*/ |
06a54604 | 583 | /* PC, before IRQ/trap - this is one instruction above */ |
6e83557c | 584 | swi r17, r1, PT_PC; |
06a54604 | 585 | tovirt(r1,r1) |
ca54502b | 586 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ |
b9ea77e2 | 587 | addik r15, r0, ret_from_exc-8 |
ca54502b | 588 | mfs r6, rear /* parameter unsigned long address */ |
ca54502b | 589 | mfs r7, resr /* parameter unsigned long error_code */ |
c318d483 | 590 | rted r0, do_page_fault |
6e83557c | 591 | addik r5, r1, 0 /* parameter struct pt_regs * regs */ |
ca54502b MS |
592 | |
593 | C_ENTRY(page_fault_instr_trap): | |
ca54502b | 594 | SAVE_STATE /* Save registers.*/ |
06a54604 | 595 | /* PC, before IRQ/trap - this is one instruction above */ |
6e83557c | 596 | swi r17, r1, PT_PC; |
06a54604 | 597 | tovirt(r1,r1) |
ca54502b | 598 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ |
b9ea77e2 | 599 | addik r15, r0, ret_from_exc-8 |
ca54502b | 600 | mfs r6, rear /* parameter unsigned long address */ |
ca54502b | 601 | ori r7, r0, 0 /* parameter unsigned long error_code */ |
9814cc11 | 602 | rted r0, do_page_fault |
6e83557c | 603 | addik r5, r1, 0 /* parameter struct pt_regs * regs */ |
ca54502b MS |
604 | |
605 | /* Entry point used to return from an exception. */ | |
606 | C_ENTRY(ret_from_exc): | |
6e83557c | 607 | lwi r11, r1, PT_MODE; |
ca54502b MS |
608 | bnei r11, 2f; /* See if returning to kernel mode, */ |
609 | /* ... if so, skip resched &c. */ | |
610 | ||
611 | /* We're returning to user mode, so check for various conditions that | |
612 | trigger rescheduling. */ | |
b1d70c62 | 613 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ |
ca54502b MS |
614 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
615 | andi r11, r11, _TIF_NEED_RESCHED; | |
616 | beqi r11, 5f; | |
617 | ||
618 | /* Call the scheduler before returning from a syscall/trap. */ | |
619 | bralid r15, schedule; /* Call scheduler */ | |
620 | nop; /* delay slot */ | |
621 | ||
622 | /* Maybe handle a signal */ | |
b1d70c62 | 623 | 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ |
ca54502b | 624 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
969a9616 | 625 | andi r11, r11, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME; |
ca54502b MS |
626 | beqi r11, 1f; /* Signals to handle, handle them */ |
627 | ||
628 | /* | |
629 | * Handle a signal return; Pending signals should be in r18. | |
630 | * | |
631 | * Not all registers are saved by the normal trap/interrupt entry | |
632 | * points (for instance, call-saved registers (because the normal | |
633 | * C-compiler calling sequence in the kernel makes sure they're | |
634 | * preserved), and call-clobbered registers in the case of | |
635 | * traps), but signal handlers may want to examine or change the | |
636 | * complete register state. Here we save anything not saved by | |
637 | * the normal entry sequence, so that it may be safely restored | |
969a9616 | 638 | * (in a possibly modified form) after do_notify_resume returns. */ |
6e83557c | 639 | addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */ |
969a9616 | 640 | bralid r15, do_notify_resume; /* Handle any signals */ |
83140191 | 641 | addi r6, r0, 0; /* Arg 2: int in_syscall */ |
ca54502b MS |
642 | |
643 | /* Finally, return to user state. */ | |
96014cc3 | 644 | 1: set_bip; /* Ints masked for state restore */ |
8633bebc | 645 | swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */ |
ca54502b MS |
646 | VM_OFF; |
647 | tophys(r1,r1); | |
648 | ||
ca54502b | 649 | RESTORE_REGS; |
6e83557c | 650 | addik r1, r1, PT_SIZE /* Clean up stack space. */ |
ca54502b MS |
651 | |
652 | lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */ | |
653 | bri 6f; | |
654 | /* Return to kernel state. */ | |
96014cc3 MS |
655 | 2: set_bip; /* Ints masked for state restore */ |
656 | VM_OFF; | |
ca54502b | 657 | tophys(r1,r1); |
ca54502b | 658 | RESTORE_REGS; |
6e83557c | 659 | addik r1, r1, PT_SIZE /* Clean up stack space. */ |
ca54502b MS |
660 | |
661 | tovirt(r1,r1); | |
662 | 6: | |
663 | EXC_return: /* Make global symbol for debugging */ | |
664 | rtbd r14, 0; /* Instructions to return from an IRQ */ | |
665 | nop; | |
666 | ||
667 | /* | |
668 | * HW EXCEPTION rutine end | |
669 | */ | |
670 | ||
671 | /* | |
672 | * Hardware maskable interrupts. | |
673 | * | |
674 | * The stack-pointer (r1) should have already been saved to the memory | |
675 | * location PER_CPU(ENTRY_SP). | |
676 | */ | |
677 | C_ENTRY(_interrupt): | |
678 | /* MS: we are in physical address */ | |
679 | /* Save registers, switch to proper stack, convert SP to virtual.*/ | |
680 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) | |
ca54502b | 681 | /* MS: See if already in kernel mode. */ |
653e447e | 682 | mfs r1, rmsr |
5c0d72b1 | 683 | nop |
653e447e MS |
684 | andi r1, r1, MSR_UMS |
685 | bnei r1, 1f | |
ca54502b MS |
686 | |
687 | /* Kernel-mode state save. */ | |
653e447e MS |
688 | lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) |
689 | tophys(r1,r1); /* MS: I have in r1 physical address where stack is */ | |
ca54502b MS |
690 | /* save registers */ |
691 | /* MS: Make room on the stack -> activation record */ | |
6e83557c | 692 | addik r1, r1, -PT_SIZE; |
ca54502b | 693 | SAVE_REGS |
ca54502b | 694 | brid 2f; |
6e83557c | 695 | swi r1, r1, PT_MODE; /* 0 - user mode, 1 - kernel mode */ |
ca54502b MS |
696 | 1: |
697 | /* User-mode state save. */ | |
ca54502b MS |
698 | /* MS: get the saved current */ |
699 | lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); | |
700 | tophys(r1,r1); | |
701 | lwi r1, r1, TS_THREAD_INFO; | |
702 | addik r1, r1, THREAD_SIZE; | |
703 | tophys(r1,r1); | |
704 | /* save registers */ | |
6e83557c | 705 | addik r1, r1, -PT_SIZE; |
ca54502b MS |
706 | SAVE_REGS |
707 | /* calculate mode */ | |
6e83557c | 708 | swi r0, r1, PT_MODE; |
ca54502b | 709 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); |
6e83557c | 710 | swi r11, r1, PT_R1; |
80c5ff6b | 711 | clear_ums; |
ca54502b | 712 | 2: |
b1d70c62 | 713 | lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); |
ca54502b | 714 | tovirt(r1,r1) |
b9ea77e2 | 715 | addik r15, r0, irq_call; |
80c5ff6b | 716 | irq_call:rtbd r0, do_IRQ; |
6e83557c | 717 | addik r5, r1, 0; |
ca54502b MS |
718 | |
719 | /* MS: we are in virtual mode */ | |
720 | ret_from_irq: | |
6e83557c | 721 | lwi r11, r1, PT_MODE; |
ca54502b MS |
722 | bnei r11, 2f; |
723 | ||
b1d70c62 | 724 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; |
ca54502b MS |
725 | lwi r11, r11, TI_FLAGS; /* MS: get flags from thread info */ |
726 | andi r11, r11, _TIF_NEED_RESCHED; | |
727 | beqi r11, 5f | |
728 | bralid r15, schedule; | |
729 | nop; /* delay slot */ | |
730 | ||
731 | /* Maybe handle a signal */ | |
b1d70c62 | 732 | 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* MS: get thread info */ |
ca54502b | 733 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
969a9616 | 734 | andi r11, r11, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME; |
ca54502b MS |
735 | beqid r11, no_intr_resched |
736 | /* Handle a signal return; Pending signals should be in r18. */ | |
6e83557c | 737 | addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */ |
969a9616 | 738 | bralid r15, do_notify_resume; /* Handle any signals */ |
83140191 | 739 | addi r6, r0, 0; /* Arg 2: int in_syscall */ |
ca54502b MS |
740 | |
741 | /* Finally, return to user state. */ | |
742 | no_intr_resched: | |
743 | /* Disable interrupts, we are now committed to the state restore */ | |
744 | disable_irq | |
8633bebc | 745 | swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); |
ca54502b MS |
746 | VM_OFF; |
747 | tophys(r1,r1); | |
ca54502b | 748 | RESTORE_REGS |
6e83557c | 749 | addik r1, r1, PT_SIZE /* MS: Clean up stack space. */ |
ca54502b MS |
750 | lwi r1, r1, PT_R1 - PT_SIZE; |
751 | bri 6f; | |
752 | /* MS: Return to kernel state. */ | |
77753790 MS |
753 | 2: |
754 | #ifdef CONFIG_PREEMPT | |
b1d70c62 | 755 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; |
77753790 MS |
756 | /* MS: get preempt_count from thread info */ |
757 | lwi r5, r11, TI_PREEMPT_COUNT; | |
758 | bgti r5, restore; | |
759 | ||
760 | lwi r5, r11, TI_FLAGS; /* get flags in thread info */ | |
761 | andi r5, r5, _TIF_NEED_RESCHED; | |
762 | beqi r5, restore /* if zero jump over */ | |
763 | ||
764 | preempt: | |
765 | /* interrupts are off that's why I am calling preempt_chedule_irq */ | |
766 | bralid r15, preempt_schedule_irq | |
767 | nop | |
b1d70c62 | 768 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ |
77753790 MS |
769 | lwi r5, r11, TI_FLAGS; /* get flags in thread info */ |
770 | andi r5, r5, _TIF_NEED_RESCHED; | |
771 | bnei r5, preempt /* if non zero jump to resched */ | |
772 | restore: | |
773 | #endif | |
774 | VM_OFF /* MS: turn off MMU */ | |
ca54502b | 775 | tophys(r1,r1) |
ca54502b | 776 | RESTORE_REGS |
6e83557c | 777 | addik r1, r1, PT_SIZE /* MS: Clean up stack space. */ |
ca54502b MS |
778 | tovirt(r1,r1); |
779 | 6: | |
780 | IRQ_return: /* MS: Make global symbol for debugging */ | |
781 | rtid r14, 0 | |
782 | nop | |
783 | ||
784 | /* | |
2d5973cb MS |
785 | * Debug trap for KGDB. Enter to _debug_exception by brki r16, 0x18 |
786 | * and call handling function with saved pt_regs | |
ca54502b MS |
787 | */ |
788 | C_ENTRY(_debug_exception): | |
789 | /* BIP bit is set on entry, no interrupts can occur */ | |
790 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) | |
791 | ||
653e447e | 792 | mfs r1, rmsr |
5c0d72b1 | 793 | nop |
653e447e MS |
794 | andi r1, r1, MSR_UMS |
795 | bnei r1, 1f | |
2d5973cb | 796 | /* MS: Kernel-mode state save - kgdb */ |
653e447e | 797 | lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/ |
ca54502b | 798 | |
2d5973cb | 799 | /* BIP bit is set on entry, no interrupts can occur */ |
6e83557c | 800 | addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; |
ca54502b | 801 | SAVE_REGS; |
2d5973cb | 802 | /* save all regs to pt_reg structure */ |
6e83557c MS |
803 | swi r0, r1, PT_R0; /* R0 must be saved too */ |
804 | swi r14, r1, PT_R14 /* rewrite saved R14 value */ | |
805 | swi r16, r1, PT_PC; /* PC and r16 are the same */ | |
2d5973cb MS |
806 | /* save special purpose registers to pt_regs */ |
807 | mfs r11, rear; | |
6e83557c | 808 | swi r11, r1, PT_EAR; |
2d5973cb | 809 | mfs r11, resr; |
6e83557c | 810 | swi r11, r1, PT_ESR; |
2d5973cb | 811 | mfs r11, rfsr; |
6e83557c | 812 | swi r11, r1, PT_FSR; |
2d5973cb MS |
813 | |
814 | /* stack pointer is in physical address at it is decrease | |
6e83557c MS |
815 | * by PT_SIZE but we need to get correct R1 value */ |
816 | addik r11, r1, CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR + PT_SIZE; | |
817 | swi r11, r1, PT_R1 | |
2d5973cb MS |
818 | /* MS: r31 - current pointer isn't changed */ |
819 | tovirt(r1,r1) | |
820 | #ifdef CONFIG_KGDB | |
6e83557c | 821 | addi r5, r1, 0 /* pass pt_reg address as the first arg */ |
cd341577 | 822 | addik r15, r0, dbtrap_call; /* return address */ |
2d5973cb MS |
823 | rtbd r0, microblaze_kgdb_break |
824 | nop; | |
825 | #endif | |
826 | /* MS: Place handler for brki from kernel space if KGDB is OFF. | |
827 | * It is very unlikely that another brki instruction is called. */ | |
828 | bri 0 | |
ca54502b | 829 | |
2d5973cb MS |
830 | /* MS: User-mode state save - gdb */ |
831 | 1: lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */ | |
ca54502b MS |
832 | tophys(r1,r1); |
833 | lwi r1, r1, TS_THREAD_INFO; /* get the thread info */ | |
834 | addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */ | |
835 | tophys(r1,r1); | |
836 | ||
6e83557c | 837 | addik r1, r1, -PT_SIZE; /* Make room on the stack. */ |
ca54502b | 838 | SAVE_REGS; |
6e83557c MS |
839 | swi r16, r1, PT_PC; /* Save LP */ |
840 | swi r0, r1, PT_MODE; /* Was in user-mode. */ | |
ca54502b | 841 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); |
6e83557c | 842 | swi r11, r1, PT_R1; /* Store user SP. */ |
2d5973cb | 843 | lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); |
ca54502b | 844 | tovirt(r1,r1) |
06b28640 | 845 | set_vms; |
6e83557c | 846 | addik r5, r1, 0; |
b9ea77e2 | 847 | addik r15, r0, dbtrap_call; |
2d5973cb | 848 | dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */ |
751f1605 MS |
849 | rtbd r0, sw_exception |
850 | nop | |
ca54502b | 851 | |
2d5973cb MS |
852 | /* MS: The first instruction for the second part of the gdb/kgdb */ |
853 | set_bip; /* Ints masked for state restore */ | |
6e83557c | 854 | lwi r11, r1, PT_MODE; |
ca54502b | 855 | bnei r11, 2f; |
2d5973cb | 856 | /* MS: Return to user space - gdb */ |
ca54502b | 857 | /* Get current task ptr into r11 */ |
b1d70c62 | 858 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ |
ca54502b MS |
859 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
860 | andi r11, r11, _TIF_NEED_RESCHED; | |
861 | beqi r11, 5f; | |
862 | ||
2d5973cb | 863 | /* Call the scheduler before returning from a syscall/trap. */ |
ca54502b MS |
864 | bralid r15, schedule; /* Call scheduler */ |
865 | nop; /* delay slot */ | |
ca54502b MS |
866 | |
867 | /* Maybe handle a signal */ | |
b1d70c62 | 868 | 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ |
ca54502b | 869 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
969a9616 | 870 | andi r11, r11, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME; |
ca54502b MS |
871 | beqi r11, 1f; /* Signals to handle, handle them */ |
872 | ||
6e83557c | 873 | addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */ |
969a9616 | 874 | bralid r15, do_notify_resume; /* Handle any signals */ |
83140191 | 875 | addi r6, r0, 0; /* Arg 2: int in_syscall */ |
ca54502b | 876 | |
ca54502b | 877 | /* Finally, return to user state. */ |
2d5973cb | 878 | 1: swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */ |
ca54502b MS |
879 | VM_OFF; |
880 | tophys(r1,r1); | |
2d5973cb | 881 | /* MS: Restore all regs */ |
ca54502b | 882 | RESTORE_REGS |
6e83557c | 883 | addik r1, r1, PT_SIZE /* Clean up stack space */ |
2d5973cb MS |
884 | lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer */ |
885 | DBTRAP_return_user: /* MS: Make global symbol for debugging */ | |
886 | rtbd r16, 0; /* MS: Instructions to return from a debug trap */ | |
887 | nop; | |
ca54502b | 888 | |
2d5973cb | 889 | /* MS: Return to kernel state - kgdb */ |
ca54502b MS |
890 | 2: VM_OFF; |
891 | tophys(r1,r1); | |
2d5973cb | 892 | /* MS: Restore all regs */ |
ca54502b | 893 | RESTORE_REGS |
6e83557c MS |
894 | lwi r14, r1, PT_R14; |
895 | lwi r16, r1, PT_PC; | |
896 | addik r1, r1, PT_SIZE; /* MS: Clean up stack space */ | |
ca54502b | 897 | tovirt(r1,r1); |
2d5973cb MS |
898 | DBTRAP_return_kernel: /* MS: Make global symbol for debugging */ |
899 | rtbd r16, 0; /* MS: Instructions to return from a debug trap */ | |
ca54502b MS |
900 | nop; |
901 | ||
902 | ||
ca54502b MS |
903 | ENTRY(_switch_to) |
904 | /* prepare return value */ | |
b1d70c62 | 905 | addk r3, r0, CURRENT_TASK |
ca54502b MS |
906 | |
907 | /* save registers in cpu_context */ | |
908 | /* use r11 and r12, volatile registers, as temp register */ | |
909 | /* give start of cpu_context for previous process */ | |
910 | addik r11, r5, TI_CPU_CONTEXT | |
911 | swi r1, r11, CC_R1 | |
912 | swi r2, r11, CC_R2 | |
913 | /* skip volatile registers. | |
914 | * they are saved on stack when we jumped to _switch_to() */ | |
915 | /* dedicated registers */ | |
916 | swi r13, r11, CC_R13 | |
917 | swi r14, r11, CC_R14 | |
918 | swi r15, r11, CC_R15 | |
919 | swi r16, r11, CC_R16 | |
920 | swi r17, r11, CC_R17 | |
921 | swi r18, r11, CC_R18 | |
922 | /* save non-volatile registers */ | |
923 | swi r19, r11, CC_R19 | |
924 | swi r20, r11, CC_R20 | |
925 | swi r21, r11, CC_R21 | |
926 | swi r22, r11, CC_R22 | |
927 | swi r23, r11, CC_R23 | |
928 | swi r24, r11, CC_R24 | |
929 | swi r25, r11, CC_R25 | |
930 | swi r26, r11, CC_R26 | |
931 | swi r27, r11, CC_R27 | |
932 | swi r28, r11, CC_R28 | |
933 | swi r29, r11, CC_R29 | |
934 | swi r30, r11, CC_R30 | |
935 | /* special purpose registers */ | |
936 | mfs r12, rmsr | |
ca54502b MS |
937 | swi r12, r11, CC_MSR |
938 | mfs r12, rear | |
ca54502b MS |
939 | swi r12, r11, CC_EAR |
940 | mfs r12, resr | |
ca54502b MS |
941 | swi r12, r11, CC_ESR |
942 | mfs r12, rfsr | |
ca54502b MS |
943 | swi r12, r11, CC_FSR |
944 | ||
b1d70c62 MS |
945 | /* update r31, the current-give me pointer to task which will be next */ |
946 | lwi CURRENT_TASK, r6, TI_TASK | |
ca54502b | 947 | /* stored it to current_save too */ |
b1d70c62 | 948 | swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE) |
ca54502b MS |
949 | |
950 | /* get new process' cpu context and restore */ | |
951 | /* give me start where start context of next task */ | |
952 | addik r11, r6, TI_CPU_CONTEXT | |
953 | ||
954 | /* non-volatile registers */ | |
955 | lwi r30, r11, CC_R30 | |
956 | lwi r29, r11, CC_R29 | |
957 | lwi r28, r11, CC_R28 | |
958 | lwi r27, r11, CC_R27 | |
959 | lwi r26, r11, CC_R26 | |
960 | lwi r25, r11, CC_R25 | |
961 | lwi r24, r11, CC_R24 | |
962 | lwi r23, r11, CC_R23 | |
963 | lwi r22, r11, CC_R22 | |
964 | lwi r21, r11, CC_R21 | |
965 | lwi r20, r11, CC_R20 | |
966 | lwi r19, r11, CC_R19 | |
967 | /* dedicated registers */ | |
968 | lwi r18, r11, CC_R18 | |
969 | lwi r17, r11, CC_R17 | |
970 | lwi r16, r11, CC_R16 | |
971 | lwi r15, r11, CC_R15 | |
972 | lwi r14, r11, CC_R14 | |
973 | lwi r13, r11, CC_R13 | |
974 | /* skip volatile registers */ | |
975 | lwi r2, r11, CC_R2 | |
976 | lwi r1, r11, CC_R1 | |
977 | ||
978 | /* special purpose registers */ | |
979 | lwi r12, r11, CC_FSR | |
980 | mts rfsr, r12 | |
ca54502b MS |
981 | lwi r12, r11, CC_MSR |
982 | mts rmsr, r12 | |
ca54502b MS |
983 | |
984 | rtsd r15, 8 | |
985 | nop | |
986 | ||
987 | ENTRY(_reset) | |
7574349c | 988 | brai 0; /* Jump to reset vector */ |
ca54502b | 989 | |
ca54502b MS |
990 | /* These are compiled and loaded into high memory, then |
991 | * copied into place in mach_early_setup */ | |
992 | .section .init.ivt, "ax" | |
0b9b0200 | 993 | #if CONFIG_MANUAL_RESET_VECTOR |
ca54502b | 994 | .org 0x0 |
0b9b0200 MS |
995 | brai CONFIG_MANUAL_RESET_VECTOR |
996 | #endif | |
626afa35 | 997 | .org 0x8 |
ca54502b | 998 | brai TOPHYS(_user_exception); /* syscall handler */ |
626afa35 | 999 | .org 0x10 |
ca54502b | 1000 | brai TOPHYS(_interrupt); /* Interrupt handler */ |
626afa35 | 1001 | .org 0x18 |
751f1605 | 1002 | brai TOPHYS(_debug_exception); /* debug trap handler */ |
626afa35 | 1003 | .org 0x20 |
ca54502b MS |
1004 | brai TOPHYS(_hw_exception_handler); /* HW exception handler */ |
1005 | ||
ca54502b MS |
1006 | .section .rodata,"a" |
1007 | #include "syscall_table.S" | |
1008 | ||
1009 | syscall_table_size=(.-sys_call_table) | |
1010 | ||
ce3266c0 SM |
1011 | type_SYSCALL: |
1012 | .ascii "SYSCALL\0" | |
1013 | type_IRQ: | |
1014 | .ascii "IRQ\0" | |
1015 | type_IRQ_PREEMPT: | |
1016 | .ascii "IRQ (PREEMPTED)\0" | |
1017 | type_SYSCALL_PREEMPT: | |
1018 | .ascii " SYSCALL (PREEMPTED)\0" | |
1019 | ||
1020 | /* | |
1021 | * Trap decoding for stack unwinder | |
1022 | * Tuples are (start addr, end addr, string) | |
1023 | * If return address lies on [start addr, end addr], | |
1024 | * unwinder displays 'string' | |
1025 | */ | |
1026 | ||
1027 | .align 4 | |
1028 | .global microblaze_trap_handlers | |
1029 | microblaze_trap_handlers: | |
1030 | /* Exact matches come first */ | |
1031 | .word ret_from_trap; .word ret_from_trap ; .word type_SYSCALL | |
1032 | .word ret_from_irq ; .word ret_from_irq ; .word type_IRQ | |
1033 | /* Fuzzy matches go here */ | |
1034 | .word ret_from_irq ; .word no_intr_resched ; .word type_IRQ_PREEMPT | |
1035 | .word ret_from_trap; .word TRAP_return ; .word type_SYSCALL_PREEMPT | |
1036 | /* End of table */ | |
1037 | .word 0 ; .word 0 ; .word 0 |