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ca54502b MS |
1 | /* |
2 | * Low-level system-call handling, trap handlers and context-switching | |
3 | * | |
4 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | |
5 | * Copyright (C) 2008-2009 PetaLogix | |
6 | * Copyright (C) 2003 John Williams <jwilliams@itee.uq.edu.au> | |
7 | * Copyright (C) 2001,2002 NEC Corporation | |
8 | * Copyright (C) 2001,2002 Miles Bader <miles@gnu.org> | |
9 | * | |
10 | * This file is subject to the terms and conditions of the GNU General | |
11 | * Public License. See the file COPYING in the main directory of this | |
12 | * archive for more details. | |
13 | * | |
14 | * Written by Miles Bader <miles@gnu.org> | |
15 | * Heavily modified by John Williams for Microblaze | |
16 | */ | |
17 | ||
18 | #include <linux/sys.h> | |
19 | #include <linux/linkage.h> | |
20 | ||
21 | #include <asm/entry.h> | |
22 | #include <asm/current.h> | |
23 | #include <asm/processor.h> | |
24 | #include <asm/exceptions.h> | |
25 | #include <asm/asm-offsets.h> | |
26 | #include <asm/thread_info.h> | |
27 | ||
28 | #include <asm/page.h> | |
29 | #include <asm/unistd.h> | |
30 | ||
31 | #include <linux/errno.h> | |
32 | #include <asm/signal.h> | |
33 | ||
11d51360 MS |
34 | #undef DEBUG |
35 | ||
ca54502b MS |
36 | /* The size of a state save frame. */ |
37 | #define STATE_SAVE_SIZE (PT_SIZE + STATE_SAVE_ARG_SPACE) | |
38 | ||
39 | /* The offset of the struct pt_regs in a `state save frame' on the stack. */ | |
40 | #define PTO STATE_SAVE_ARG_SPACE /* 24 the space for args */ | |
41 | ||
d8748e73 MS |
42 | #ifdef DEBUG |
43 | /* Create space for syscalls counting. */ | |
44 | .section .data | |
45 | .global syscall_debug_table | |
46 | .align 4 | |
47 | syscall_debug_table: | |
48 | .space (__NR_syscalls * 4) | |
49 | #endif /* DEBUG */ | |
50 | ||
ca54502b MS |
51 | #define C_ENTRY(name) .globl name; .align 4; name |
52 | ||
53 | /* | |
54 | * Various ways of setting and clearing BIP in flags reg. | |
55 | * This is mucky, but necessary using microblaze version that | |
56 | * allows msr ops to write to BIP | |
57 | */ | |
58 | #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR | |
59 | .macro clear_bip | |
66f7de86 | 60 | msrclr r0, MSR_BIP |
ca54502b MS |
61 | .endm |
62 | ||
63 | .macro set_bip | |
66f7de86 | 64 | msrset r0, MSR_BIP |
ca54502b MS |
65 | .endm |
66 | ||
67 | .macro clear_eip | |
66f7de86 | 68 | msrclr r0, MSR_EIP |
ca54502b MS |
69 | .endm |
70 | ||
71 | .macro set_ee | |
66f7de86 | 72 | msrset r0, MSR_EE |
ca54502b MS |
73 | .endm |
74 | ||
75 | .macro disable_irq | |
66f7de86 | 76 | msrclr r0, MSR_IE |
ca54502b MS |
77 | .endm |
78 | ||
79 | .macro enable_irq | |
66f7de86 | 80 | msrset r0, MSR_IE |
ca54502b MS |
81 | .endm |
82 | ||
83 | .macro set_ums | |
66f7de86 | 84 | msrset r0, MSR_UMS |
66f7de86 | 85 | msrclr r0, MSR_VMS |
ca54502b MS |
86 | .endm |
87 | ||
88 | .macro set_vms | |
66f7de86 | 89 | msrclr r0, MSR_UMS |
66f7de86 | 90 | msrset r0, MSR_VMS |
ca54502b MS |
91 | .endm |
92 | ||
b318067e | 93 | .macro clear_ums |
66f7de86 | 94 | msrclr r0, MSR_UMS |
b318067e MS |
95 | .endm |
96 | ||
ca54502b | 97 | .macro clear_vms_ums |
66f7de86 | 98 | msrclr r0, MSR_VMS | MSR_UMS |
ca54502b MS |
99 | .endm |
100 | #else | |
101 | .macro clear_bip | |
102 | mfs r11, rmsr | |
ca54502b MS |
103 | andi r11, r11, ~MSR_BIP |
104 | mts rmsr, r11 | |
ca54502b MS |
105 | .endm |
106 | ||
107 | .macro set_bip | |
108 | mfs r11, rmsr | |
ca54502b MS |
109 | ori r11, r11, MSR_BIP |
110 | mts rmsr, r11 | |
ca54502b MS |
111 | .endm |
112 | ||
113 | .macro clear_eip | |
114 | mfs r11, rmsr | |
ca54502b MS |
115 | andi r11, r11, ~MSR_EIP |
116 | mts rmsr, r11 | |
ca54502b MS |
117 | .endm |
118 | ||
119 | .macro set_ee | |
120 | mfs r11, rmsr | |
ca54502b MS |
121 | ori r11, r11, MSR_EE |
122 | mts rmsr, r11 | |
ca54502b MS |
123 | .endm |
124 | ||
125 | .macro disable_irq | |
126 | mfs r11, rmsr | |
ca54502b MS |
127 | andi r11, r11, ~MSR_IE |
128 | mts rmsr, r11 | |
ca54502b MS |
129 | .endm |
130 | ||
131 | .macro enable_irq | |
132 | mfs r11, rmsr | |
ca54502b MS |
133 | ori r11, r11, MSR_IE |
134 | mts rmsr, r11 | |
ca54502b MS |
135 | .endm |
136 | ||
137 | .macro set_ums | |
138 | mfs r11, rmsr | |
ca54502b MS |
139 | ori r11, r11, MSR_VMS |
140 | andni r11, r11, MSR_UMS | |
141 | mts rmsr, r11 | |
ca54502b MS |
142 | .endm |
143 | ||
144 | .macro set_vms | |
145 | mfs r11, rmsr | |
ca54502b MS |
146 | ori r11, r11, MSR_VMS |
147 | andni r11, r11, MSR_UMS | |
148 | mts rmsr, r11 | |
ca54502b MS |
149 | .endm |
150 | ||
b318067e MS |
151 | .macro clear_ums |
152 | mfs r11, rmsr | |
b318067e MS |
153 | andni r11, r11, MSR_UMS |
154 | mts rmsr,r11 | |
b318067e MS |
155 | .endm |
156 | ||
ca54502b MS |
157 | .macro clear_vms_ums |
158 | mfs r11, rmsr | |
ca54502b MS |
159 | andni r11, r11, (MSR_VMS|MSR_UMS) |
160 | mts rmsr,r11 | |
ca54502b MS |
161 | .endm |
162 | #endif | |
163 | ||
164 | /* Define how to call high-level functions. With MMU, virtual mode must be | |
165 | * enabled when calling the high-level function. Clobbers R11. | |
166 | * VM_ON, VM_OFF, DO_JUMP_BIPCLR, DO_CALL | |
167 | */ | |
168 | ||
169 | /* turn on virtual protected mode save */ | |
170 | #define VM_ON \ | |
a4a94dbf | 171 | set_ums; \ |
ca54502b | 172 | rted r0, 2f; \ |
a4a94dbf MS |
173 | nop; \ |
174 | 2: | |
ca54502b MS |
175 | |
176 | /* turn off virtual protected mode save and user mode save*/ | |
177 | #define VM_OFF \ | |
a4a94dbf | 178 | clear_vms_ums; \ |
ca54502b | 179 | rted r0, TOPHYS(1f); \ |
a4a94dbf MS |
180 | nop; \ |
181 | 1: | |
ca54502b MS |
182 | |
183 | #define SAVE_REGS \ | |
184 | swi r2, r1, PTO+PT_R2; /* Save SDA */ \ | |
36f60954 MS |
185 | swi r3, r1, PTO+PT_R3; \ |
186 | swi r4, r1, PTO+PT_R4; \ | |
ca54502b MS |
187 | swi r5, r1, PTO+PT_R5; \ |
188 | swi r6, r1, PTO+PT_R6; \ | |
189 | swi r7, r1, PTO+PT_R7; \ | |
190 | swi r8, r1, PTO+PT_R8; \ | |
191 | swi r9, r1, PTO+PT_R9; \ | |
192 | swi r10, r1, PTO+PT_R10; \ | |
193 | swi r11, r1, PTO+PT_R11; /* save clobbered regs after rval */\ | |
194 | swi r12, r1, PTO+PT_R12; \ | |
195 | swi r13, r1, PTO+PT_R13; /* Save SDA2 */ \ | |
196 | swi r14, r1, PTO+PT_PC; /* PC, before IRQ/trap */ \ | |
197 | swi r15, r1, PTO+PT_R15; /* Save LP */ \ | |
600eb611 MS |
198 | swi r16, r1, PTO+PT_R16; \ |
199 | swi r17, r1, PTO+PT_R17; \ | |
ca54502b MS |
200 | swi r18, r1, PTO+PT_R18; /* Save asm scratch reg */ \ |
201 | swi r19, r1, PTO+PT_R19; \ | |
202 | swi r20, r1, PTO+PT_R20; \ | |
203 | swi r21, r1, PTO+PT_R21; \ | |
204 | swi r22, r1, PTO+PT_R22; \ | |
205 | swi r23, r1, PTO+PT_R23; \ | |
206 | swi r24, r1, PTO+PT_R24; \ | |
207 | swi r25, r1, PTO+PT_R25; \ | |
208 | swi r26, r1, PTO+PT_R26; \ | |
209 | swi r27, r1, PTO+PT_R27; \ | |
210 | swi r28, r1, PTO+PT_R28; \ | |
211 | swi r29, r1, PTO+PT_R29; \ | |
212 | swi r30, r1, PTO+PT_R30; \ | |
213 | swi r31, r1, PTO+PT_R31; /* Save current task reg */ \ | |
214 | mfs r11, rmsr; /* save MSR */ \ | |
ca54502b MS |
215 | swi r11, r1, PTO+PT_MSR; |
216 | ||
217 | #define RESTORE_REGS \ | |
218 | lwi r11, r1, PTO+PT_MSR; \ | |
219 | mts rmsr , r11; \ | |
ca54502b | 220 | lwi r2, r1, PTO+PT_R2; /* restore SDA */ \ |
36f60954 MS |
221 | lwi r3, r1, PTO+PT_R3; \ |
222 | lwi r4, r1, PTO+PT_R4; \ | |
ca54502b MS |
223 | lwi r5, r1, PTO+PT_R5; \ |
224 | lwi r6, r1, PTO+PT_R6; \ | |
225 | lwi r7, r1, PTO+PT_R7; \ | |
226 | lwi r8, r1, PTO+PT_R8; \ | |
227 | lwi r9, r1, PTO+PT_R9; \ | |
228 | lwi r10, r1, PTO+PT_R10; \ | |
229 | lwi r11, r1, PTO+PT_R11; /* restore clobbered regs after rval */\ | |
230 | lwi r12, r1, PTO+PT_R12; \ | |
231 | lwi r13, r1, PTO+PT_R13; /* restore SDA2 */ \ | |
232 | lwi r14, r1, PTO+PT_PC; /* RESTORE_LINK PC, before IRQ/trap */\ | |
233 | lwi r15, r1, PTO+PT_R15; /* restore LP */ \ | |
600eb611 MS |
234 | lwi r16, r1, PTO+PT_R16; \ |
235 | lwi r17, r1, PTO+PT_R17; \ | |
ca54502b MS |
236 | lwi r18, r1, PTO+PT_R18; /* restore asm scratch reg */ \ |
237 | lwi r19, r1, PTO+PT_R19; \ | |
238 | lwi r20, r1, PTO+PT_R20; \ | |
239 | lwi r21, r1, PTO+PT_R21; \ | |
240 | lwi r22, r1, PTO+PT_R22; \ | |
241 | lwi r23, r1, PTO+PT_R23; \ | |
242 | lwi r24, r1, PTO+PT_R24; \ | |
243 | lwi r25, r1, PTO+PT_R25; \ | |
244 | lwi r26, r1, PTO+PT_R26; \ | |
245 | lwi r27, r1, PTO+PT_R27; \ | |
246 | lwi r28, r1, PTO+PT_R28; \ | |
247 | lwi r29, r1, PTO+PT_R29; \ | |
248 | lwi r30, r1, PTO+PT_R30; \ | |
249 | lwi r31, r1, PTO+PT_R31; /* Restore cur task reg */ | |
250 | ||
e5d2af2b MS |
251 | #define SAVE_STATE \ |
252 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* save stack */ \ | |
253 | /* See if already in kernel mode.*/ \ | |
254 | mfs r1, rmsr; \ | |
e5d2af2b MS |
255 | andi r1, r1, MSR_UMS; \ |
256 | bnei r1, 1f; \ | |
257 | /* Kernel-mode state save. */ \ | |
258 | /* Reload kernel stack-ptr. */ \ | |
259 | lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); \ | |
287503fa MS |
260 | /* FIXME: I can add these two lines to one */ \ |
261 | /* tophys(r1,r1); */ \ | |
262 | /* addik r1, r1, -STATE_SAVE_SIZE; */ \ | |
263 | addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE; \ | |
e5d2af2b | 264 | SAVE_REGS \ |
e5d2af2b | 265 | brid 2f; \ |
da233552 | 266 | swi r1, r1, PTO+PT_MODE; \ |
e5d2af2b MS |
267 | 1: /* User-mode state save. */ \ |
268 | lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\ | |
269 | tophys(r1,r1); \ | |
270 | lwi r1, r1, TS_THREAD_INFO; /* get the thread info */ \ | |
287503fa MS |
271 | /* MS these three instructions can be added to one */ \ |
272 | /* addik r1, r1, THREAD_SIZE; */ \ | |
273 | /* tophys(r1,r1); */ \ | |
274 | /* addik r1, r1, -STATE_SAVE_SIZE; */ \ | |
275 | addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE; \ | |
e5d2af2b | 276 | SAVE_REGS \ |
e5d2af2b MS |
277 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \ |
278 | swi r11, r1, PTO+PT_R1; /* Store user SP. */ \ | |
e7741075 | 279 | swi r0, r1, PTO + PT_MODE; /* Was in user-mode. */ \ |
e5d2af2b MS |
280 | /* MS: I am clearing UMS even in case when I come from kernel space */ \ |
281 | clear_ums; \ | |
282 | 2: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); | |
283 | ||
ca54502b MS |
284 | .text |
285 | ||
286 | /* | |
287 | * User trap. | |
288 | * | |
289 | * System calls are handled here. | |
290 | * | |
291 | * Syscall protocol: | |
292 | * Syscall number in r12, args in r5-r10 | |
293 | * Return value in r3 | |
294 | * | |
295 | * Trap entered via brki instruction, so BIP bit is set, and interrupts | |
296 | * are masked. This is nice, means we don't have to CLI before state save | |
297 | */ | |
298 | C_ENTRY(_user_exception): | |
0e41c909 | 299 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */ |
9da63458 MS |
300 | addi r14, r14, 4 /* return address is 4 byte after call */ |
301 | ||
302 | mfs r1, rmsr | |
303 | nop | |
304 | andi r1, r1, MSR_UMS | |
305 | bnei r1, 1f | |
306 | ||
307 | /* Kernel-mode state save - kernel execve */ | |
308 | lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/ | |
309 | tophys(r1,r1); | |
310 | ||
311 | addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */ | |
312 | SAVE_REGS | |
313 | ||
314 | swi r1, r1, PTO + PT_MODE; /* pt_regs -> kernel mode */ | |
315 | brid 2f; | |
316 | nop; /* Fill delay slot */ | |
ca54502b | 317 | |
9da63458 MS |
318 | /* User-mode state save. */ |
319 | 1: | |
ca54502b MS |
320 | lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */ |
321 | tophys(r1,r1); | |
322 | lwi r1, r1, TS_THREAD_INFO; /* get stack from task_struct */ | |
9da63458 MS |
323 | /* calculate kernel stack pointer from task struct 8k */ |
324 | addik r1, r1, THREAD_SIZE; | |
325 | tophys(r1,r1); | |
326 | ||
327 | addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */ | |
ca54502b | 328 | SAVE_REGS |
7d432095 MS |
329 | swi r0, r1, PTO + PT_R3 |
330 | swi r0, r1, PTO + PT_R4 | |
ca54502b | 331 | |
9da63458 | 332 | swi r0, r1, PTO + PT_MODE; /* Was in user-mode. */ |
ca54502b MS |
333 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); |
334 | swi r11, r1, PTO+PT_R1; /* Store user SP. */ | |
25f6e596 | 335 | clear_ums; |
9da63458 | 336 | 2: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); |
ca54502b MS |
337 | /* Save away the syscall number. */ |
338 | swi r12, r1, PTO+PT_R0; | |
339 | tovirt(r1,r1) | |
340 | ||
ca54502b MS |
341 | /* where the trap should return need -8 to adjust for rtsd r15, 8*/ |
342 | /* Jump to the appropriate function for the system call number in r12 | |
343 | * (r12 is not preserved), or return an error if r12 is not valid. The LP | |
344 | * register should point to the location where | |
345 | * the called function should return. [note that MAKE_SYS_CALL uses label 1] */ | |
23575483 | 346 | |
25f6e596 MS |
347 | /* Step into virtual mode */ |
348 | rtbd r0, 3f | |
23575483 MS |
349 | nop |
350 | 3: | |
b1d70c62 | 351 | lwi r11, CURRENT_TASK, TS_THREAD_INFO /* get thread info */ |
23575483 MS |
352 | lwi r11, r11, TI_FLAGS /* get flags in thread info */ |
353 | andi r11, r11, _TIF_WORK_SYSCALL_MASK | |
354 | beqi r11, 4f | |
355 | ||
356 | addik r3, r0, -ENOSYS | |
357 | swi r3, r1, PTO + PT_R3 | |
358 | brlid r15, do_syscall_trace_enter | |
359 | addik r5, r1, PTO + PT_R0 | |
360 | ||
361 | # do_syscall_trace_enter returns the new syscall nr. | |
362 | addk r12, r0, r3 | |
363 | lwi r5, r1, PTO+PT_R5; | |
364 | lwi r6, r1, PTO+PT_R6; | |
365 | lwi r7, r1, PTO+PT_R7; | |
366 | lwi r8, r1, PTO+PT_R8; | |
367 | lwi r9, r1, PTO+PT_R9; | |
368 | lwi r10, r1, PTO+PT_R10; | |
369 | 4: | |
370 | /* Jump to the appropriate function for the system call number in r12 | |
371 | * (r12 is not preserved), or return an error if r12 is not valid. | |
372 | * The LP register should point to the location where the called function | |
373 | * should return. [note that MAKE_SYS_CALL uses label 1] */ | |
374 | /* See if the system call number is valid */ | |
ca54502b | 375 | addi r11, r12, -__NR_syscalls; |
23575483 | 376 | bgei r11,5f; |
ca54502b MS |
377 | /* Figure out which function to use for this system call. */ |
378 | /* Note Microblaze barrel shift is optional, so don't rely on it */ | |
379 | add r12, r12, r12; /* convert num -> ptr */ | |
380 | add r12, r12, r12; | |
381 | ||
11d51360 | 382 | #ifdef DEBUG |
d8748e73 MS |
383 | /* Trac syscalls and stored them to syscall_debug_table */ |
384 | /* The first syscall location stores total syscall number */ | |
385 | lwi r3, r0, syscall_debug_table | |
386 | addi r3, r3, 1 | |
387 | swi r3, r0, syscall_debug_table | |
388 | lwi r3, r12, syscall_debug_table | |
ca54502b | 389 | addi r3, r3, 1 |
d8748e73 | 390 | swi r3, r12, syscall_debug_table |
11d51360 | 391 | #endif |
23575483 MS |
392 | |
393 | # Find and jump into the syscall handler. | |
394 | lwi r12, r12, sys_call_table | |
395 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ | |
b9ea77e2 | 396 | addi r15, r0, ret_from_trap-8 |
23575483 | 397 | bra r12 |
ca54502b | 398 | |
ca54502b | 399 | /* The syscall number is invalid, return an error. */ |
23575483 | 400 | 5: |
9814cc11 | 401 | rtsd r15, 8; /* looks like a normal subroutine return */ |
ca54502b | 402 | addi r3, r0, -ENOSYS; |
ca54502b | 403 | |
23575483 | 404 | /* Entry point used to return from a syscall/trap */ |
ca54502b MS |
405 | /* We re-enable BIP bit before state restore */ |
406 | C_ENTRY(ret_from_trap): | |
b1d70c62 MS |
407 | swi r3, r1, PTO + PT_R3 |
408 | swi r4, r1, PTO + PT_R4 | |
409 | ||
9da63458 MS |
410 | lwi r11, r1, PTO + PT_MODE; |
411 | /* See if returning to kernel mode, if so, skip resched &c. */ | |
412 | bnei r11, 2f; | |
23575483 MS |
413 | /* We're returning to user mode, so check for various conditions that |
414 | * trigger rescheduling. */ | |
b1d70c62 MS |
415 | /* FIXME: Restructure all these flag checks. */ |
416 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ | |
23575483 MS |
417 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
418 | andi r11, r11, _TIF_WORK_SYSCALL_MASK | |
419 | beqi r11, 1f | |
420 | ||
23575483 MS |
421 | brlid r15, do_syscall_trace_leave |
422 | addik r5, r1, PTO + PT_R0 | |
23575483 | 423 | 1: |
ca54502b MS |
424 | /* We're returning to user mode, so check for various conditions that |
425 | * trigger rescheduling. */ | |
b1d70c62 MS |
426 | /* get thread info from current task */ |
427 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; | |
ca54502b MS |
428 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
429 | andi r11, r11, _TIF_NEED_RESCHED; | |
430 | beqi r11, 5f; | |
431 | ||
ca54502b MS |
432 | bralid r15, schedule; /* Call scheduler */ |
433 | nop; /* delay slot */ | |
ca54502b MS |
434 | |
435 | /* Maybe handle a signal */ | |
b1d70c62 MS |
436 | 5: /* get thread info from current task*/ |
437 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; | |
ca54502b MS |
438 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
439 | andi r11, r11, _TIF_SIGPENDING; | |
440 | beqi r11, 1f; /* Signals to handle, handle them */ | |
441 | ||
b9ea77e2 | 442 | addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */ |
ca54502b MS |
443 | addi r7, r0, 1; /* Arg 3: int in_syscall */ |
444 | bralid r15, do_signal; /* Handle any signals */ | |
841d6e8c | 445 | add r6, r0, r0; /* Arg 2: sigset_t *oldset */ |
b1d70c62 MS |
446 | |
447 | /* Finally, return to user state. */ | |
96014cc3 | 448 | 1: set_bip; /* Ints masked for state restore */ |
8633bebc | 449 | swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */ |
ca54502b MS |
450 | VM_OFF; |
451 | tophys(r1,r1); | |
452 | RESTORE_REGS; | |
453 | addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ | |
454 | lwi r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */ | |
9da63458 MS |
455 | bri 6f; |
456 | ||
457 | /* Return to kernel state. */ | |
458 | 2: set_bip; /* Ints masked for state restore */ | |
459 | VM_OFF; | |
460 | tophys(r1,r1); | |
461 | RESTORE_REGS; | |
462 | addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ | |
463 | tovirt(r1,r1); | |
464 | 6: | |
ca54502b MS |
465 | TRAP_return: /* Make global symbol for debugging */ |
466 | rtbd r14, 0; /* Instructions to return from an IRQ */ | |
467 | nop; | |
468 | ||
469 | ||
470 | /* These syscalls need access to the struct pt_regs on the stack, so we | |
471 | implement them in assembly (they're basically all wrappers anyway). */ | |
472 | ||
473 | C_ENTRY(sys_fork_wrapper): | |
474 | addi r5, r0, SIGCHLD /* Arg 0: flags */ | |
475 | lwi r6, r1, PTO+PT_R1 /* Arg 1: child SP (use parent's) */ | |
b9ea77e2 | 476 | addik r7, r1, PTO /* Arg 2: parent context */ |
ca54502b MS |
477 | add r8. r0, r0 /* Arg 3: (unused) */ |
478 | add r9, r0, r0; /* Arg 4: (unused) */ | |
ca54502b | 479 | brid do_fork /* Do real work (tail-call) */ |
9814cc11 | 480 | add r10, r0, r0; /* Arg 5: (unused) */ |
ca54502b MS |
481 | |
482 | /* This the initial entry point for a new child thread, with an appropriate | |
483 | stack in place that makes it look the the child is in the middle of an | |
484 | syscall. This function is actually `returned to' from switch_thread | |
485 | (copy_thread makes ret_from_fork the return address in each new thread's | |
486 | saved context). */ | |
487 | C_ENTRY(ret_from_fork): | |
488 | bralid r15, schedule_tail; /* ...which is schedule_tail's arg */ | |
489 | add r3, r5, r0; /* switch_thread returns the prev task */ | |
490 | /* ( in the delay slot ) */ | |
ca54502b | 491 | brid ret_from_trap; /* Do normal trap return */ |
9814cc11 | 492 | add r3, r0, r0; /* Child's fork call should return 0. */ |
ca54502b | 493 | |
e513588f AB |
494 | C_ENTRY(sys_vfork): |
495 | brid microblaze_vfork /* Do real work (tail-call) */ | |
b9ea77e2 | 496 | addik r5, r1, PTO |
ca54502b | 497 | |
e513588f | 498 | C_ENTRY(sys_clone): |
ca54502b | 499 | bnei r6, 1f; /* See if child SP arg (arg 1) is 0. */ |
570e3e23 | 500 | lwi r6, r1, PTO + PT_R1; /* If so, use paret's stack ptr */ |
b9ea77e2 MS |
501 | 1: addik r7, r1, PTO; /* Arg 2: parent context */ |
502 | add r8, r0, r0; /* Arg 3: (unused) */ | |
503 | add r9, r0, r0; /* Arg 4: (unused) */ | |
b9ea77e2 | 504 | brid do_fork /* Do real work (tail-call) */ |
9814cc11 | 505 | add r10, r0, r0; /* Arg 5: (unused) */ |
ca54502b | 506 | |
e513588f | 507 | C_ENTRY(sys_execve): |
e513588f | 508 | brid microblaze_execve; /* Do real work (tail-call).*/ |
9814cc11 | 509 | addik r8, r1, PTO; /* add user context as 4th arg */ |
ca54502b | 510 | |
ca54502b | 511 | C_ENTRY(sys_rt_sigreturn_wrapper): |
791d0a16 | 512 | brid sys_rt_sigreturn /* Do real work */ |
9814cc11 | 513 | addik r5, r1, PTO; /* add user context as 1st arg */ |
ca54502b MS |
514 | |
515 | /* | |
516 | * HW EXCEPTION rutine start | |
517 | */ | |
ca54502b | 518 | C_ENTRY(full_exception_trap): |
ca54502b MS |
519 | /* adjust exception address for privileged instruction |
520 | * for finding where is it */ | |
521 | addik r17, r17, -4 | |
522 | SAVE_STATE /* Save registers */ | |
06a54604 MS |
523 | /* PC, before IRQ/trap - this is one instruction above */ |
524 | swi r17, r1, PTO+PT_PC; | |
525 | tovirt(r1,r1) | |
ca54502b MS |
526 | /* FIXME this can be store directly in PT_ESR reg. |
527 | * I tested it but there is a fault */ | |
528 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ | |
b9ea77e2 | 529 | addik r15, r0, ret_from_exc - 8 |
ca54502b | 530 | mfs r6, resr |
ca54502b | 531 | mfs r7, rfsr; /* save FSR */ |
131e4e97 | 532 | mts rfsr, r0; /* Clear sticky fsr */ |
c318d483 | 533 | rted r0, full_exception |
9814cc11 | 534 | addik r5, r1, PTO /* parameter struct pt_regs * regs */ |
ca54502b MS |
535 | |
536 | /* | |
537 | * Unaligned data trap. | |
538 | * | |
539 | * Unaligned data trap last on 4k page is handled here. | |
540 | * | |
541 | * Trap entered via exception, so EE bit is set, and interrupts | |
542 | * are masked. This is nice, means we don't have to CLI before state save | |
543 | * | |
544 | * The assembler routine is in "arch/microblaze/kernel/hw_exception_handler.S" | |
545 | */ | |
546 | C_ENTRY(unaligned_data_trap): | |
8b110d15 MS |
547 | /* MS: I have to save r11 value and then restore it because |
548 | * set_bit, clear_eip, set_ee use r11 as temp register if MSR | |
549 | * instructions are not used. We don't need to do if MSR instructions | |
550 | * are used and they use r0 instead of r11. | |
551 | * I am using ENTRY_SP which should be primary used only for stack | |
552 | * pointer saving. */ | |
553 | swi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); | |
554 | set_bip; /* equalize initial state for all possible entries */ | |
555 | clear_eip; | |
556 | set_ee; | |
557 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); | |
ca54502b | 558 | SAVE_STATE /* Save registers.*/ |
06a54604 MS |
559 | /* PC, before IRQ/trap - this is one instruction above */ |
560 | swi r17, r1, PTO+PT_PC; | |
561 | tovirt(r1,r1) | |
ca54502b | 562 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ |
b9ea77e2 | 563 | addik r15, r0, ret_from_exc-8 |
ca54502b | 564 | mfs r3, resr /* ESR */ |
ca54502b | 565 | mfs r4, rear /* EAR */ |
c318d483 | 566 | rtbd r0, _unaligned_data_exception |
b9ea77e2 | 567 | addik r7, r1, PTO /* parameter struct pt_regs * regs */ |
ca54502b MS |
568 | |
569 | /* | |
570 | * Page fault traps. | |
571 | * | |
572 | * If the real exception handler (from hw_exception_handler.S) didn't find | |
573 | * the mapping for the process, then we're thrown here to handle such situation. | |
574 | * | |
575 | * Trap entered via exceptions, so EE bit is set, and interrupts | |
576 | * are masked. This is nice, means we don't have to CLI before state save | |
577 | * | |
578 | * Build a standard exception frame for TLB Access errors. All TLB exceptions | |
579 | * will bail out to this point if they can't resolve the lightweight TLB fault. | |
580 | * | |
581 | * The C function called is in "arch/microblaze/mm/fault.c", declared as: | |
582 | * void do_page_fault(struct pt_regs *regs, | |
583 | * unsigned long address, | |
584 | * unsigned long error_code) | |
585 | */ | |
586 | /* data and intruction trap - which is choose is resolved int fault.c */ | |
587 | C_ENTRY(page_fault_data_trap): | |
ca54502b | 588 | SAVE_STATE /* Save registers.*/ |
06a54604 MS |
589 | /* PC, before IRQ/trap - this is one instruction above */ |
590 | swi r17, r1, PTO+PT_PC; | |
591 | tovirt(r1,r1) | |
ca54502b | 592 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ |
b9ea77e2 | 593 | addik r15, r0, ret_from_exc-8 |
ca54502b | 594 | mfs r6, rear /* parameter unsigned long address */ |
ca54502b | 595 | mfs r7, resr /* parameter unsigned long error_code */ |
c318d483 | 596 | rted r0, do_page_fault |
9814cc11 | 597 | addik r5, r1, PTO /* parameter struct pt_regs * regs */ |
ca54502b MS |
598 | |
599 | C_ENTRY(page_fault_instr_trap): | |
ca54502b | 600 | SAVE_STATE /* Save registers.*/ |
06a54604 MS |
601 | /* PC, before IRQ/trap - this is one instruction above */ |
602 | swi r17, r1, PTO+PT_PC; | |
603 | tovirt(r1,r1) | |
ca54502b | 604 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ |
b9ea77e2 | 605 | addik r15, r0, ret_from_exc-8 |
ca54502b | 606 | mfs r6, rear /* parameter unsigned long address */ |
ca54502b | 607 | ori r7, r0, 0 /* parameter unsigned long error_code */ |
9814cc11 MS |
608 | rted r0, do_page_fault |
609 | addik r5, r1, PTO /* parameter struct pt_regs * regs */ | |
ca54502b MS |
610 | |
611 | /* Entry point used to return from an exception. */ | |
612 | C_ENTRY(ret_from_exc): | |
77f6d226 | 613 | lwi r11, r1, PTO + PT_MODE; |
ca54502b MS |
614 | bnei r11, 2f; /* See if returning to kernel mode, */ |
615 | /* ... if so, skip resched &c. */ | |
616 | ||
617 | /* We're returning to user mode, so check for various conditions that | |
618 | trigger rescheduling. */ | |
b1d70c62 | 619 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ |
ca54502b MS |
620 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
621 | andi r11, r11, _TIF_NEED_RESCHED; | |
622 | beqi r11, 5f; | |
623 | ||
624 | /* Call the scheduler before returning from a syscall/trap. */ | |
625 | bralid r15, schedule; /* Call scheduler */ | |
626 | nop; /* delay slot */ | |
627 | ||
628 | /* Maybe handle a signal */ | |
b1d70c62 | 629 | 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ |
ca54502b MS |
630 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
631 | andi r11, r11, _TIF_SIGPENDING; | |
632 | beqi r11, 1f; /* Signals to handle, handle them */ | |
633 | ||
634 | /* | |
635 | * Handle a signal return; Pending signals should be in r18. | |
636 | * | |
637 | * Not all registers are saved by the normal trap/interrupt entry | |
638 | * points (for instance, call-saved registers (because the normal | |
639 | * C-compiler calling sequence in the kernel makes sure they're | |
640 | * preserved), and call-clobbered registers in the case of | |
641 | * traps), but signal handlers may want to examine or change the | |
642 | * complete register state. Here we save anything not saved by | |
643 | * the normal entry sequence, so that it may be safely restored | |
36f60954 | 644 | * (in a possibly modified form) after do_signal returns. */ |
b9ea77e2 | 645 | addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */ |
ca54502b MS |
646 | addi r7, r0, 0; /* Arg 3: int in_syscall */ |
647 | bralid r15, do_signal; /* Handle any signals */ | |
841d6e8c | 648 | add r6, r0, r0; /* Arg 2: sigset_t *oldset */ |
ca54502b MS |
649 | |
650 | /* Finally, return to user state. */ | |
96014cc3 | 651 | 1: set_bip; /* Ints masked for state restore */ |
8633bebc | 652 | swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */ |
ca54502b MS |
653 | VM_OFF; |
654 | tophys(r1,r1); | |
655 | ||
ca54502b MS |
656 | RESTORE_REGS; |
657 | addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ | |
658 | ||
659 | lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */ | |
660 | bri 6f; | |
661 | /* Return to kernel state. */ | |
96014cc3 MS |
662 | 2: set_bip; /* Ints masked for state restore */ |
663 | VM_OFF; | |
ca54502b | 664 | tophys(r1,r1); |
ca54502b MS |
665 | RESTORE_REGS; |
666 | addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ | |
667 | ||
668 | tovirt(r1,r1); | |
669 | 6: | |
670 | EXC_return: /* Make global symbol for debugging */ | |
671 | rtbd r14, 0; /* Instructions to return from an IRQ */ | |
672 | nop; | |
673 | ||
674 | /* | |
675 | * HW EXCEPTION rutine end | |
676 | */ | |
677 | ||
678 | /* | |
679 | * Hardware maskable interrupts. | |
680 | * | |
681 | * The stack-pointer (r1) should have already been saved to the memory | |
682 | * location PER_CPU(ENTRY_SP). | |
683 | */ | |
684 | C_ENTRY(_interrupt): | |
685 | /* MS: we are in physical address */ | |
686 | /* Save registers, switch to proper stack, convert SP to virtual.*/ | |
687 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) | |
ca54502b | 688 | /* MS: See if already in kernel mode. */ |
653e447e | 689 | mfs r1, rmsr |
5c0d72b1 | 690 | nop |
653e447e MS |
691 | andi r1, r1, MSR_UMS |
692 | bnei r1, 1f | |
ca54502b MS |
693 | |
694 | /* Kernel-mode state save. */ | |
653e447e MS |
695 | lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) |
696 | tophys(r1,r1); /* MS: I have in r1 physical address where stack is */ | |
ca54502b MS |
697 | /* save registers */ |
698 | /* MS: Make room on the stack -> activation record */ | |
699 | addik r1, r1, -STATE_SAVE_SIZE; | |
ca54502b | 700 | SAVE_REGS |
ca54502b | 701 | brid 2f; |
0a6b08fd | 702 | swi r1, r1, PTO + PT_MODE; /* 0 - user mode, 1 - kernel mode */ |
ca54502b MS |
703 | 1: |
704 | /* User-mode state save. */ | |
ca54502b MS |
705 | /* MS: get the saved current */ |
706 | lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); | |
707 | tophys(r1,r1); | |
708 | lwi r1, r1, TS_THREAD_INFO; | |
709 | addik r1, r1, THREAD_SIZE; | |
710 | tophys(r1,r1); | |
711 | /* save registers */ | |
712 | addik r1, r1, -STATE_SAVE_SIZE; | |
ca54502b MS |
713 | SAVE_REGS |
714 | /* calculate mode */ | |
715 | swi r0, r1, PTO + PT_MODE; | |
716 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); | |
717 | swi r11, r1, PTO+PT_R1; | |
80c5ff6b | 718 | clear_ums; |
ca54502b | 719 | 2: |
b1d70c62 | 720 | lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); |
ca54502b | 721 | tovirt(r1,r1) |
b9ea77e2 | 722 | addik r15, r0, irq_call; |
80c5ff6b MS |
723 | irq_call:rtbd r0, do_IRQ; |
724 | addik r5, r1, PTO; | |
ca54502b MS |
725 | |
726 | /* MS: we are in virtual mode */ | |
727 | ret_from_irq: | |
728 | lwi r11, r1, PTO + PT_MODE; | |
729 | bnei r11, 2f; | |
730 | ||
b1d70c62 | 731 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; |
ca54502b MS |
732 | lwi r11, r11, TI_FLAGS; /* MS: get flags from thread info */ |
733 | andi r11, r11, _TIF_NEED_RESCHED; | |
734 | beqi r11, 5f | |
735 | bralid r15, schedule; | |
736 | nop; /* delay slot */ | |
737 | ||
738 | /* Maybe handle a signal */ | |
b1d70c62 | 739 | 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* MS: get thread info */ |
ca54502b MS |
740 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
741 | andi r11, r11, _TIF_SIGPENDING; | |
742 | beqid r11, no_intr_resched | |
743 | /* Handle a signal return; Pending signals should be in r18. */ | |
744 | addi r7, r0, 0; /* Arg 3: int in_syscall */ | |
b9ea77e2 | 745 | addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */ |
ca54502b MS |
746 | bralid r15, do_signal; /* Handle any signals */ |
747 | add r6, r0, r0; /* Arg 2: sigset_t *oldset */ | |
748 | ||
749 | /* Finally, return to user state. */ | |
750 | no_intr_resched: | |
751 | /* Disable interrupts, we are now committed to the state restore */ | |
752 | disable_irq | |
8633bebc | 753 | swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); |
ca54502b MS |
754 | VM_OFF; |
755 | tophys(r1,r1); | |
ca54502b MS |
756 | RESTORE_REGS |
757 | addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */ | |
758 | lwi r1, r1, PT_R1 - PT_SIZE; | |
759 | bri 6f; | |
760 | /* MS: Return to kernel state. */ | |
77753790 MS |
761 | 2: |
762 | #ifdef CONFIG_PREEMPT | |
b1d70c62 | 763 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; |
77753790 MS |
764 | /* MS: get preempt_count from thread info */ |
765 | lwi r5, r11, TI_PREEMPT_COUNT; | |
766 | bgti r5, restore; | |
767 | ||
768 | lwi r5, r11, TI_FLAGS; /* get flags in thread info */ | |
769 | andi r5, r5, _TIF_NEED_RESCHED; | |
770 | beqi r5, restore /* if zero jump over */ | |
771 | ||
772 | preempt: | |
773 | /* interrupts are off that's why I am calling preempt_chedule_irq */ | |
774 | bralid r15, preempt_schedule_irq | |
775 | nop | |
b1d70c62 | 776 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ |
77753790 MS |
777 | lwi r5, r11, TI_FLAGS; /* get flags in thread info */ |
778 | andi r5, r5, _TIF_NEED_RESCHED; | |
779 | bnei r5, preempt /* if non zero jump to resched */ | |
780 | restore: | |
781 | #endif | |
782 | VM_OFF /* MS: turn off MMU */ | |
ca54502b | 783 | tophys(r1,r1) |
ca54502b MS |
784 | RESTORE_REGS |
785 | addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */ | |
786 | tovirt(r1,r1); | |
787 | 6: | |
788 | IRQ_return: /* MS: Make global symbol for debugging */ | |
789 | rtid r14, 0 | |
790 | nop | |
791 | ||
792 | /* | |
2d5973cb MS |
793 | * Debug trap for KGDB. Enter to _debug_exception by brki r16, 0x18 |
794 | * and call handling function with saved pt_regs | |
ca54502b MS |
795 | */ |
796 | C_ENTRY(_debug_exception): | |
797 | /* BIP bit is set on entry, no interrupts can occur */ | |
798 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) | |
799 | ||
653e447e | 800 | mfs r1, rmsr |
5c0d72b1 | 801 | nop |
653e447e MS |
802 | andi r1, r1, MSR_UMS |
803 | bnei r1, 1f | |
2d5973cb | 804 | /* MS: Kernel-mode state save - kgdb */ |
653e447e | 805 | lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/ |
ca54502b | 806 | |
2d5973cb MS |
807 | /* BIP bit is set on entry, no interrupts can occur */ |
808 | addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE; | |
ca54502b | 809 | SAVE_REGS; |
2d5973cb MS |
810 | /* save all regs to pt_reg structure */ |
811 | swi r0, r1, PTO+PT_R0; /* R0 must be saved too */ | |
812 | swi r14, r1, PTO+PT_R14 /* rewrite saved R14 value */ | |
2d5973cb | 813 | swi r16, r1, PTO+PT_PC; /* PC and r16 are the same */ |
2d5973cb MS |
814 | /* save special purpose registers to pt_regs */ |
815 | mfs r11, rear; | |
816 | swi r11, r1, PTO+PT_EAR; | |
817 | mfs r11, resr; | |
818 | swi r11, r1, PTO+PT_ESR; | |
819 | mfs r11, rfsr; | |
820 | swi r11, r1, PTO+PT_FSR; | |
821 | ||
822 | /* stack pointer is in physical address at it is decrease | |
823 | * by STATE_SAVE_SIZE but we need to get correct R1 value */ | |
824 | addik r11, r1, CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR + STATE_SAVE_SIZE; | |
825 | swi r11, r1, PTO+PT_R1 | |
826 | /* MS: r31 - current pointer isn't changed */ | |
827 | tovirt(r1,r1) | |
828 | #ifdef CONFIG_KGDB | |
829 | addi r5, r1, PTO /* pass pt_reg address as the first arg */ | |
830 | la r15, r0, dbtrap_call; /* return address */ | |
831 | rtbd r0, microblaze_kgdb_break | |
832 | nop; | |
833 | #endif | |
834 | /* MS: Place handler for brki from kernel space if KGDB is OFF. | |
835 | * It is very unlikely that another brki instruction is called. */ | |
836 | bri 0 | |
ca54502b | 837 | |
2d5973cb MS |
838 | /* MS: User-mode state save - gdb */ |
839 | 1: lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */ | |
ca54502b MS |
840 | tophys(r1,r1); |
841 | lwi r1, r1, TS_THREAD_INFO; /* get the thread info */ | |
842 | addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */ | |
843 | tophys(r1,r1); | |
844 | ||
845 | addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */ | |
ca54502b | 846 | SAVE_REGS; |
751f1605 | 847 | swi r16, r1, PTO+PT_PC; /* Save LP */ |
77f6d226 | 848 | swi r0, r1, PTO + PT_MODE; /* Was in user-mode. */ |
ca54502b MS |
849 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); |
850 | swi r11, r1, PTO+PT_R1; /* Store user SP. */ | |
2d5973cb | 851 | lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); |
ca54502b | 852 | tovirt(r1,r1) |
06b28640 | 853 | set_vms; |
751f1605 | 854 | addik r5, r1, PTO; |
b9ea77e2 | 855 | addik r15, r0, dbtrap_call; |
2d5973cb | 856 | dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */ |
751f1605 MS |
857 | rtbd r0, sw_exception |
858 | nop | |
ca54502b | 859 | |
2d5973cb MS |
860 | /* MS: The first instruction for the second part of the gdb/kgdb */ |
861 | set_bip; /* Ints masked for state restore */ | |
77f6d226 | 862 | lwi r11, r1, PTO + PT_MODE; |
ca54502b | 863 | bnei r11, 2f; |
2d5973cb | 864 | /* MS: Return to user space - gdb */ |
ca54502b | 865 | /* Get current task ptr into r11 */ |
b1d70c62 | 866 | lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ |
ca54502b MS |
867 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
868 | andi r11, r11, _TIF_NEED_RESCHED; | |
869 | beqi r11, 5f; | |
870 | ||
2d5973cb | 871 | /* Call the scheduler before returning from a syscall/trap. */ |
ca54502b MS |
872 | bralid r15, schedule; /* Call scheduler */ |
873 | nop; /* delay slot */ | |
ca54502b MS |
874 | |
875 | /* Maybe handle a signal */ | |
b1d70c62 | 876 | 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ |
ca54502b MS |
877 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ |
878 | andi r11, r11, _TIF_SIGPENDING; | |
879 | beqi r11, 1f; /* Signals to handle, handle them */ | |
880 | ||
b9ea77e2 | 881 | addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */ |
ca54502b MS |
882 | addi r7, r0, 0; /* Arg 3: int in_syscall */ |
883 | bralid r15, do_signal; /* Handle any signals */ | |
841d6e8c | 884 | add r6, r0, r0; /* Arg 2: sigset_t *oldset */ |
ca54502b | 885 | |
ca54502b | 886 | /* Finally, return to user state. */ |
2d5973cb | 887 | 1: swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */ |
ca54502b MS |
888 | VM_OFF; |
889 | tophys(r1,r1); | |
2d5973cb | 890 | /* MS: Restore all regs */ |
ca54502b | 891 | RESTORE_REGS |
2d5973cb MS |
892 | addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space */ |
893 | lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer */ | |
894 | DBTRAP_return_user: /* MS: Make global symbol for debugging */ | |
895 | rtbd r16, 0; /* MS: Instructions to return from a debug trap */ | |
896 | nop; | |
ca54502b | 897 | |
2d5973cb | 898 | /* MS: Return to kernel state - kgdb */ |
ca54502b MS |
899 | 2: VM_OFF; |
900 | tophys(r1,r1); | |
2d5973cb | 901 | /* MS: Restore all regs */ |
ca54502b | 902 | RESTORE_REGS |
2d5973cb MS |
903 | lwi r14, r1, PTO+PT_R14; |
904 | lwi r16, r1, PTO+PT_PC; | |
2d5973cb | 905 | addik r1, r1, STATE_SAVE_SIZE; /* MS: Clean up stack space */ |
ca54502b | 906 | tovirt(r1,r1); |
2d5973cb MS |
907 | DBTRAP_return_kernel: /* MS: Make global symbol for debugging */ |
908 | rtbd r16, 0; /* MS: Instructions to return from a debug trap */ | |
ca54502b MS |
909 | nop; |
910 | ||
911 | ||
ca54502b MS |
912 | ENTRY(_switch_to) |
913 | /* prepare return value */ | |
b1d70c62 | 914 | addk r3, r0, CURRENT_TASK |
ca54502b MS |
915 | |
916 | /* save registers in cpu_context */ | |
917 | /* use r11 and r12, volatile registers, as temp register */ | |
918 | /* give start of cpu_context for previous process */ | |
919 | addik r11, r5, TI_CPU_CONTEXT | |
920 | swi r1, r11, CC_R1 | |
921 | swi r2, r11, CC_R2 | |
922 | /* skip volatile registers. | |
923 | * they are saved on stack when we jumped to _switch_to() */ | |
924 | /* dedicated registers */ | |
925 | swi r13, r11, CC_R13 | |
926 | swi r14, r11, CC_R14 | |
927 | swi r15, r11, CC_R15 | |
928 | swi r16, r11, CC_R16 | |
929 | swi r17, r11, CC_R17 | |
930 | swi r18, r11, CC_R18 | |
931 | /* save non-volatile registers */ | |
932 | swi r19, r11, CC_R19 | |
933 | swi r20, r11, CC_R20 | |
934 | swi r21, r11, CC_R21 | |
935 | swi r22, r11, CC_R22 | |
936 | swi r23, r11, CC_R23 | |
937 | swi r24, r11, CC_R24 | |
938 | swi r25, r11, CC_R25 | |
939 | swi r26, r11, CC_R26 | |
940 | swi r27, r11, CC_R27 | |
941 | swi r28, r11, CC_R28 | |
942 | swi r29, r11, CC_R29 | |
943 | swi r30, r11, CC_R30 | |
944 | /* special purpose registers */ | |
945 | mfs r12, rmsr | |
ca54502b MS |
946 | swi r12, r11, CC_MSR |
947 | mfs r12, rear | |
ca54502b MS |
948 | swi r12, r11, CC_EAR |
949 | mfs r12, resr | |
ca54502b MS |
950 | swi r12, r11, CC_ESR |
951 | mfs r12, rfsr | |
ca54502b MS |
952 | swi r12, r11, CC_FSR |
953 | ||
b1d70c62 MS |
954 | /* update r31, the current-give me pointer to task which will be next */ |
955 | lwi CURRENT_TASK, r6, TI_TASK | |
ca54502b | 956 | /* stored it to current_save too */ |
b1d70c62 | 957 | swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE) |
ca54502b MS |
958 | |
959 | /* get new process' cpu context and restore */ | |
960 | /* give me start where start context of next task */ | |
961 | addik r11, r6, TI_CPU_CONTEXT | |
962 | ||
963 | /* non-volatile registers */ | |
964 | lwi r30, r11, CC_R30 | |
965 | lwi r29, r11, CC_R29 | |
966 | lwi r28, r11, CC_R28 | |
967 | lwi r27, r11, CC_R27 | |
968 | lwi r26, r11, CC_R26 | |
969 | lwi r25, r11, CC_R25 | |
970 | lwi r24, r11, CC_R24 | |
971 | lwi r23, r11, CC_R23 | |
972 | lwi r22, r11, CC_R22 | |
973 | lwi r21, r11, CC_R21 | |
974 | lwi r20, r11, CC_R20 | |
975 | lwi r19, r11, CC_R19 | |
976 | /* dedicated registers */ | |
977 | lwi r18, r11, CC_R18 | |
978 | lwi r17, r11, CC_R17 | |
979 | lwi r16, r11, CC_R16 | |
980 | lwi r15, r11, CC_R15 | |
981 | lwi r14, r11, CC_R14 | |
982 | lwi r13, r11, CC_R13 | |
983 | /* skip volatile registers */ | |
984 | lwi r2, r11, CC_R2 | |
985 | lwi r1, r11, CC_R1 | |
986 | ||
987 | /* special purpose registers */ | |
988 | lwi r12, r11, CC_FSR | |
989 | mts rfsr, r12 | |
ca54502b MS |
990 | lwi r12, r11, CC_MSR |
991 | mts rmsr, r12 | |
ca54502b MS |
992 | |
993 | rtsd r15, 8 | |
994 | nop | |
995 | ||
996 | ENTRY(_reset) | |
997 | brai 0x70; /* Jump back to FS-boot */ | |
998 | ||
ca54502b MS |
999 | /* These are compiled and loaded into high memory, then |
1000 | * copied into place in mach_early_setup */ | |
1001 | .section .init.ivt, "ax" | |
1002 | .org 0x0 | |
1003 | /* this is very important - here is the reset vector */ | |
1004 | /* in current MMU branch you don't care what is here - it is | |
1005 | * used from bootloader site - but this is correct for FS-BOOT */ | |
1006 | brai 0x70 | |
1007 | nop | |
1008 | brai TOPHYS(_user_exception); /* syscall handler */ | |
1009 | brai TOPHYS(_interrupt); /* Interrupt handler */ | |
751f1605 | 1010 | brai TOPHYS(_debug_exception); /* debug trap handler */ |
ca54502b MS |
1011 | brai TOPHYS(_hw_exception_handler); /* HW exception handler */ |
1012 | ||
ca54502b MS |
1013 | .section .rodata,"a" |
1014 | #include "syscall_table.S" | |
1015 | ||
1016 | syscall_table_size=(.-sys_call_table) | |
1017 | ||
ce3266c0 SM |
1018 | type_SYSCALL: |
1019 | .ascii "SYSCALL\0" | |
1020 | type_IRQ: | |
1021 | .ascii "IRQ\0" | |
1022 | type_IRQ_PREEMPT: | |
1023 | .ascii "IRQ (PREEMPTED)\0" | |
1024 | type_SYSCALL_PREEMPT: | |
1025 | .ascii " SYSCALL (PREEMPTED)\0" | |
1026 | ||
1027 | /* | |
1028 | * Trap decoding for stack unwinder | |
1029 | * Tuples are (start addr, end addr, string) | |
1030 | * If return address lies on [start addr, end addr], | |
1031 | * unwinder displays 'string' | |
1032 | */ | |
1033 | ||
1034 | .align 4 | |
1035 | .global microblaze_trap_handlers | |
1036 | microblaze_trap_handlers: | |
1037 | /* Exact matches come first */ | |
1038 | .word ret_from_trap; .word ret_from_trap ; .word type_SYSCALL | |
1039 | .word ret_from_irq ; .word ret_from_irq ; .word type_IRQ | |
1040 | /* Fuzzy matches go here */ | |
1041 | .word ret_from_irq ; .word no_intr_resched ; .word type_IRQ_PREEMPT | |
1042 | .word ret_from_trap; .word TRAP_return ; .word type_SYSCALL_PREEMPT | |
1043 | /* End of table */ | |
1044 | .word 0 ; .word 0 ; .word 0 |