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c4df4bc1 MS |
1 | /* |
2 | * HW exception handling | |
3 | * | |
4 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | |
5 | * Copyright (C) 2008 PetaLogix | |
6 | * | |
7 | * This file is subject to the terms and conditions of the GNU General | |
8 | * Public License. See the file COPYING in the main directory of this | |
9 | * archive for more details. | |
10 | */ | |
11 | ||
12 | /* | |
13 | * This file handles the architecture-dependent parts of hardware exceptions | |
14 | */ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/signal.h> | |
18 | #include <linux/sched.h> | |
19 | #include <linux/kallsyms.h> | |
20 | #include <linux/module.h> | |
21 | ||
22 | #include <asm/exceptions.h> | |
23 | #include <asm/entry.h> /* For KM CPU var */ | |
4bb73c3d MS |
24 | #include <linux/uaccess.h> |
25 | #include <linux/errno.h> | |
26 | #include <linux/ptrace.h> | |
c4df4bc1 MS |
27 | #include <asm/current.h> |
28 | ||
29 | #define MICROBLAZE_ILL_OPCODE_EXCEPTION 0x02 | |
30 | #define MICROBLAZE_IBUS_EXCEPTION 0x03 | |
31 | #define MICROBLAZE_DBUS_EXCEPTION 0x04 | |
32 | #define MICROBLAZE_DIV_ZERO_EXCEPTION 0x05 | |
33 | #define MICROBLAZE_FPU_EXCEPTION 0x06 | |
4bb73c3d | 34 | #define MICROBLAZE_PRIVILEGED_EXCEPTION 0x07 |
c4df4bc1 MS |
35 | |
36 | static DEFINE_SPINLOCK(die_lock); | |
37 | ||
38 | void die(const char *str, struct pt_regs *fp, long err) | |
39 | { | |
40 | console_verbose(); | |
41 | spin_lock_irq(&die_lock); | |
42 | printk(KERN_WARNING "Oops: %s, sig: %ld\n", str, err); | |
43 | show_regs(fp); | |
44 | spin_unlock_irq(&die_lock); | |
45 | /* do_exit() should take care of panic'ing from an interrupt | |
46 | * context so we don't handle it here | |
47 | */ | |
48 | do_exit(err); | |
49 | } | |
50 | ||
751f1605 MS |
51 | /* for user application debugging */ |
52 | void sw_exception(struct pt_regs *regs) | |
53 | { | |
54 | _exception(SIGTRAP, regs, TRAP_BRKPT, regs->r16); | |
55 | } | |
56 | ||
c4df4bc1 MS |
57 | void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr) |
58 | { | |
59 | siginfo_t info; | |
60 | ||
61 | if (kernel_mode(regs)) { | |
c4df4bc1 MS |
62 | die("Exception in kernel mode", regs, signr); |
63 | } | |
64 | info.si_signo = signr; | |
65 | info.si_errno = 0; | |
66 | info.si_code = code; | |
67 | info.si_addr = (void __user *) addr; | |
68 | force_sig_info(signr, &info, current); | |
69 | } | |
70 | ||
71 | asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, | |
72 | int fsr, int addr) | |
73 | { | |
4bb73c3d MS |
74 | #ifdef CONFIG_MMU |
75 | int code; | |
76 | addr = regs->pc; | |
77 | #endif | |
78 | ||
c4df4bc1 | 79 | #if 0 |
bfc32ad0 MS |
80 | printk(KERN_WARNING "Exception %02x in %s mode, FSR=%08x PC=%08x " \ |
81 | "ESR=%08x\n", | |
c4df4bc1 MS |
82 | type, user_mode(regs) ? "user" : "kernel", fsr, |
83 | (unsigned int) regs->pc, (unsigned int) regs->esr); | |
84 | #endif | |
85 | ||
86 | switch (type & 0x1F) { | |
87 | case MICROBLAZE_ILL_OPCODE_EXCEPTION: | |
4bb73c3d | 88 | if (user_mode(regs)) { |
c4554c32 | 89 | pr_debug("Illegal opcode exception in user mode\n"); |
4bb73c3d MS |
90 | _exception(SIGILL, regs, ILL_ILLOPC, addr); |
91 | return; | |
92 | } | |
bfc32ad0 MS |
93 | printk(KERN_WARNING "Illegal opcode exception " \ |
94 | "in kernel mode.\n"); | |
4bb73c3d | 95 | die("opcode exception", regs, SIGBUS); |
c4df4bc1 MS |
96 | break; |
97 | case MICROBLAZE_IBUS_EXCEPTION: | |
98 | if (user_mode(regs)) { | |
c4554c32 | 99 | pr_debug("Instruction bus error exception in user mode\n"); |
c4df4bc1 MS |
100 | _exception(SIGBUS, regs, BUS_ADRERR, addr); |
101 | return; | |
102 | } | |
bfc32ad0 MS |
103 | printk(KERN_WARNING "Instruction bus error exception " \ |
104 | "in kernel mode.\n"); | |
c4df4bc1 MS |
105 | die("bus exception", regs, SIGBUS); |
106 | break; | |
107 | case MICROBLAZE_DBUS_EXCEPTION: | |
108 | if (user_mode(regs)) { | |
c4554c32 | 109 | pr_debug("Data bus error exception in user mode\n"); |
c4df4bc1 MS |
110 | _exception(SIGBUS, regs, BUS_ADRERR, addr); |
111 | return; | |
112 | } | |
bfc32ad0 MS |
113 | printk(KERN_WARNING "Data bus error exception " \ |
114 | "in kernel mode.\n"); | |
c4df4bc1 MS |
115 | die("bus exception", regs, SIGBUS); |
116 | break; | |
117 | case MICROBLAZE_DIV_ZERO_EXCEPTION: | |
4bb73c3d | 118 | if (user_mode(regs)) { |
c4554c32 | 119 | pr_debug("Divide by zero exception in user mode\n"); |
23902d95 | 120 | _exception(SIGILL, regs, FPE_INTDIV, addr); |
4bb73c3d MS |
121 | return; |
122 | } | |
bfc32ad0 MS |
123 | printk(KERN_WARNING "Divide by zero exception " \ |
124 | "in kernel mode.\n"); | |
f3ff8212 | 125 | die("Divide by zero exception", regs, SIGBUS); |
c4df4bc1 | 126 | break; |
c4df4bc1 | 127 | case MICROBLAZE_FPU_EXCEPTION: |
c4554c32 | 128 | pr_debug("FPU exception\n"); |
c4df4bc1 MS |
129 | /* IEEE FP exception */ |
130 | /* I removed fsr variable and use code var for storing fsr */ | |
131 | if (fsr & FSR_IO) | |
132 | fsr = FPE_FLTINV; | |
133 | else if (fsr & FSR_OF) | |
134 | fsr = FPE_FLTOVF; | |
135 | else if (fsr & FSR_UF) | |
136 | fsr = FPE_FLTUND; | |
137 | else if (fsr & FSR_DZ) | |
138 | fsr = FPE_FLTDIV; | |
139 | else if (fsr & FSR_DO) | |
140 | fsr = FPE_FLTRES; | |
141 | _exception(SIGFPE, regs, fsr, addr); | |
142 | break; | |
143 | ||
4bb73c3d MS |
144 | #ifdef CONFIG_MMU |
145 | case MICROBLAZE_PRIVILEGED_EXCEPTION: | |
c4554c32 | 146 | pr_debug("Privileged exception\n"); |
751f1605 | 147 | /* "brk r0,r0" - used as debug breakpoint - old toolchain */ |
4bb73c3d MS |
148 | if (get_user(code, (unsigned long *)regs->pc) == 0 |
149 | && code == 0x980c0000) { | |
150 | _exception(SIGTRAP, regs, TRAP_BRKPT, addr); | |
151 | } else { | |
152 | _exception(SIGILL, regs, ILL_PRVOPC, addr); | |
153 | } | |
154 | break; | |
155 | #endif | |
c4df4bc1 | 156 | default: |
4bb73c3d | 157 | /* FIXME what to do in unexpected exception */ |
c4df4bc1 MS |
158 | printk(KERN_WARNING "Unexpected exception %02x " |
159 | "PC=%08x in %s mode\n", type, (unsigned int) addr, | |
160 | kernel_mode(regs) ? "kernel" : "user"); | |
161 | } | |
162 | return; | |
163 | } |