]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - arch/microblaze/kernel/process.c
nohz: Remove tick_nohz_idle_enter_norcu() / tick_nohz_idle_exit_norcu()
[mirror_ubuntu-artful-kernel.git] / arch / microblaze / kernel / process.c
CommitLineData
6496a23a
MS
1/*
2 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2008-2009 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/module.h>
12#include <linux/sched.h>
13#include <linux/pm.h>
14#include <linux/tick.h>
15#include <linux/bitops.h>
16#include <asm/system.h>
17#include <asm/pgalloc.h>
40db0834 18#include <asm/uaccess.h> /* for USER_DS macros */
a1f55113 19#include <asm/cacheflush.h>
6496a23a
MS
20
21void show_regs(struct pt_regs *regs)
22{
ac3efab5 23 printk(KERN_INFO " Registers dump: mode=%X\r\n", regs->pt_mode);
6496a23a
MS
24 printk(KERN_INFO " r1=%08lX, r2=%08lX, r3=%08lX, r4=%08lX\n",
25 regs->r1, regs->r2, regs->r3, regs->r4);
26 printk(KERN_INFO " r5=%08lX, r6=%08lX, r7=%08lX, r8=%08lX\n",
27 regs->r5, regs->r6, regs->r7, regs->r8);
28 printk(KERN_INFO " r9=%08lX, r10=%08lX, r11=%08lX, r12=%08lX\n",
29 regs->r9, regs->r10, regs->r11, regs->r12);
30 printk(KERN_INFO " r13=%08lX, r14=%08lX, r15=%08lX, r16=%08lX\n",
31 regs->r13, regs->r14, regs->r15, regs->r16);
32 printk(KERN_INFO " r17=%08lX, r18=%08lX, r19=%08lX, r20=%08lX\n",
33 regs->r17, regs->r18, regs->r19, regs->r20);
34 printk(KERN_INFO " r21=%08lX, r22=%08lX, r23=%08lX, r24=%08lX\n",
35 regs->r21, regs->r22, regs->r23, regs->r24);
36 printk(KERN_INFO " r25=%08lX, r26=%08lX, r27=%08lX, r28=%08lX\n",
37 regs->r25, regs->r26, regs->r27, regs->r28);
38 printk(KERN_INFO " r29=%08lX, r30=%08lX, r31=%08lX, rPC=%08lX\n",
39 regs->r29, regs->r30, regs->r31, regs->pc);
40 printk(KERN_INFO " msr=%08lX, ear=%08lX, esr=%08lX, fsr=%08lX\n",
41 regs->msr, regs->ear, regs->esr, regs->fsr);
6496a23a
MS
42}
43
44void (*pm_idle)(void);
45void (*pm_power_off)(void) = NULL;
46EXPORT_SYMBOL(pm_power_off);
47
48static int hlt_counter = 1;
49
50void disable_hlt(void)
51{
52 hlt_counter++;
53}
54EXPORT_SYMBOL(disable_hlt);
55
56void enable_hlt(void)
57{
58 hlt_counter--;
59}
60EXPORT_SYMBOL(enable_hlt);
61
62static int __init nohlt_setup(char *__unused)
63{
64 hlt_counter = 1;
65 return 1;
66}
67__setup("nohlt", nohlt_setup);
68
69static int __init hlt_setup(char *__unused)
70{
71 hlt_counter = 0;
72 return 1;
73}
74__setup("hlt", hlt_setup);
75
76void default_idle(void)
77{
78ebfa88 78 if (likely(hlt_counter)) {
d0f140e0
MS
79 local_irq_disable();
80 stop_critical_timings();
81 cpu_relax();
82 start_critical_timings();
83 local_irq_enable();
78ebfa88 84 } else {
6496a23a
MS
85 clear_thread_flag(TIF_POLLING_NRFLAG);
86 smp_mb__after_clear_bit();
87 local_irq_disable();
88 while (!need_resched())
89 cpu_sleep();
90 local_irq_enable();
91 set_thread_flag(TIF_POLLING_NRFLAG);
78ebfa88 92 }
6496a23a
MS
93}
94
95void cpu_idle(void)
96{
97 set_thread_flag(TIF_POLLING_NRFLAG);
98
99 /* endless idle loop with no priority at all */
100 while (1) {
101 void (*idle)(void) = pm_idle;
102
103 if (!idle)
104 idle = default_idle;
105
1268fbc7
FW
106 tick_nohz_idle_enter();
107 rcu_idle_enter();
6496a23a
MS
108 while (!need_resched())
109 idle();
1268fbc7
FW
110 rcu_idle_exit();
111 tick_nohz_idle_exit();
6496a23a
MS
112
113 preempt_enable_no_resched();
114 schedule();
115 preempt_disable();
116 check_pgt_cache();
117 }
118}
119
120void flush_thread(void)
121{
122}
123
a8fb748e 124int copy_thread(unsigned long clone_flags, unsigned long usp,
6496a23a
MS
125 unsigned long unused,
126 struct task_struct *p, struct pt_regs *regs)
127{
128 struct pt_regs *childregs = task_pt_regs(p);
129 struct thread_info *ti = task_thread_info(p);
130
131 *childregs = *regs;
132 if (user_mode(regs))
133 childregs->r1 = usp;
134 else
135 childregs->r1 = ((unsigned long) ti) + THREAD_SIZE;
136
5233806d 137#ifndef CONFIG_MMU
6496a23a
MS
138 memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
139 ti->cpu_context.r1 = (unsigned long)childregs;
140 ti->cpu_context.msr = (unsigned long)childregs->msr;
5233806d
MS
141#else
142
143 /* if creating a kernel thread then update the current reg (we don't
144 * want to use the parent's value when restoring by POP_STATE) */
145 if (kernel_mode(regs))
146 /* save new current on stack to use POP_STATE */
147 childregs->CURRENT_TASK = (unsigned long)p;
148 /* if returning to user then use the parent's value of this register */
149
150 /* if we're creating a new kernel thread then just zeroing all
151 * the registers. That's OK for a brand new thread.*/
152 /* Pls. note that some of them will be restored in POP_STATE */
153 if (kernel_mode(regs))
154 memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
155 /* if this thread is created for fork/vfork/clone, then we want to
156 * restore all the parent's context */
157 /* in addition to the registers which will be restored by POP_STATE */
158 else {
159 ti->cpu_context = *(struct cpu_context *)regs;
160 childregs->msr |= MSR_UMS;
161 }
162
163 /* FIXME STATE_SAVE_PT_OFFSET; */
6e83557c 164 ti->cpu_context.r1 = (unsigned long)childregs;
5233806d
MS
165 /* we should consider the fact that childregs is a copy of the parent
166 * regs which were saved immediately after entering the kernel state
167 * before enabling VM. This MSR will be restored in switch_to and
168 * RETURN() and we want to have the right machine state there
169 * specifically this state must have INTs disabled before and enabled
170 * after performing rtbd
171 * compose the right MSR for RETURN(). It will work for switch_to also
172 * excepting for VM and UMS
173 * don't touch UMS , CARRY and cache bits
174 * right now MSR is a copy of parent one */
175 childregs->msr |= MSR_BIP;
176 childregs->msr &= ~MSR_EIP;
177 childregs->msr |= MSR_IE;
178 childregs->msr &= ~MSR_VM;
179 childregs->msr |= MSR_VMS;
180 childregs->msr |= MSR_EE; /* exceptions will be enabled*/
181
182 ti->cpu_context.msr = (childregs->msr|MSR_VM);
183 ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */
84ac218f 184 ti->cpu_context.msr &= ~MSR_IE;
5233806d 185#endif
6496a23a
MS
186 ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8;
187
188 if (clone_flags & CLONE_SETTLS)
189 ;
190
191 return 0;
192}
193
5233806d 194#ifndef CONFIG_MMU
6496a23a
MS
195/*
196 * Return saved PC of a blocked thread.
197 */
198unsigned long thread_saved_pc(struct task_struct *tsk)
199{
200 struct cpu_context *ctx =
201 &(((struct thread_info *)(tsk->stack))->cpu_context);
202
203 /* Check whether the thread is blocked in resume() */
204 if (in_sched_functions(ctx->r15))
205 return (unsigned long)ctx->r15;
206 else
207 return ctx->r14;
208}
5233806d 209#endif
6496a23a
MS
210
211static void kernel_thread_helper(int (*fn)(void *), void *arg)
212{
213 fn(arg);
214 do_exit(-1);
215}
216
217int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
218{
219 struct pt_regs regs;
6496a23a
MS
220
221 memset(&regs, 0, sizeof(regs));
222 /* store them in non-volatile registers */
223 regs.r5 = (unsigned long)fn;
224 regs.r6 = (unsigned long)arg;
225 local_save_flags(regs.msr);
226 regs.pc = (unsigned long)kernel_thread_helper;
ac3efab5 227 regs.pt_mode = 1;
6496a23a 228
6714fcc3 229 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0,
6496a23a 230 &regs, 0, NULL, NULL);
6496a23a 231}
5af7fa68 232EXPORT_SYMBOL_GPL(kernel_thread);
6496a23a
MS
233
234unsigned long get_wchan(struct task_struct *p)
235{
236/* TBD (used by procfs) */
237 return 0;
238}
e1c4bd08
MS
239
240/* Set up a thread for executing a new program */
241void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
242{
e1c4bd08
MS
243 regs->pc = pc;
244 regs->r1 = usp;
245 regs->pt_mode = 0;
f1ae3f69 246#ifdef CONFIG_MMU
866d7229 247 regs->msr |= MSR_UMS;
f1ae3f69 248#endif
e1c4bd08 249}
5233806d
MS
250
251#ifdef CONFIG_MMU
252#include <linux/elfcore.h>
253/*
254 * Set up a thread for executing a new program
255 */
256int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs)
257{
258 return 0; /* MicroBlaze has no separate FPU registers */
259}
260#endif /* CONFIG_MMU */