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Commit | Line | Data |
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b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
1da177e4 LT |
2 | config MIPS |
3 | bool | |
4 | default y | |
942fa985 | 5 | select ARCH_32BIT_OFF_T if !64BIT |
ea6a3737 | 6 | select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT |
12597988 | 7 | select ARCH_CLOCKSOURCE_DATA |
12597988 | 8 | select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST |
1e35918a | 9 | select ARCH_HAS_UBSAN_SANITIZE_ALL |
12597988 | 10 | select ARCH_SUPPORTS_UPROBES |
1ee3630a | 11 | select ARCH_USE_BUILTIN_BSWAP |
12597988 | 12 | select ARCH_USE_CMPXCHG_LOCKREF if 64BIT |
25da4e9d | 13 | select ARCH_USE_QUEUED_RWLOCKS |
0b17c967 | 14 | select ARCH_USE_QUEUED_SPINLOCKS |
9035bd29 | 15 | select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU |
12597988 MR |
16 | select ARCH_WANT_IPC_PARSE_VERSION |
17 | select BUILDTIME_EXTABLE_SORT | |
18 | select CLONE_BACKWARDS | |
57eeaced | 19 | select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1) |
12597988 MR |
20 | select CPU_PM if CPU_IDLE |
21 | select GENERIC_ATOMIC64 if !64BIT | |
22 | select GENERIC_CLOCKEVENTS | |
23 | select GENERIC_CMOS_UPDATE | |
24 | select GENERIC_CPU_AUTOPROBE | |
24640f23 | 25 | select GENERIC_GETTIMEOFDAY |
b962aeb0 | 26 | select GENERIC_IOMAP |
12597988 MR |
27 | select GENERIC_IRQ_PROBE |
28 | select GENERIC_IRQ_SHOW | |
6630a8e5 | 29 | select GENERIC_ISA_DMA if EISA |
740129b3 AP |
30 | select GENERIC_LIB_ASHLDI3 |
31 | select GENERIC_LIB_ASHRDI3 | |
32 | select GENERIC_LIB_CMPDI2 | |
33 | select GENERIC_LIB_LSHRDI3 | |
34 | select GENERIC_LIB_UCMPDI2 | |
12597988 MR |
35 | select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC |
36 | select GENERIC_SMP_IDLE_THREAD | |
37 | select GENERIC_TIME_VSYSCALL | |
446f062b | 38 | select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT |
12597988 | 39 | select HANDLE_DOMAIN_IRQ |
906d441f | 40 | select HAVE_ARCH_COMPILER_H |
12597988 | 41 | select HAVE_ARCH_JUMP_LABEL |
88547001 | 42 | select HAVE_ARCH_KGDB |
109c32ff MR |
43 | select HAVE_ARCH_MMAP_RND_BITS if MMU |
44 | select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT | |
490b004f | 45 | select HAVE_ARCH_SECCOMP_FILTER |
c0ff3c53 | 46 | select HAVE_ARCH_TRACEHOOK |
45e03e62 | 47 | select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES |
2ff2b7ec | 48 | select HAVE_ASM_MODVERSIONS |
a90a5a62 | 49 | select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2 |
12597988 MR |
50 | select HAVE_CONTEXT_TRACKING |
51 | select HAVE_COPY_THREAD_TLS | |
52 | select HAVE_C_RECORDMCOUNT | |
53 | select HAVE_DEBUG_KMEMLEAK | |
54 | select HAVE_DEBUG_STACKOVERFLOW | |
12597988 | 55 | select HAVE_DMA_CONTIGUOUS |
538f1952 | 56 | select HAVE_DYNAMIC_FTRACE |
12597988 | 57 | select HAVE_EXIT_THREAD |
67a929e0 | 58 | select HAVE_FAST_GUP |
538f1952 | 59 | select HAVE_FTRACE_MCOUNT_RECORD |
29c5d346 | 60 | select HAVE_FUNCTION_GRAPH_TRACER |
12597988 | 61 | select HAVE_FUNCTION_TRACER |
12597988 | 62 | select HAVE_IDE |
b3a428b4 | 63 | select HAVE_IOREMAP_PROT |
12597988 MR |
64 | select HAVE_IRQ_EXIT_ON_IRQ_STACK |
65 | select HAVE_IRQ_TIME_ACCOUNTING | |
c1bf207d DD |
66 | select HAVE_KPROBES |
67 | select HAVE_KRETPROBES | |
c0436b50 | 68 | select HAVE_LD_DEAD_CODE_DATA_ELIMINATION |
9d15ffc8 | 69 | select HAVE_MEMBLOCK_NODE_MAP |
786d35d4 | 70 | select HAVE_MOD_ARCH_SPECIFIC |
42a0bb3f | 71 | select HAVE_NMI |
12597988 MR |
72 | select HAVE_OPROFILE |
73 | select HAVE_PERF_EVENTS | |
74 | select HAVE_REGS_AND_STACK_ACCESS_API | |
9ea141ad | 75 | select HAVE_RSEQ |
d148eac0 | 76 | select HAVE_STACKPROTECTOR |
12597988 | 77 | select HAVE_SYSCALL_TRACEPOINTS |
a3f14310 | 78 | select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP |
24640f23 | 79 | select HAVE_GENERIC_VDSO |
12597988 | 80 | select IRQ_FORCED_THREADING |
6630a8e5 | 81 | select ISA if EISA |
2f12fb20 | 82 | select MODULES_USE_ELF_RELA if MODULES && 64BIT |
12597988 MR |
83 | select MODULES_USE_ELF_REL if MODULES |
84 | select PERF_USE_VMALLOC | |
05a0a344 | 85 | select RTC_LIB |
d79d853d | 86 | select SYSCTL_EXCEPTION_TRACE |
12597988 | 87 | select VIRT_TO_BUS |
d1af2ab3 | 88 | select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI) |
1da177e4 | 89 | |
1da177e4 LT |
90 | menu "Machine selection" |
91 | ||
5e83d430 RB |
92 | choice |
93 | prompt "System type" | |
d41e6858 | 94 | default MIPS_GENERIC |
1da177e4 | 95 | |
eed0eabd PB |
96 | config MIPS_GENERIC |
97 | bool "Generic board-agnostic MIPS kernel" | |
98 | select BOOT_RAW | |
99 | select BUILTIN_DTB | |
100 | select CEVT_R4K | |
101 | select CLKSRC_MIPS_GIC | |
102 | select COMMON_CLK | |
103 | select CPU_MIPSR2_IRQ_VI | |
104 | select CPU_MIPSR2_IRQ_EI | |
105 | select CSRC_R4K | |
106 | select DMA_PERDEV_COHERENT | |
eb01d42a | 107 | select HAVE_PCI |
eed0eabd PB |
108 | select IRQ_MIPS_CPU |
109 | select LIBFDT | |
0211d49e | 110 | select MIPS_AUTO_PFN_OFFSET |
eed0eabd PB |
111 | select MIPS_CPU_SCACHE |
112 | select MIPS_GIC | |
113 | select MIPS_L1_CACHE_SHIFT_7 | |
114 | select NO_EXCEPT_FILL | |
115 | select PCI_DRIVERS_GENERIC | |
116 | select PINCTRL | |
117 | select SMP_UP if SMP | |
a3078e59 | 118 | select SWAP_IO_SPACE |
eed0eabd PB |
119 | select SYS_HAS_CPU_MIPS32_R1 |
120 | select SYS_HAS_CPU_MIPS32_R2 | |
121 | select SYS_HAS_CPU_MIPS32_R6 | |
122 | select SYS_HAS_CPU_MIPS64_R1 | |
123 | select SYS_HAS_CPU_MIPS64_R2 | |
124 | select SYS_HAS_CPU_MIPS64_R6 | |
125 | select SYS_SUPPORTS_32BIT_KERNEL | |
126 | select SYS_SUPPORTS_64BIT_KERNEL | |
127 | select SYS_SUPPORTS_BIG_ENDIAN | |
128 | select SYS_SUPPORTS_HIGHMEM | |
129 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
130 | select SYS_SUPPORTS_MICROMIPS | |
131 | select SYS_SUPPORTS_MIPS_CPS | |
132 | select SYS_SUPPORTS_MIPS16 | |
133 | select SYS_SUPPORTS_MULTITHREADING | |
134 | select SYS_SUPPORTS_RELOCATABLE | |
135 | select SYS_SUPPORTS_SMARTMIPS | |
2e6522c5 CL |
136 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
137 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
138 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
139 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
140 | select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
141 | select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
eed0eabd | 142 | select USE_OF |
2fe8ea39 | 143 | select UHI_BOOT |
eed0eabd PB |
144 | help |
145 | Select this to build a kernel which aims to support multiple boards, | |
146 | generally using a flattened device tree passed from the bootloader | |
147 | using the boot protocol defined in the UHI (Unified Hosting | |
148 | Interface) specification. | |
149 | ||
42a4f17d | 150 | config MIPS_ALCHEMY |
c3543e25 | 151 | bool "Alchemy processor based machines" |
d4a451d5 | 152 | select PHYS_ADDR_T_64BIT |
f772cdb2 | 153 | select CEVT_R4K |
d7ea335c | 154 | select CSRC_R4K |
67e38cf2 | 155 | select IRQ_MIPS_CPU |
88e9a93c | 156 | select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is |
42a4f17d ML |
157 | select SYS_HAS_CPU_MIPS32_R1 |
158 | select SYS_SUPPORTS_32BIT_KERNEL | |
159 | select SYS_SUPPORTS_APM_EMULATION | |
d30a2b47 | 160 | select GPIOLIB |
1b93b3c3 | 161 | select SYS_SUPPORTS_ZBOOT |
47440229 | 162 | select COMMON_CLK |
1da177e4 | 163 | |
7ca5dc14 FF |
164 | config AR7 |
165 | bool "Texas Instruments AR7" | |
166 | select BOOT_ELF32 | |
167 | select DMA_NONCOHERENT | |
168 | select CEVT_R4K | |
169 | select CSRC_R4K | |
67e38cf2 | 170 | select IRQ_MIPS_CPU |
7ca5dc14 FF |
171 | select NO_EXCEPT_FILL |
172 | select SWAP_IO_SPACE | |
173 | select SYS_HAS_CPU_MIPS32_R1 | |
174 | select SYS_HAS_EARLY_PRINTK | |
175 | select SYS_SUPPORTS_32BIT_KERNEL | |
176 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 177 | select SYS_SUPPORTS_MIPS16 |
1b93b3c3 | 178 | select SYS_SUPPORTS_ZBOOT_UART16550 |
d30a2b47 | 179 | select GPIOLIB |
7ca5dc14 | 180 | select VLYNQ |
8551fb64 | 181 | select HAVE_CLK |
7ca5dc14 FF |
182 | help |
183 | Support for the Texas Instruments AR7 System-on-a-Chip | |
184 | family: TNETD7100, 7200 and 7300. | |
185 | ||
43cc739f SR |
186 | config ATH25 |
187 | bool "Atheros AR231x/AR531x SoC support" | |
188 | select CEVT_R4K | |
189 | select CSRC_R4K | |
190 | select DMA_NONCOHERENT | |
67e38cf2 | 191 | select IRQ_MIPS_CPU |
1753e74e | 192 | select IRQ_DOMAIN |
43cc739f SR |
193 | select SYS_HAS_CPU_MIPS32_R1 |
194 | select SYS_SUPPORTS_BIG_ENDIAN | |
195 | select SYS_SUPPORTS_32BIT_KERNEL | |
8aaa7278 | 196 | select SYS_HAS_EARLY_PRINTK |
43cc739f SR |
197 | help |
198 | Support for Atheros AR231x and Atheros AR531x based boards | |
199 | ||
d4a67d9d GJ |
200 | config ATH79 |
201 | bool "Atheros AR71XX/AR724X/AR913X based boards" | |
ff591a91 | 202 | select ARCH_HAS_RESET_CONTROLLER |
d4a67d9d GJ |
203 | select BOOT_RAW |
204 | select CEVT_R4K | |
205 | select CSRC_R4K | |
206 | select DMA_NONCOHERENT | |
d30a2b47 | 207 | select GPIOLIB |
a08227a2 | 208 | select PINCTRL |
94638067 | 209 | select HAVE_CLK |
411520af | 210 | select COMMON_CLK |
2c4f1ac5 | 211 | select CLKDEV_LOOKUP |
67e38cf2 | 212 | select IRQ_MIPS_CPU |
d4a67d9d GJ |
213 | select SYS_HAS_CPU_MIPS32_R2 |
214 | select SYS_HAS_EARLY_PRINTK | |
215 | select SYS_SUPPORTS_32BIT_KERNEL | |
216 | select SYS_SUPPORTS_BIG_ENDIAN | |
377cb1b6 | 217 | select SYS_SUPPORTS_MIPS16 |
b3f0a250 | 218 | select SYS_SUPPORTS_ZBOOT_UART_PROM |
03c8c407 | 219 | select USE_OF |
53d473fc | 220 | select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM |
d4a67d9d GJ |
221 | help |
222 | Support for the Atheros AR71XX/AR724X/AR913X SoCs. | |
223 | ||
5f2d4459 KC |
224 | config BMIPS_GENERIC |
225 | bool "Broadcom Generic BMIPS kernel" | |
d59098a0 CH |
226 | select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL |
227 | select ARCH_HAS_PHYS_TO_DMA | |
d666cd02 KC |
228 | select BOOT_RAW |
229 | select NO_EXCEPT_FILL | |
230 | select USE_OF | |
231 | select CEVT_R4K | |
232 | select CSRC_R4K | |
233 | select SYNC_R4K | |
234 | select COMMON_CLK | |
c7c42ec2 | 235 | select BCM6345_L1_IRQ |
60b858f2 KC |
236 | select BCM7038_L1_IRQ |
237 | select BCM7120_L2_IRQ | |
238 | select BRCMSTB_L2_IRQ | |
67e38cf2 | 239 | select IRQ_MIPS_CPU |
60b858f2 | 240 | select DMA_NONCOHERENT |
d666cd02 | 241 | select SYS_SUPPORTS_32BIT_KERNEL |
60b858f2 | 242 | select SYS_SUPPORTS_LITTLE_ENDIAN |
d666cd02 KC |
243 | select SYS_SUPPORTS_BIG_ENDIAN |
244 | select SYS_SUPPORTS_HIGHMEM | |
60b858f2 KC |
245 | select SYS_HAS_CPU_BMIPS32_3300 |
246 | select SYS_HAS_CPU_BMIPS4350 | |
247 | select SYS_HAS_CPU_BMIPS4380 | |
d666cd02 KC |
248 | select SYS_HAS_CPU_BMIPS5000 |
249 | select SWAP_IO_SPACE | |
60b858f2 KC |
250 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
251 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
252 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
253 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
4dc4704c | 254 | select HARDIRQS_SW_RESEND |
d666cd02 | 255 | help |
5f2d4459 KC |
256 | Build a generic DT-based kernel image that boots on select |
257 | BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top | |
258 | box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN | |
259 | must be set appropriately for your board. | |
d666cd02 | 260 | |
1c0c13eb | 261 | config BCM47XX |
c619366e | 262 | bool "Broadcom BCM47XX based boards" |
fe08f8c2 | 263 | select BOOT_RAW |
42f77542 | 264 | select CEVT_R4K |
940f6b48 | 265 | select CSRC_R4K |
1c0c13eb | 266 | select DMA_NONCOHERENT |
eb01d42a | 267 | select HAVE_PCI |
67e38cf2 | 268 | select IRQ_MIPS_CPU |
314878d2 | 269 | select SYS_HAS_CPU_MIPS32_R1 |
dd54dedd | 270 | select NO_EXCEPT_FILL |
1c0c13eb AJ |
271 | select SYS_SUPPORTS_32BIT_KERNEL |
272 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 273 | select SYS_SUPPORTS_MIPS16 |
6507831f | 274 | select SYS_SUPPORTS_ZBOOT |
25e5fb97 | 275 | select SYS_HAS_EARLY_PRINTK |
e6086557 | 276 | select USE_GENERIC_EARLY_PRINTK_8250 |
c949c0bc RM |
277 | select GPIOLIB |
278 | select LEDS_GPIO_REGISTER | |
f6e734a8 | 279 | select BCM47XX_NVRAM |
2ab71a02 | 280 | select BCM47XX_SPROM |
dfe00495 | 281 | select BCM47XX_SSB if !BCM47XX_BCMA |
1c0c13eb | 282 | help |
371a4151 | 283 | Support for BCM47XX based boards |
1c0c13eb | 284 | |
e7300d04 MB |
285 | config BCM63XX |
286 | bool "Broadcom BCM63XX based boards" | |
ae8de61c | 287 | select BOOT_RAW |
e7300d04 MB |
288 | select CEVT_R4K |
289 | select CSRC_R4K | |
fc264022 | 290 | select SYNC_R4K |
e7300d04 | 291 | select DMA_NONCOHERENT |
67e38cf2 | 292 | select IRQ_MIPS_CPU |
e7300d04 MB |
293 | select SYS_SUPPORTS_32BIT_KERNEL |
294 | select SYS_SUPPORTS_BIG_ENDIAN | |
295 | select SYS_HAS_EARLY_PRINTK | |
296 | select SWAP_IO_SPACE | |
d30a2b47 | 297 | select GPIOLIB |
3e82eeeb | 298 | select HAVE_CLK |
af2418be | 299 | select MIPS_L1_CACHE_SHIFT_4 |
c5af3c2d | 300 | select CLKDEV_LOOKUP |
e7300d04 | 301 | help |
371a4151 | 302 | Support for BCM63XX based boards |
e7300d04 | 303 | |
1da177e4 | 304 | config MIPS_COBALT |
3fa986fa | 305 | bool "Cobalt Server" |
42f77542 | 306 | select CEVT_R4K |
940f6b48 | 307 | select CSRC_R4K |
1097c6ac | 308 | select CEVT_GT641XX |
1da177e4 | 309 | select DMA_NONCOHERENT |
eb01d42a | 310 | select FORCE_PCI |
d865bea4 | 311 | select I8253 |
1da177e4 | 312 | select I8259 |
67e38cf2 | 313 | select IRQ_MIPS_CPU |
d5ab1a69 | 314 | select IRQ_GT641XX |
252161ec | 315 | select PCI_GT64XXX_PCI0 |
7cf8053b | 316 | select SYS_HAS_CPU_NEVADA |
0a22e0d4 | 317 | select SYS_HAS_EARLY_PRINTK |
ed5ba2fb | 318 | select SYS_SUPPORTS_32BIT_KERNEL |
0e8774b6 | 319 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 320 | select SYS_SUPPORTS_LITTLE_ENDIAN |
e6086557 | 321 | select USE_GENERIC_EARLY_PRINTK_8250 |
1da177e4 LT |
322 | |
323 | config MACH_DECSTATION | |
3fa986fa | 324 | bool "DECstations" |
1da177e4 | 325 | select BOOT_ELF32 |
6457d9fc | 326 | select CEVT_DS1287 |
81d10bad | 327 | select CEVT_R4K if CPU_R4X00 |
4247417d | 328 | select CSRC_IOASIC |
81d10bad | 329 | select CSRC_R4K if CPU_R4X00 |
20d60d99 MR |
330 | select CPU_DADDI_WORKAROUNDS if 64BIT |
331 | select CPU_R4000_WORKAROUNDS if 64BIT | |
332 | select CPU_R4400_WORKAROUNDS if 64BIT | |
1da177e4 | 333 | select DMA_NONCOHERENT |
ce816fa8 | 334 | select NO_IOPORT_MAP |
67e38cf2 | 335 | select IRQ_MIPS_CPU |
7cf8053b RB |
336 | select SYS_HAS_CPU_R3000 |
337 | select SYS_HAS_CPU_R4X00 | |
ed5ba2fb | 338 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 339 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 340 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1723b4a3 AN |
341 | select SYS_SUPPORTS_128HZ |
342 | select SYS_SUPPORTS_256HZ | |
343 | select SYS_SUPPORTS_1024HZ | |
930beb5a | 344 | select MIPS_L1_CACHE_SHIFT_4 |
5e83d430 | 345 | help |
1da177e4 LT |
346 | This enables support for DEC's MIPS based workstations. For details |
347 | see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the | |
348 | DECstation porting pages on <http://decstation.unix-ag.org/>. | |
349 | ||
350 | If you have one of the following DECstation Models you definitely | |
351 | want to choose R4xx0 for the CPU Type: | |
352 | ||
9308816c RB |
353 | DECstation 5000/50 |
354 | DECstation 5000/150 | |
355 | DECstation 5000/260 | |
356 | DECsystem 5900/260 | |
1da177e4 LT |
357 | |
358 | otherwise choose R3000. | |
359 | ||
5e83d430 | 360 | config MACH_JAZZ |
3fa986fa | 361 | bool "Jazz family of machines" |
a211a082 | 362 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 363 | select ARCH_MIGHT_HAVE_PC_SERIO |
0e2794b0 RB |
364 | select FW_ARC |
365 | select FW_ARC32 | |
5e83d430 | 366 | select ARCH_MAY_HAVE_PC_FDC |
42f77542 | 367 | select CEVT_R4K |
940f6b48 | 368 | select CSRC_R4K |
e2defae5 | 369 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
5e83d430 | 370 | select GENERIC_ISA_DMA |
8a118c38 | 371 | select HAVE_PCSPKR_PLATFORM |
67e38cf2 | 372 | select IRQ_MIPS_CPU |
d865bea4 | 373 | select I8253 |
5e83d430 RB |
374 | select I8259 |
375 | select ISA | |
7cf8053b | 376 | select SYS_HAS_CPU_R4X00 |
5e83d430 | 377 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 378 | select SYS_SUPPORTS_64BIT_KERNEL |
1723b4a3 | 379 | select SYS_SUPPORTS_100HZ |
1da177e4 | 380 | help |
371a4151 EWI |
381 | This a family of machines based on the MIPS R4030 chipset which was |
382 | used by several vendors to build RISC/os and Windows NT workstations. | |
383 | Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and | |
384 | Olivetti M700-10 workstations. | |
5e83d430 | 385 | |
de361e8b PB |
386 | config MACH_INGENIC |
387 | bool "Ingenic SoC based machines" | |
5ebabe59 LPC |
388 | select SYS_SUPPORTS_32BIT_KERNEL |
389 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
f9c9affc | 390 | select SYS_SUPPORTS_ZBOOT_UART16550 |
b35d2653 | 391 | select CPU_SUPPORTS_HUGEPAGES |
5ebabe59 | 392 | select DMA_NONCOHERENT |
67e38cf2 | 393 | select IRQ_MIPS_CPU |
37b4c3ca | 394 | select PINCTRL |
d30a2b47 | 395 | select GPIOLIB |
ff1930c6 | 396 | select COMMON_CLK |
83bc7692 | 397 | select GENERIC_IRQ_CHIP |
15205fc0 | 398 | select BUILTIN_DTB if MIPS_NO_APPENDED_DTB |
ffb1843d | 399 | select USE_OF |
6ec127fb | 400 | select LIBFDT |
5ebabe59 | 401 | |
171bb2f1 JC |
402 | config LANTIQ |
403 | bool "Lantiq based platforms" | |
404 | select DMA_NONCOHERENT | |
67e38cf2 | 405 | select IRQ_MIPS_CPU |
171bb2f1 JC |
406 | select CEVT_R4K |
407 | select CSRC_R4K | |
408 | select SYS_HAS_CPU_MIPS32_R1 | |
409 | select SYS_HAS_CPU_MIPS32_R2 | |
410 | select SYS_SUPPORTS_BIG_ENDIAN | |
411 | select SYS_SUPPORTS_32BIT_KERNEL | |
377cb1b6 | 412 | select SYS_SUPPORTS_MIPS16 |
171bb2f1 | 413 | select SYS_SUPPORTS_MULTITHREADING |
f35764e7 | 414 | select SYS_SUPPORTS_VPE_LOADER |
171bb2f1 | 415 | select SYS_HAS_EARLY_PRINTK |
d30a2b47 | 416 | select GPIOLIB |
171bb2f1 JC |
417 | select SWAP_IO_SPACE |
418 | select BOOT_RAW | |
287e3f3f | 419 | select CLKDEV_LOOKUP |
a0392222 | 420 | select USE_OF |
3f8c50c9 JC |
421 | select PINCTRL |
422 | select PINCTRL_LANTIQ | |
c530781c JC |
423 | select ARCH_HAS_RESET_CONTROLLER |
424 | select RESET_CONTROLLER | |
171bb2f1 | 425 | |
1f21d2bd BM |
426 | config LASAT |
427 | bool "LASAT Networks platforms" | |
42f77542 | 428 | select CEVT_R4K |
16f0bbbc | 429 | select CRC32 |
940f6b48 | 430 | select CSRC_R4K |
1f21d2bd BM |
431 | select DMA_NONCOHERENT |
432 | select SYS_HAS_EARLY_PRINTK | |
eb01d42a | 433 | select HAVE_PCI |
67e38cf2 | 434 | select IRQ_MIPS_CPU |
1f21d2bd BM |
435 | select PCI_GT64XXX_PCI0 |
436 | select MIPS_NILE4 | |
437 | select R5000_CPU_SCACHE | |
438 | select SYS_HAS_CPU_R5000 | |
439 | select SYS_SUPPORTS_32BIT_KERNEL | |
440 | select SYS_SUPPORTS_64BIT_KERNEL if BROKEN | |
441 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1f21d2bd | 442 | |
30ad29bb HC |
443 | config MACH_LOONGSON32 |
444 | bool "Loongson-1 family of machines" | |
c7e8c668 | 445 | select SYS_SUPPORTS_ZBOOT |
ade299d8 | 446 | help |
30ad29bb | 447 | This enables support for the Loongson-1 family of machines. |
85749d24 | 448 | |
30ad29bb HC |
449 | Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by |
450 | the Institute of Computing Technology (ICT), Chinese Academy of | |
451 | Sciences (CAS). | |
ade299d8 | 452 | |
30ad29bb HC |
453 | config MACH_LOONGSON64 |
454 | bool "Loongson-2/3 family of machines" | |
ca585cf9 KC |
455 | select SYS_SUPPORTS_ZBOOT |
456 | help | |
30ad29bb | 457 | This enables the support of Loongson-2/3 family of machines. |
ca585cf9 | 458 | |
30ad29bb HC |
459 | Loongson-2 is a family of single-core CPUs and Loongson-3 is a |
460 | family of multi-core CPUs. They are both 64-bit general-purpose | |
461 | MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute | |
462 | of Computing Technology (ICT), Chinese Academy of Sciences (CAS) | |
463 | in the People's Republic of China. The chief architect is Professor | |
464 | Weiwu Hu. | |
ca585cf9 | 465 | |
6a438309 AB |
466 | config MACH_PISTACHIO |
467 | bool "IMG Pistachio SoC based boards" | |
6a438309 AB |
468 | select BOOT_ELF32 |
469 | select BOOT_RAW | |
470 | select CEVT_R4K | |
471 | select CLKSRC_MIPS_GIC | |
472 | select COMMON_CLK | |
473 | select CSRC_R4K | |
645c7827 | 474 | select DMA_NONCOHERENT |
d30a2b47 | 475 | select GPIOLIB |
67e38cf2 | 476 | select IRQ_MIPS_CPU |
6a438309 AB |
477 | select LIBFDT |
478 | select MFD_SYSCON | |
479 | select MIPS_CPU_SCACHE | |
480 | select MIPS_GIC | |
481 | select PINCTRL | |
482 | select REGULATOR | |
483 | select SYS_HAS_CPU_MIPS32_R2 | |
484 | select SYS_SUPPORTS_32BIT_KERNEL | |
485 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
486 | select SYS_SUPPORTS_MIPS_CPS | |
487 | select SYS_SUPPORTS_MULTITHREADING | |
41cc07be | 488 | select SYS_SUPPORTS_RELOCATABLE |
6a438309 | 489 | select SYS_SUPPORTS_ZBOOT |
018f62ee EG |
490 | select SYS_HAS_EARLY_PRINTK |
491 | select USE_GENERIC_EARLY_PRINTK_8250 | |
6a438309 AB |
492 | select USE_OF |
493 | help | |
494 | This enables support for the IMG Pistachio SoC platform. | |
495 | ||
1da177e4 | 496 | config MIPS_MALTA |
3fa986fa | 497 | bool "MIPS Malta board" |
61ed242d | 498 | select ARCH_MAY_HAVE_PC_FDC |
a211a082 | 499 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 500 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 501 | select BOOT_ELF32 |
fa71c960 | 502 | select BOOT_RAW |
e8823d26 | 503 | select BUILTIN_DTB |
42f77542 | 504 | select CEVT_R4K |
fa5635a2 | 505 | select CLKSRC_MIPS_GIC |
42b002ab | 506 | select COMMON_CLK |
47bf2b03 | 507 | select CSRC_R4K |
885014bc | 508 | select DMA_MAYBE_COHERENT |
1da177e4 | 509 | select GENERIC_ISA_DMA |
8a118c38 | 510 | select HAVE_PCSPKR_PLATFORM |
eb01d42a | 511 | select HAVE_PCI |
d865bea4 | 512 | select I8253 |
1da177e4 | 513 | select I8259 |
47bf2b03 MK |
514 | select IRQ_MIPS_CPU |
515 | select LIBFDT | |
5e83d430 | 516 | select MIPS_BONITO64 |
9318c51a | 517 | select MIPS_CPU_SCACHE |
47bf2b03 | 518 | select MIPS_GIC |
a7ef1ead | 519 | select MIPS_L1_CACHE_SHIFT_6 |
5e83d430 | 520 | select MIPS_MSC |
47bf2b03 | 521 | select PCI_GT64XXX_PCI0 |
ecafe3e9 | 522 | select SMP_UP if SMP |
1da177e4 | 523 | select SWAP_IO_SPACE |
7cf8053b RB |
524 | select SYS_HAS_CPU_MIPS32_R1 |
525 | select SYS_HAS_CPU_MIPS32_R2 | |
bfc3c5a6 | 526 | select SYS_HAS_CPU_MIPS32_R3_5 |
c5b36783 | 527 | select SYS_HAS_CPU_MIPS32_R5 |
575509b6 | 528 | select SYS_HAS_CPU_MIPS32_R6 |
7cf8053b | 529 | select SYS_HAS_CPU_MIPS64_R1 |
5d9fbed1 | 530 | select SYS_HAS_CPU_MIPS64_R2 |
575509b6 | 531 | select SYS_HAS_CPU_MIPS64_R6 |
7cf8053b RB |
532 | select SYS_HAS_CPU_NEVADA |
533 | select SYS_HAS_CPU_RM7000 | |
ed5ba2fb YY |
534 | select SYS_SUPPORTS_32BIT_KERNEL |
535 | select SYS_SUPPORTS_64BIT_KERNEL | |
5e83d430 | 536 | select SYS_SUPPORTS_BIG_ENDIAN |
c5b36783 | 537 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 538 | select SYS_SUPPORTS_LITTLE_ENDIAN |
424ebcdf | 539 | select SYS_SUPPORTS_MICROMIPS |
47bf2b03 | 540 | select SYS_SUPPORTS_MIPS16 |
0365070f | 541 | select SYS_SUPPORTS_MIPS_CMP |
e56b6aa6 | 542 | select SYS_SUPPORTS_MIPS_CPS |
f41ae0b2 | 543 | select SYS_SUPPORTS_MULTITHREADING |
47bf2b03 | 544 | select SYS_SUPPORTS_RELOCATABLE |
9693a853 | 545 | select SYS_SUPPORTS_SMARTMIPS |
f35764e7 | 546 | select SYS_SUPPORTS_VPE_LOADER |
1b93b3c3 | 547 | select SYS_SUPPORTS_ZBOOT |
e8823d26 | 548 | select USE_OF |
abcc82b1 | 549 | select ZONE_DMA32 if 64BIT |
1da177e4 | 550 | help |
f638d197 | 551 | This enables support for the MIPS Technologies Malta evaluation |
1da177e4 LT |
552 | board. |
553 | ||
2572f00d JH |
554 | config MACH_PIC32 |
555 | bool "Microchip PIC32 Family" | |
556 | help | |
557 | This enables support for the Microchip PIC32 family of platforms. | |
558 | ||
559 | Microchip PIC32 is a family of general-purpose 32 bit MIPS core | |
560 | microcontrollers. | |
561 | ||
a83860c2 RB |
562 | config NEC_MARKEINS |
563 | bool "NEC EMMA2RH Mark-eins board" | |
564 | select SOC_EMMA2RH | |
eb01d42a | 565 | select HAVE_PCI |
a83860c2 RB |
566 | help |
567 | This enables support for the NEC Electronics Mark-eins boards. | |
ade299d8 | 568 | |
5e83d430 | 569 | config MACH_VR41XX |
74142d65 | 570 | bool "NEC VR4100 series based machines" |
42f77542 | 571 | select CEVT_R4K |
940f6b48 | 572 | select CSRC_R4K |
7cf8053b | 573 | select SYS_HAS_CPU_VR41XX |
377cb1b6 | 574 | select SYS_SUPPORTS_MIPS16 |
d30a2b47 | 575 | select GPIOLIB |
5e83d430 | 576 | |
edb6310a DL |
577 | config NXP_STB220 |
578 | bool "NXP STB220 board" | |
579 | select SOC_PNX833X | |
580 | help | |
371a4151 | 581 | Support for NXP Semiconductors STB220 Development Board. |
edb6310a DL |
582 | |
583 | config NXP_STB225 | |
584 | bool "NXP 225 board" | |
585 | select SOC_PNX833X | |
586 | select SOC_PNX8335 | |
587 | help | |
371a4151 | 588 | Support for NXP Semiconductors STB225 Development Board. |
edb6310a | 589 | |
9267a30d MSJ |
590 | config PMC_MSP |
591 | bool "PMC-Sierra MSP chipsets" | |
39d30c13 A |
592 | select CEVT_R4K |
593 | select CSRC_R4K | |
9267a30d MSJ |
594 | select DMA_NONCOHERENT |
595 | select SWAP_IO_SPACE | |
596 | select NO_EXCEPT_FILL | |
597 | select BOOT_RAW | |
598 | select SYS_HAS_CPU_MIPS32_R1 | |
599 | select SYS_HAS_CPU_MIPS32_R2 | |
600 | select SYS_SUPPORTS_32BIT_KERNEL | |
601 | select SYS_SUPPORTS_BIG_ENDIAN | |
377cb1b6 | 602 | select SYS_SUPPORTS_MIPS16 |
67e38cf2 | 603 | select IRQ_MIPS_CPU |
9267a30d MSJ |
604 | select SERIAL_8250 |
605 | select SERIAL_8250_CONSOLE | |
9296d94d FF |
606 | select USB_EHCI_BIG_ENDIAN_MMIO |
607 | select USB_EHCI_BIG_ENDIAN_DESC | |
9267a30d MSJ |
608 | help |
609 | This adds support for the PMC-Sierra family of Multi-Service | |
610 | Processor System-On-A-Chips. These parts include a number | |
611 | of integrated peripherals, interfaces and DSPs in addition to | |
612 | a variety of MIPS cores. | |
613 | ||
ae2b5bb6 JC |
614 | config RALINK |
615 | bool "Ralink based machines" | |
616 | select CEVT_R4K | |
617 | select CSRC_R4K | |
618 | select BOOT_RAW | |
619 | select DMA_NONCOHERENT | |
67e38cf2 | 620 | select IRQ_MIPS_CPU |
ae2b5bb6 JC |
621 | select USE_OF |
622 | select SYS_HAS_CPU_MIPS32_R1 | |
623 | select SYS_HAS_CPU_MIPS32_R2 | |
624 | select SYS_SUPPORTS_32BIT_KERNEL | |
625 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 626 | select SYS_SUPPORTS_MIPS16 |
ae2b5bb6 | 627 | select SYS_HAS_EARLY_PRINTK |
ae2b5bb6 | 628 | select CLKDEV_LOOKUP |
2a153f1c JC |
629 | select ARCH_HAS_RESET_CONTROLLER |
630 | select RESET_CONTROLLER | |
ae2b5bb6 | 631 | |
1da177e4 | 632 | config SGI_IP22 |
3fa986fa | 633 | bool "SGI IP22 (Indy/Indigo2)" |
0e2794b0 RB |
634 | select FW_ARC |
635 | select FW_ARC32 | |
7a407aa5 | 636 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 637 | select BOOT_ELF32 |
42f77542 | 638 | select CEVT_R4K |
940f6b48 | 639 | select CSRC_R4K |
e2defae5 | 640 | select DEFAULT_SGI_PARTITION |
1da177e4 | 641 | select DMA_NONCOHERENT |
6630a8e5 | 642 | select HAVE_EISA |
d865bea4 | 643 | select I8253 |
68de4803 | 644 | select I8259 |
1da177e4 | 645 | select IP22_CPU_SCACHE |
67e38cf2 | 646 | select IRQ_MIPS_CPU |
aa414dff | 647 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
e2defae5 TB |
648 | select SGI_HAS_I8042 |
649 | select SGI_HAS_INDYDOG | |
36e5c21d | 650 | select SGI_HAS_HAL2 |
e2defae5 TB |
651 | select SGI_HAS_SEEQ |
652 | select SGI_HAS_WD93 | |
653 | select SGI_HAS_ZILOG | |
1da177e4 | 654 | select SWAP_IO_SPACE |
7cf8053b RB |
655 | select SYS_HAS_CPU_R4X00 |
656 | select SYS_HAS_CPU_R5000 | |
2b5e63f6 MM |
657 | # |
658 | # Disable EARLY_PRINTK for now since it leads to overwritten prom | |
659 | # memory during early boot on some machines. | |
660 | # | |
661 | # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com | |
662 | # for a more details discussion | |
663 | # | |
664 | # select SYS_HAS_EARLY_PRINTK | |
ed5ba2fb YY |
665 | select SYS_SUPPORTS_32BIT_KERNEL |
666 | select SYS_SUPPORTS_64BIT_KERNEL | |
5e83d430 | 667 | select SYS_SUPPORTS_BIG_ENDIAN |
930beb5a | 668 | select MIPS_L1_CACHE_SHIFT_7 |
1da177e4 LT |
669 | help |
670 | This are the SGI Indy, Challenge S and Indigo2, as well as certain | |
671 | OEM variants like the Tandem CMN B006S. To compile a Linux kernel | |
672 | that runs on these, say Y here. | |
673 | ||
674 | config SGI_IP27 | |
3fa986fa | 675 | bool "SGI IP27 (Origin200/2000)" |
54aed4dd | 676 | select ARCH_HAS_PHYS_TO_DMA |
0e2794b0 RB |
677 | select FW_ARC |
678 | select FW_ARC64 | |
5e83d430 | 679 | select BOOT_ELF64 |
e2defae5 | 680 | select DEFAULT_SGI_PARTITION |
36a88530 | 681 | select SYS_HAS_EARLY_PRINTK |
eb01d42a | 682 | select HAVE_PCI |
69a07a41 | 683 | select IRQ_MIPS_CPU |
e6308b6d | 684 | select IRQ_DOMAIN_HIERARCHY |
130e2fb7 | 685 | select NR_CPUS_DEFAULT_64 |
a57140e9 TB |
686 | select PCI_DRIVERS_GENERIC |
687 | select PCI_XTALK_BRIDGE | |
7cf8053b | 688 | select SYS_HAS_CPU_R10000 |
ed5ba2fb | 689 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 690 | select SYS_SUPPORTS_BIG_ENDIAN |
d8cb4e11 | 691 | select SYS_SUPPORTS_NUMA |
1a5c5de1 | 692 | select SYS_SUPPORTS_SMP |
930beb5a | 693 | select MIPS_L1_CACHE_SHIFT_7 |
1da177e4 LT |
694 | help |
695 | This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics | |
696 | workstations. To compile a Linux kernel that runs on these, say Y | |
697 | here. | |
698 | ||
e2defae5 | 699 | config SGI_IP28 |
7d60717e | 700 | bool "SGI IP28 (Indigo2 R10k)" |
0e2794b0 RB |
701 | select FW_ARC |
702 | select FW_ARC64 | |
7a407aa5 | 703 | select ARCH_MIGHT_HAVE_PC_SERIO |
e2defae5 TB |
704 | select BOOT_ELF64 |
705 | select CEVT_R4K | |
706 | select CSRC_R4K | |
707 | select DEFAULT_SGI_PARTITION | |
708 | select DMA_NONCOHERENT | |
709 | select GENERIC_ISA_DMA_SUPPORT_BROKEN | |
67e38cf2 | 710 | select IRQ_MIPS_CPU |
6630a8e5 | 711 | select HAVE_EISA |
e2defae5 TB |
712 | select I8253 |
713 | select I8259 | |
e2defae5 TB |
714 | select SGI_HAS_I8042 |
715 | select SGI_HAS_INDYDOG | |
5b438c44 | 716 | select SGI_HAS_HAL2 |
e2defae5 TB |
717 | select SGI_HAS_SEEQ |
718 | select SGI_HAS_WD93 | |
719 | select SGI_HAS_ZILOG | |
720 | select SWAP_IO_SPACE | |
721 | select SYS_HAS_CPU_R10000 | |
2b5e63f6 MM |
722 | # |
723 | # Disable EARLY_PRINTK for now since it leads to overwritten prom | |
724 | # memory during early boot on some machines. | |
725 | # | |
726 | # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com | |
727 | # for a more details discussion | |
728 | # | |
729 | # select SYS_HAS_EARLY_PRINTK | |
e2defae5 TB |
730 | select SYS_SUPPORTS_64BIT_KERNEL |
731 | select SYS_SUPPORTS_BIG_ENDIAN | |
dc24d68d | 732 | select MIPS_L1_CACHE_SHIFT_7 |
371a4151 EWI |
733 | help |
734 | This is the SGI Indigo2 with R10000 processor. To compile a Linux | |
735 | kernel that runs on these, say Y here. | |
e2defae5 | 736 | |
1da177e4 | 737 | config SGI_IP32 |
cfd2afc0 | 738 | bool "SGI IP32 (O2)" |
03df8229 | 739 | select ARCH_HAS_PHYS_TO_DMA |
0e2794b0 RB |
740 | select FW_ARC |
741 | select FW_ARC32 | |
1da177e4 | 742 | select BOOT_ELF32 |
42f77542 | 743 | select CEVT_R4K |
940f6b48 | 744 | select CSRC_R4K |
1da177e4 | 745 | select DMA_NONCOHERENT |
eb01d42a | 746 | select HAVE_PCI |
67e38cf2 | 747 | select IRQ_MIPS_CPU |
1da177e4 LT |
748 | select R5000_CPU_SCACHE |
749 | select RM7000_CPU_SCACHE | |
7cf8053b RB |
750 | select SYS_HAS_CPU_R5000 |
751 | select SYS_HAS_CPU_R10000 if BROKEN | |
752 | select SYS_HAS_CPU_RM7000 | |
dd2f18fe | 753 | select SYS_HAS_CPU_NEVADA |
ed5ba2fb | 754 | select SYS_SUPPORTS_64BIT_KERNEL |
23fbee9d | 755 | select SYS_SUPPORTS_BIG_ENDIAN |
23fbee9d | 756 | help |
5e83d430 | 757 | If you want this kernel to run on SGI O2 workstation, say Y here. |
1da177e4 | 758 | |
ade299d8 YY |
759 | config SIBYTE_CRHINE |
760 | bool "Sibyte BCM91120C-CRhine" | |
9a6dcea1 | 761 | select BOOT_ELF32 |
ade299d8 | 762 | select SIBYTE_BCM1120 |
9a6dcea1 | 763 | select SWAP_IO_SPACE |
7cf8053b | 764 | select SYS_HAS_CPU_SB1 |
9a6dcea1 AI |
765 | select SYS_SUPPORTS_BIG_ENDIAN |
766 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
767 | ||
ade299d8 YY |
768 | config SIBYTE_CARMEL |
769 | bool "Sibyte BCM91120x-Carmel" | |
5e83d430 | 770 | select BOOT_ELF32 |
ade299d8 | 771 | select SIBYTE_BCM1120 |
5e83d430 | 772 | select SWAP_IO_SPACE |
7cf8053b | 773 | select SYS_HAS_CPU_SB1 |
81731f79 | 774 | select SYS_SUPPORTS_BIG_ENDIAN |
5e83d430 | 775 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 776 | |
ade299d8 YY |
777 | config SIBYTE_CRHONE |
778 | bool "Sibyte BCM91125C-CRhone" | |
5e83d430 | 779 | select BOOT_ELF32 |
ade299d8 | 780 | select SIBYTE_BCM1125 |
5e83d430 | 781 | select SWAP_IO_SPACE |
7cf8053b | 782 | select SYS_HAS_CPU_SB1 |
5e83d430 | 783 | select SYS_SUPPORTS_BIG_ENDIAN |
ade299d8 | 784 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 785 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 786 | |
5e83d430 | 787 | config SIBYTE_RHONE |
3fa986fa | 788 | bool "Sibyte BCM91125E-Rhone" |
5e83d430 | 789 | select BOOT_ELF32 |
5e83d430 RB |
790 | select SIBYTE_BCM1125H |
791 | select SWAP_IO_SPACE | |
7cf8053b | 792 | select SYS_HAS_CPU_SB1 |
5e83d430 RB |
793 | select SYS_SUPPORTS_BIG_ENDIAN |
794 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1da177e4 | 795 | |
ade299d8 YY |
796 | config SIBYTE_SWARM |
797 | bool "Sibyte BCM91250A-SWARM" | |
5e83d430 | 798 | select BOOT_ELF32 |
fcf3ca4c | 799 | select HAVE_PATA_PLATFORM |
ade299d8 | 800 | select SIBYTE_SB1250 |
5e83d430 | 801 | select SWAP_IO_SPACE |
7cf8053b | 802 | select SYS_HAS_CPU_SB1 |
5e83d430 | 803 | select SYS_SUPPORTS_BIG_ENDIAN |
ade299d8 | 804 | select SYS_SUPPORTS_HIGHMEM |
e3ad1c23 | 805 | select SYS_SUPPORTS_LITTLE_ENDIAN |
cce335ae | 806 | select ZONE_DMA32 if 64BIT |
e4849aff | 807 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
e3ad1c23 | 808 | |
ade299d8 YY |
809 | config SIBYTE_LITTLESUR |
810 | bool "Sibyte BCM91250C2-LittleSur" | |
5e83d430 | 811 | select BOOT_ELF32 |
fcf3ca4c | 812 | select HAVE_PATA_PLATFORM |
5e83d430 RB |
813 | select SIBYTE_SB1250 |
814 | select SWAP_IO_SPACE | |
7cf8053b | 815 | select SYS_HAS_CPU_SB1 |
5e83d430 RB |
816 | select SYS_SUPPORTS_BIG_ENDIAN |
817 | select SYS_SUPPORTS_HIGHMEM | |
818 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
756d6d83 | 819 | select ZONE_DMA32 if 64BIT |
1da177e4 | 820 | |
ade299d8 YY |
821 | config SIBYTE_SENTOSA |
822 | bool "Sibyte BCM91250E-Sentosa" | |
5e83d430 | 823 | select BOOT_ELF32 |
5e83d430 RB |
824 | select SIBYTE_SB1250 |
825 | select SWAP_IO_SPACE | |
7cf8053b | 826 | select SYS_HAS_CPU_SB1 |
5e83d430 | 827 | select SYS_SUPPORTS_BIG_ENDIAN |
5e83d430 | 828 | select SYS_SUPPORTS_LITTLE_ENDIAN |
e4849aff | 829 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
1da177e4 | 830 | |
ade299d8 YY |
831 | config SIBYTE_BIGSUR |
832 | bool "Sibyte BCM91480B-BigSur" | |
5e83d430 | 833 | select BOOT_ELF32 |
ade299d8 | 834 | select NR_CPUS_DEFAULT_4 |
ade299d8 | 835 | select SIBYTE_BCM1x80 |
5e83d430 | 836 | select SWAP_IO_SPACE |
7cf8053b | 837 | select SYS_HAS_CPU_SB1 |
5e83d430 | 838 | select SYS_SUPPORTS_BIG_ENDIAN |
651194f8 | 839 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 840 | select SYS_SUPPORTS_LITTLE_ENDIAN |
cce335ae | 841 | select ZONE_DMA32 if 64BIT |
e4849aff | 842 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
1da177e4 | 843 | |
14b36af4 TB |
844 | config SNI_RM |
845 | bool "SNI RM200/300/400" | |
0e2794b0 RB |
846 | select FW_ARC if CPU_LITTLE_ENDIAN |
847 | select FW_ARC32 if CPU_LITTLE_ENDIAN | |
aaa9fad3 | 848 | select FW_SNIPROM if CPU_BIG_ENDIAN |
61ed242d | 849 | select ARCH_MAY_HAVE_PC_FDC |
a211a082 | 850 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 851 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 852 | select BOOT_ELF32 |
42f77542 | 853 | select CEVT_R4K |
940f6b48 | 854 | select CSRC_R4K |
e2defae5 | 855 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
1da177e4 LT |
856 | select DMA_NONCOHERENT |
857 | select GENERIC_ISA_DMA | |
6630a8e5 | 858 | select HAVE_EISA |
8a118c38 | 859 | select HAVE_PCSPKR_PLATFORM |
eb01d42a | 860 | select HAVE_PCI |
67e38cf2 | 861 | select IRQ_MIPS_CPU |
d865bea4 | 862 | select I8253 |
1da177e4 LT |
863 | select I8259 |
864 | select ISA | |
eb8d40bb | 865 | select MIPS_L1_CACHE_SHIFT_6 |
4a0312fc | 866 | select SWAP_IO_SPACE if CPU_BIG_ENDIAN |
7cf8053b | 867 | select SYS_HAS_CPU_R4X00 |
4a0312fc | 868 | select SYS_HAS_CPU_R5000 |
c066a32a | 869 | select SYS_HAS_CPU_R10000 |
4a0312fc | 870 | select R5000_CPU_SCACHE |
36a88530 | 871 | select SYS_HAS_EARLY_PRINTK |
ed5ba2fb | 872 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 873 | select SYS_SUPPORTS_64BIT_KERNEL |
4a0312fc | 874 | select SYS_SUPPORTS_BIG_ENDIAN |
797798c1 | 875 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 876 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 877 | help |
14b36af4 TB |
878 | The SNI RM200/300/400 are MIPS-based machines manufactured by |
879 | Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid | |
1da177e4 LT |
880 | Technology and now in turn merged with Fujitsu. Say Y here to |
881 | support this machine type. | |
882 | ||
edcaf1a6 AN |
883 | config MACH_TX39XX |
884 | bool "Toshiba TX39 series based machines" | |
5e83d430 | 885 | |
edcaf1a6 AN |
886 | config MACH_TX49XX |
887 | bool "Toshiba TX49 series based machines" | |
5e83d430 | 888 | |
73b4390f RB |
889 | config MIKROTIK_RB532 |
890 | bool "Mikrotik RB532 boards" | |
891 | select CEVT_R4K | |
892 | select CSRC_R4K | |
893 | select DMA_NONCOHERENT | |
eb01d42a | 894 | select HAVE_PCI |
67e38cf2 | 895 | select IRQ_MIPS_CPU |
73b4390f RB |
896 | select SYS_HAS_CPU_MIPS32_R1 |
897 | select SYS_SUPPORTS_32BIT_KERNEL | |
898 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
899 | select SWAP_IO_SPACE | |
900 | select BOOT_RAW | |
d30a2b47 | 901 | select GPIOLIB |
930beb5a | 902 | select MIPS_L1_CACHE_SHIFT_4 |
73b4390f RB |
903 | help |
904 | Support the Mikrotik(tm) RouterBoard 532 series, | |
905 | based on the IDT RC32434 SoC. | |
906 | ||
9ddebc46 DD |
907 | config CAVIUM_OCTEON_SOC |
908 | bool "Cavium Networks Octeon SoC based boards" | |
a86c7f72 | 909 | select CEVT_R4K |
ea8c64ac | 910 | select ARCH_HAS_PHYS_TO_DMA |
1753d50c | 911 | select HAVE_RAPIDIO |
d4a451d5 | 912 | select PHYS_ADDR_T_64BIT |
a86c7f72 DD |
913 | select SYS_SUPPORTS_64BIT_KERNEL |
914 | select SYS_SUPPORTS_BIG_ENDIAN | |
f65aad41 | 915 | select EDAC_SUPPORT |
b01aec9b | 916 | select EDAC_ATOMIC_SCRUB |
73569d87 DD |
917 | select SYS_SUPPORTS_LITTLE_ENDIAN |
918 | select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN | |
a86c7f72 | 919 | select SYS_HAS_EARLY_PRINTK |
5e683389 | 920 | select SYS_HAS_CPU_CAVIUM_OCTEON |
eb01d42a | 921 | select HAVE_PCI |
f00e001e | 922 | select ZONE_DMA32 |
465aaed0 | 923 | select HOLES_IN_ZONE |
d30a2b47 | 924 | select GPIOLIB |
6e511163 DD |
925 | select LIBFDT |
926 | select USE_OF | |
927 | select ARCH_SPARSEMEM_ENABLE | |
928 | select SYS_SUPPORTS_SMP | |
7820b84b DD |
929 | select NR_CPUS_DEFAULT_64 |
930 | select MIPS_NR_CPU_NR_MAP_1024 | |
e326479f | 931 | select BUILTIN_DTB |
8c1e6b14 | 932 | select MTD_COMPLEX_MAPPINGS |
09230cbc | 933 | select SWIOTLB |
3ff72be4 | 934 | select SYS_SUPPORTS_RELOCATABLE |
a86c7f72 DD |
935 | help |
936 | This option supports all of the Octeon reference boards from Cavium | |
937 | Networks. It builds a kernel that dynamically determines the Octeon | |
938 | CPU type and supports all known board reference implementations. | |
939 | Some of the supported boards are: | |
940 | EBT3000 | |
941 | EBH3000 | |
942 | EBH3100 | |
943 | Thunder | |
944 | Kodama | |
945 | Hikari | |
946 | Say Y here for most Octeon reference boards. | |
947 | ||
7f058e85 J |
948 | config NLM_XLR_BOARD |
949 | bool "Netlogic XLR/XLS based systems" | |
7f058e85 J |
950 | select BOOT_ELF32 |
951 | select NLM_COMMON | |
7f058e85 J |
952 | select SYS_HAS_CPU_XLR |
953 | select SYS_SUPPORTS_SMP | |
eb01d42a | 954 | select HAVE_PCI |
7f058e85 J |
955 | select SWAP_IO_SPACE |
956 | select SYS_SUPPORTS_32BIT_KERNEL | |
957 | select SYS_SUPPORTS_64BIT_KERNEL | |
d4a451d5 | 958 | select PHYS_ADDR_T_64BIT |
7f058e85 J |
959 | select SYS_SUPPORTS_BIG_ENDIAN |
960 | select SYS_SUPPORTS_HIGHMEM | |
7f058e85 J |
961 | select NR_CPUS_DEFAULT_32 |
962 | select CEVT_R4K | |
963 | select CSRC_R4K | |
67e38cf2 | 964 | select IRQ_MIPS_CPU |
b97215fd | 965 | select ZONE_DMA32 if 64BIT |
7f058e85 J |
966 | select SYNC_R4K |
967 | select SYS_HAS_EARLY_PRINTK | |
8f0b0430 J |
968 | select SYS_SUPPORTS_ZBOOT |
969 | select SYS_SUPPORTS_ZBOOT_UART16550 | |
7f058e85 J |
970 | help |
971 | Support for systems based on Netlogic XLR and XLS processors. | |
972 | Say Y here if you have a XLR or XLS based board. | |
973 | ||
1c773ea4 J |
974 | config NLM_XLP_BOARD |
975 | bool "Netlogic XLP based systems" | |
1c773ea4 J |
976 | select BOOT_ELF32 |
977 | select NLM_COMMON | |
978 | select SYS_HAS_CPU_XLP | |
979 | select SYS_SUPPORTS_SMP | |
eb01d42a | 980 | select HAVE_PCI |
1c773ea4 J |
981 | select SYS_SUPPORTS_32BIT_KERNEL |
982 | select SYS_SUPPORTS_64BIT_KERNEL | |
d4a451d5 | 983 | select PHYS_ADDR_T_64BIT |
d30a2b47 | 984 | select GPIOLIB |
1c773ea4 J |
985 | select SYS_SUPPORTS_BIG_ENDIAN |
986 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
987 | select SYS_SUPPORTS_HIGHMEM | |
1c773ea4 J |
988 | select NR_CPUS_DEFAULT_32 |
989 | select CEVT_R4K | |
990 | select CSRC_R4K | |
67e38cf2 | 991 | select IRQ_MIPS_CPU |
b97215fd | 992 | select ZONE_DMA32 if 64BIT |
1c773ea4 J |
993 | select SYNC_R4K |
994 | select SYS_HAS_EARLY_PRINTK | |
2f6528e1 | 995 | select USE_OF |
8f0b0430 J |
996 | select SYS_SUPPORTS_ZBOOT |
997 | select SYS_SUPPORTS_ZBOOT_UART16550 | |
1c773ea4 J |
998 | help |
999 | This board is based on Netlogic XLP Processor. | |
1000 | Say Y here if you have a XLP based board. | |
1001 | ||
9bc463be DD |
1002 | config MIPS_PARAVIRT |
1003 | bool "Para-Virtualized guest system" | |
1004 | select CEVT_R4K | |
1005 | select CSRC_R4K | |
9bc463be DD |
1006 | select SYS_SUPPORTS_64BIT_KERNEL |
1007 | select SYS_SUPPORTS_32BIT_KERNEL | |
1008 | select SYS_SUPPORTS_BIG_ENDIAN | |
1009 | select SYS_SUPPORTS_SMP | |
1010 | select NR_CPUS_DEFAULT_4 | |
1011 | select SYS_HAS_EARLY_PRINTK | |
1012 | select SYS_HAS_CPU_MIPS32_R2 | |
1013 | select SYS_HAS_CPU_MIPS64_R2 | |
1014 | select SYS_HAS_CPU_CAVIUM_OCTEON | |
eb01d42a | 1015 | select HAVE_PCI |
9bc463be DD |
1016 | select SWAP_IO_SPACE |
1017 | help | |
1018 | This option supports guest running under ???? | |
1019 | ||
5e83d430 | 1020 | endchoice |
1da177e4 | 1021 | |
e8c7c482 | 1022 | source "arch/mips/alchemy/Kconfig" |
3b12308f | 1023 | source "arch/mips/ath25/Kconfig" |
d4a67d9d | 1024 | source "arch/mips/ath79/Kconfig" |
a656ffcb | 1025 | source "arch/mips/bcm47xx/Kconfig" |
e7300d04 | 1026 | source "arch/mips/bcm63xx/Kconfig" |
8945e37e | 1027 | source "arch/mips/bmips/Kconfig" |
eed0eabd | 1028 | source "arch/mips/generic/Kconfig" |
5e83d430 | 1029 | source "arch/mips/jazz/Kconfig" |
5ebabe59 | 1030 | source "arch/mips/jz4740/Kconfig" |
8ec6d935 | 1031 | source "arch/mips/lantiq/Kconfig" |
1f21d2bd | 1032 | source "arch/mips/lasat/Kconfig" |
2572f00d | 1033 | source "arch/mips/pic32/Kconfig" |
af0cfb2c | 1034 | source "arch/mips/pistachio/Kconfig" |
0f3a05cb | 1035 | source "arch/mips/pmcs-msp71xx/Kconfig" |
ae2b5bb6 | 1036 | source "arch/mips/ralink/Kconfig" |
29c48699 | 1037 | source "arch/mips/sgi-ip27/Kconfig" |
38b18f72 | 1038 | source "arch/mips/sibyte/Kconfig" |
22b1d707 | 1039 | source "arch/mips/txx9/Kconfig" |
5e83d430 | 1040 | source "arch/mips/vr41xx/Kconfig" |
a86c7f72 | 1041 | source "arch/mips/cavium-octeon/Kconfig" |
30ad29bb HC |
1042 | source "arch/mips/loongson32/Kconfig" |
1043 | source "arch/mips/loongson64/Kconfig" | |
7f058e85 | 1044 | source "arch/mips/netlogic/Kconfig" |
ae6e7e63 | 1045 | source "arch/mips/paravirt/Kconfig" |
38b18f72 | 1046 | |
5e83d430 RB |
1047 | endmenu |
1048 | ||
3c9ee7ef AM |
1049 | config GENERIC_HWEIGHT |
1050 | bool | |
1051 | default y | |
1052 | ||
1da177e4 LT |
1053 | config GENERIC_CALIBRATE_DELAY |
1054 | bool | |
1055 | default y | |
1056 | ||
ae1e9130 | 1057 | config SCHED_OMIT_FRAME_POINTER |
1cc89038 AN |
1058 | bool |
1059 | default y | |
1060 | ||
1da177e4 LT |
1061 | # |
1062 | # Select some configuration options automatically based on user selections. | |
1063 | # | |
0e2794b0 | 1064 | config FW_ARC |
1da177e4 | 1065 | bool |
1da177e4 | 1066 | |
61ed242d RB |
1067 | config ARCH_MAY_HAVE_PC_FDC |
1068 | bool | |
1069 | ||
9267a30d MSJ |
1070 | config BOOT_RAW |
1071 | bool | |
1072 | ||
217dd11e RB |
1073 | config CEVT_BCM1480 |
1074 | bool | |
1075 | ||
6457d9fc YY |
1076 | config CEVT_DS1287 |
1077 | bool | |
1078 | ||
1097c6ac YY |
1079 | config CEVT_GT641XX |
1080 | bool | |
1081 | ||
42f77542 RB |
1082 | config CEVT_R4K |
1083 | bool | |
1084 | ||
217dd11e RB |
1085 | config CEVT_SB1250 |
1086 | bool | |
1087 | ||
229f773e AN |
1088 | config CEVT_TXX9 |
1089 | bool | |
1090 | ||
217dd11e RB |
1091 | config CSRC_BCM1480 |
1092 | bool | |
1093 | ||
4247417d YY |
1094 | config CSRC_IOASIC |
1095 | bool | |
1096 | ||
940f6b48 RB |
1097 | config CSRC_R4K |
1098 | bool | |
1099 | ||
217dd11e RB |
1100 | config CSRC_SB1250 |
1101 | bool | |
1102 | ||
a7f4df4e AS |
1103 | config MIPS_CLOCK_VSYSCALL |
1104 | def_bool CSRC_R4K || CLKSRC_MIPS_GIC | |
1105 | ||
a9aec7fe | 1106 | config GPIO_TXX9 |
d30a2b47 | 1107 | select GPIOLIB |
a9aec7fe AN |
1108 | bool |
1109 | ||
0e2794b0 | 1110 | config FW_CFE |
df78b5c8 AJ |
1111 | bool |
1112 | ||
40e084a5 RB |
1113 | config ARCH_SUPPORTS_UPROBES |
1114 | bool | |
1115 | ||
885014bc | 1116 | config DMA_MAYBE_COHERENT |
f3ecc0ff | 1117 | select ARCH_HAS_DMA_COHERENCE_H |
885014bc FF |
1118 | select DMA_NONCOHERENT |
1119 | bool | |
1120 | ||
20d33064 PB |
1121 | config DMA_PERDEV_COHERENT |
1122 | bool | |
347cb6af | 1123 | select ARCH_HAS_SETUP_DMA_OPS |
5748e1b3 | 1124 | select DMA_NONCOHERENT |
20d33064 | 1125 | |
4ce588cd RB |
1126 | config DMA_NONCOHERENT |
1127 | bool | |
db91427b CH |
1128 | # |
1129 | # MIPS allows mixing "slightly different" Cacheability and Coherency | |
1130 | # Attribute bits. It is believed that the uncached access through | |
1131 | # KSEG1 and the implementation specific "uncached accelerated" used | |
1132 | # by pgprot_writcombine can be mixed, and the latter sometimes provides | |
1133 | # significant advantages. | |
1134 | # | |
419e2f18 | 1135 | select ARCH_HAS_DMA_WRITE_COMBINE |
f8c55dc6 | 1136 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE |
2ee7a4ef | 1137 | select ARCH_HAS_UNCACHED_SEGMENT |
e1e02b32 | 1138 | select NEED_DMA_MAP_STATE |
58b04406 | 1139 | select ARCH_HAS_DMA_COHERENT_TO_PFN |
f8c55dc6 | 1140 | select DMA_NONCOHERENT_CACHE_SYNC |
4ce588cd | 1141 | |
36a88530 | 1142 | config SYS_HAS_EARLY_PRINTK |
1da177e4 | 1143 | bool |
1da177e4 | 1144 | |
1b2bc75c | 1145 | config SYS_SUPPORTS_HOTPLUG_CPU |
dbb74540 | 1146 | bool |
dbb74540 | 1147 | |
1da177e4 LT |
1148 | config MIPS_BONITO64 |
1149 | bool | |
1da177e4 LT |
1150 | |
1151 | config MIPS_MSC | |
1152 | bool | |
1da177e4 | 1153 | |
1f21d2bd BM |
1154 | config MIPS_NILE4 |
1155 | bool | |
1156 | ||
39b8d525 RB |
1157 | config SYNC_R4K |
1158 | bool | |
1159 | ||
487d70d0 GJ |
1160 | config MIPS_MACHINE |
1161 | def_bool n | |
1162 | ||
ce816fa8 | 1163 | config NO_IOPORT_MAP |
d388d685 MR |
1164 | def_bool n |
1165 | ||
4e0748f5 MC |
1166 | config GENERIC_CSUM |
1167 | bool | |
932afdee | 1168 | default y if !CPU_HAS_LOAD_STORE_LR |
4e0748f5 | 1169 | |
8313da30 RB |
1170 | config GENERIC_ISA_DMA |
1171 | bool | |
1172 | select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n | |
a35bee8a | 1173 | select ISA_DMA_API |
8313da30 | 1174 | |
aa414dff RB |
1175 | config GENERIC_ISA_DMA_SUPPORT_BROKEN |
1176 | bool | |
8313da30 | 1177 | select GENERIC_ISA_DMA |
aa414dff | 1178 | |
a35bee8a NK |
1179 | config ISA_DMA_API |
1180 | bool | |
1181 | ||
465aaed0 DD |
1182 | config HOLES_IN_ZONE |
1183 | bool | |
1184 | ||
8c530ea3 MR |
1185 | config SYS_SUPPORTS_RELOCATABLE |
1186 | bool | |
1187 | help | |
371a4151 EWI |
1188 | Selected if the platform supports relocating the kernel. |
1189 | The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF | |
1190 | to allow access to command line and entropy sources. | |
8c530ea3 | 1191 | |
f381bf6d DD |
1192 | config MIPS_CBPF_JIT |
1193 | def_bool y | |
1194 | depends on BPF_JIT && HAVE_CBPF_JIT | |
1195 | ||
1196 | config MIPS_EBPF_JIT | |
1197 | def_bool y | |
1198 | depends on BPF_JIT && HAVE_EBPF_JIT | |
1199 | ||
1200 | ||
5e83d430 | 1201 | # |
6b2aac42 | 1202 | # Endianness selection. Sufficiently obscure so many users don't know what to |
5e83d430 RB |
1203 | # answer,so we try hard to limit the available choices. Also the use of a |
1204 | # choice statement should be more obvious to the user. | |
1205 | # | |
1206 | choice | |
6b2aac42 | 1207 | prompt "Endianness selection" |
1da177e4 LT |
1208 | help |
1209 | Some MIPS machines can be configured for either little or big endian | |
5e83d430 | 1210 | byte order. These modes require different kernels and a different |
3cb2fccc | 1211 | Linux distribution. In general there is one preferred byteorder for a |
5e83d430 | 1212 | particular system but some systems are just as commonly used in the |
3dde6ad8 | 1213 | one or the other endianness. |
5e83d430 RB |
1214 | |
1215 | config CPU_BIG_ENDIAN | |
1216 | bool "Big endian" | |
1217 | depends on SYS_SUPPORTS_BIG_ENDIAN | |
1218 | ||
1219 | config CPU_LITTLE_ENDIAN | |
1220 | bool "Little endian" | |
1221 | depends on SYS_SUPPORTS_LITTLE_ENDIAN | |
5e83d430 RB |
1222 | |
1223 | endchoice | |
1224 | ||
22b0763a DD |
1225 | config EXPORT_UASM |
1226 | bool | |
1227 | ||
2116245e RB |
1228 | config SYS_SUPPORTS_APM_EMULATION |
1229 | bool | |
1230 | ||
5e83d430 RB |
1231 | config SYS_SUPPORTS_BIG_ENDIAN |
1232 | bool | |
1233 | ||
1234 | config SYS_SUPPORTS_LITTLE_ENDIAN | |
1235 | bool | |
1da177e4 | 1236 | |
9cffd154 DD |
1237 | config SYS_SUPPORTS_HUGETLBFS |
1238 | bool | |
45e03e62 | 1239 | depends on CPU_SUPPORTS_HUGEPAGES |
9cffd154 DD |
1240 | default y |
1241 | ||
aa1762f4 DD |
1242 | config MIPS_HUGE_TLB_SUPPORT |
1243 | def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE | |
1244 | ||
1da177e4 LT |
1245 | config IRQ_CPU_RM7K |
1246 | bool | |
1247 | ||
9267a30d MSJ |
1248 | config IRQ_MSP_SLP |
1249 | bool | |
1250 | ||
1251 | config IRQ_MSP_CIC | |
1252 | bool | |
1253 | ||
8420fd00 AN |
1254 | config IRQ_TXX9 |
1255 | bool | |
1256 | ||
d5ab1a69 YY |
1257 | config IRQ_GT641XX |
1258 | bool | |
1259 | ||
252161ec | 1260 | config PCI_GT64XXX_PCI0 |
1da177e4 | 1261 | bool |
1da177e4 | 1262 | |
a57140e9 TB |
1263 | config PCI_XTALK_BRIDGE |
1264 | bool | |
1265 | ||
9267a30d MSJ |
1266 | config NO_EXCEPT_FILL |
1267 | bool | |
1268 | ||
a83860c2 RB |
1269 | config SOC_EMMA2RH |
1270 | bool | |
1271 | select CEVT_R4K | |
1272 | select CSRC_R4K | |
1273 | select DMA_NONCOHERENT | |
67e38cf2 | 1274 | select IRQ_MIPS_CPU |
a83860c2 RB |
1275 | select SWAP_IO_SPACE |
1276 | select SYS_HAS_CPU_R5500 | |
1277 | select SYS_SUPPORTS_32BIT_KERNEL | |
1278 | select SYS_SUPPORTS_64BIT_KERNEL | |
1279 | select SYS_SUPPORTS_BIG_ENDIAN | |
1280 | ||
edb6310a DL |
1281 | config SOC_PNX833X |
1282 | bool | |
1283 | select CEVT_R4K | |
1284 | select CSRC_R4K | |
67e38cf2 | 1285 | select IRQ_MIPS_CPU |
edb6310a DL |
1286 | select DMA_NONCOHERENT |
1287 | select SYS_HAS_CPU_MIPS32_R2 | |
1288 | select SYS_SUPPORTS_32BIT_KERNEL | |
1289 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1290 | select SYS_SUPPORTS_BIG_ENDIAN | |
377cb1b6 | 1291 | select SYS_SUPPORTS_MIPS16 |
edb6310a DL |
1292 | select CPU_MIPSR2_IRQ_VI |
1293 | ||
1294 | config SOC_PNX8335 | |
1295 | bool | |
1296 | select SOC_PNX833X | |
1297 | ||
a7e07b1a MC |
1298 | config MIPS_SPRAM |
1299 | bool | |
1300 | ||
1da177e4 LT |
1301 | config SWAP_IO_SPACE |
1302 | bool | |
1303 | ||
e2defae5 TB |
1304 | config SGI_HAS_INDYDOG |
1305 | bool | |
1306 | ||
5b438c44 TB |
1307 | config SGI_HAS_HAL2 |
1308 | bool | |
1309 | ||
e2defae5 TB |
1310 | config SGI_HAS_SEEQ |
1311 | bool | |
1312 | ||
1313 | config SGI_HAS_WD93 | |
1314 | bool | |
1315 | ||
1316 | config SGI_HAS_ZILOG | |
1317 | bool | |
1318 | ||
1319 | config SGI_HAS_I8042 | |
1320 | bool | |
1321 | ||
1322 | config DEFAULT_SGI_PARTITION | |
1323 | bool | |
1324 | ||
0e2794b0 | 1325 | config FW_ARC32 |
5e83d430 RB |
1326 | bool |
1327 | ||
aaa9fad3 | 1328 | config FW_SNIPROM |
231a35d3 TB |
1329 | bool |
1330 | ||
1da177e4 LT |
1331 | config BOOT_ELF32 |
1332 | bool | |
1da177e4 | 1333 | |
930beb5a FF |
1334 | config MIPS_L1_CACHE_SHIFT_4 |
1335 | bool | |
1336 | ||
1337 | config MIPS_L1_CACHE_SHIFT_5 | |
1338 | bool | |
1339 | ||
1340 | config MIPS_L1_CACHE_SHIFT_6 | |
1341 | bool | |
1342 | ||
1343 | config MIPS_L1_CACHE_SHIFT_7 | |
1344 | bool | |
1345 | ||
1da177e4 LT |
1346 | config MIPS_L1_CACHE_SHIFT |
1347 | int | |
a4c0201e | 1348 | default "7" if MIPS_L1_CACHE_SHIFT_7 |
5432eeb6 KC |
1349 | default "6" if MIPS_L1_CACHE_SHIFT_6 |
1350 | default "5" if MIPS_L1_CACHE_SHIFT_5 | |
1351 | default "4" if MIPS_L1_CACHE_SHIFT_4 | |
1da177e4 LT |
1352 | default "5" |
1353 | ||
1da177e4 LT |
1354 | config HAVE_STD_PC_SERIAL_PORT |
1355 | bool | |
1356 | ||
1da177e4 LT |
1357 | config ARC_CONSOLE |
1358 | bool "ARC console support" | |
e2defae5 | 1359 | depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) |
1da177e4 LT |
1360 | |
1361 | config ARC_MEMORY | |
1362 | bool | |
14b36af4 | 1363 | depends on MACH_JAZZ || SNI_RM || SGI_IP32 |
1da177e4 LT |
1364 | default y |
1365 | ||
1366 | config ARC_PROMLIB | |
1367 | bool | |
e2defae5 | 1368 | depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 |
1da177e4 LT |
1369 | default y |
1370 | ||
0e2794b0 | 1371 | config FW_ARC64 |
1da177e4 | 1372 | bool |
1da177e4 LT |
1373 | |
1374 | config BOOT_ELF64 | |
1375 | bool | |
1da177e4 | 1376 | |
1da177e4 LT |
1377 | menu "CPU selection" |
1378 | ||
1379 | choice | |
1380 | prompt "CPU type" | |
1381 | default CPU_R4X00 | |
1382 | ||
0e476d91 HC |
1383 | config CPU_LOONGSON3 |
1384 | bool "Loongson 3 CPU" | |
1385 | depends on SYS_HAS_CPU_LOONGSON3 | |
d3bc81be | 1386 | select ARCH_HAS_PHYS_TO_DMA |
0e476d91 HC |
1387 | select CPU_SUPPORTS_64BIT_KERNEL |
1388 | select CPU_SUPPORTS_HIGHMEM | |
1389 | select CPU_SUPPORTS_HUGEPAGES | |
932afdee | 1390 | select CPU_HAS_LOAD_STORE_LR |
0e476d91 HC |
1391 | select WEAK_ORDERING |
1392 | select WEAK_REORDERING_BEYOND_LLSC | |
b2edcfc8 | 1393 | select MIPS_PGD_C0_CONTEXT |
17c99d94 | 1394 | select MIPS_L1_CACHE_SHIFT_6 |
d30a2b47 | 1395 | select GPIOLIB |
09230cbc | 1396 | select SWIOTLB |
0e476d91 HC |
1397 | help |
1398 | The Loongson 3 processor implements the MIPS64R2 instruction | |
1399 | set with many extensions. | |
1400 | ||
1e820da3 HC |
1401 | config LOONGSON3_ENHANCEMENT |
1402 | bool "New Loongson 3 CPU Enhancements" | |
1403 | default n | |
1404 | select CPU_MIPSR2 | |
1405 | select CPU_HAS_PREFETCH | |
1406 | depends on CPU_LOONGSON3 | |
1407 | help | |
1408 | New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A | |
1409 | R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as | |
1410 | FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User | |
1411 | Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), | |
1412 | Fast TLB refill support, etc. | |
1413 | ||
1414 | This option enable those enhancements which are not probed at run | |
1415 | time. If you want a generic kernel to run on all Loongson 3 machines, | |
1416 | please say 'N' here. If you want a high-performance kernel to run on | |
1417 | new Loongson 3 machines only, please say 'Y' here. | |
1418 | ||
e02e07e3 HC |
1419 | config CPU_LOONGSON3_WORKAROUNDS |
1420 | bool "Old Loongson 3 LLSC Workarounds" | |
1421 | default y if SMP | |
1422 | depends on CPU_LOONGSON3 | |
1423 | help | |
1424 | Loongson 3 processors have the llsc issues which require workarounds. | |
1425 | Without workarounds the system may hang unexpectedly. | |
1426 | ||
1427 | Newer Loongson 3 will fix these issues and no workarounds are needed. | |
1428 | The workarounds have no significant side effect on them but may | |
1429 | decrease the performance of the system so this option should be | |
1430 | disabled unless the kernel is intended to be run on old systems. | |
1431 | ||
1432 | If unsure, please say Y. | |
1433 | ||
3702bba5 WZ |
1434 | config CPU_LOONGSON2E |
1435 | bool "Loongson 2E" | |
1436 | depends on SYS_HAS_CPU_LOONGSON2E | |
1437 | select CPU_LOONGSON2 | |
2a21c730 FZ |
1438 | help |
1439 | The Loongson 2E processor implements the MIPS III instruction set | |
1440 | with many extensions. | |
1441 | ||
25985edc | 1442 | It has an internal FPGA northbridge, which is compatible to |
6f7a251a WZ |
1443 | bonito64. |
1444 | ||
1445 | config CPU_LOONGSON2F | |
1446 | bool "Loongson 2F" | |
1447 | depends on SYS_HAS_CPU_LOONGSON2F | |
1448 | select CPU_LOONGSON2 | |
d30a2b47 | 1449 | select GPIOLIB |
6f7a251a WZ |
1450 | help |
1451 | The Loongson 2F processor implements the MIPS III instruction set | |
1452 | with many extensions. | |
1453 | ||
1454 | Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller | |
1455 | have a similar programming interface with FPGA northbridge used in | |
1456 | Loongson2E. | |
1457 | ||
ca585cf9 KC |
1458 | config CPU_LOONGSON1B |
1459 | bool "Loongson 1B" | |
1460 | depends on SYS_HAS_CPU_LOONGSON1B | |
1461 | select CPU_LOONGSON1 | |
9ec88b60 | 1462 | select LEDS_GPIO_REGISTER |
ca585cf9 KC |
1463 | help |
1464 | The Loongson 1B is a 32-bit SoC, which implements the MIPS32 | |
968dc5a0 XZ |
1465 | Release 1 instruction set and part of the MIPS32 Release 2 |
1466 | instruction set. | |
ca585cf9 | 1467 | |
12e3280b YL |
1468 | config CPU_LOONGSON1C |
1469 | bool "Loongson 1C" | |
1470 | depends on SYS_HAS_CPU_LOONGSON1C | |
1471 | select CPU_LOONGSON1 | |
12e3280b YL |
1472 | select LEDS_GPIO_REGISTER |
1473 | help | |
1474 | The Loongson 1C is a 32-bit SoC, which implements the MIPS32 | |
968dc5a0 XZ |
1475 | Release 1 instruction set and part of the MIPS32 Release 2 |
1476 | instruction set. | |
12e3280b | 1477 | |
6e760c8d RB |
1478 | config CPU_MIPS32_R1 |
1479 | bool "MIPS32 Release 1" | |
7cf8053b | 1480 | depends on SYS_HAS_CPU_MIPS32_R1 |
6e760c8d | 1481 | select CPU_HAS_PREFETCH |
932afdee | 1482 | select CPU_HAS_LOAD_STORE_LR |
797798c1 | 1483 | select CPU_SUPPORTS_32BIT_KERNEL |
ec28f306 | 1484 | select CPU_SUPPORTS_HIGHMEM |
1e5f1caa | 1485 | help |
5e83d430 | 1486 | Choose this option to build a kernel for release 1 or later of the |
1e5f1caa RB |
1487 | MIPS32 architecture. Most modern embedded systems with a 32-bit |
1488 | MIPS processor are based on a MIPS32 processor. If you know the | |
1489 | specific type of processor in your system, choose those that one | |
1490 | otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. | |
1491 | Release 2 of the MIPS32 architecture is available since several | |
1492 | years so chances are you even have a MIPS32 Release 2 processor | |
1493 | in which case you should choose CPU_MIPS32_R2 instead for better | |
1494 | performance. | |
1495 | ||
1496 | config CPU_MIPS32_R2 | |
1497 | bool "MIPS32 Release 2" | |
7cf8053b | 1498 | depends on SYS_HAS_CPU_MIPS32_R2 |
1e5f1caa | 1499 | select CPU_HAS_PREFETCH |
932afdee | 1500 | select CPU_HAS_LOAD_STORE_LR |
797798c1 | 1501 | select CPU_SUPPORTS_32BIT_KERNEL |
ec28f306 | 1502 | select CPU_SUPPORTS_HIGHMEM |
a5e9a69e | 1503 | select CPU_SUPPORTS_MSA |
2235a54d | 1504 | select HAVE_KVM |
6e760c8d | 1505 | help |
5e83d430 | 1506 | Choose this option to build a kernel for release 2 or later of the |
6e760c8d RB |
1507 | MIPS32 architecture. Most modern embedded systems with a 32-bit |
1508 | MIPS processor are based on a MIPS32 processor. If you know the | |
1509 | specific type of processor in your system, choose those that one | |
1510 | otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. | |
1511 | ||
7fd08ca5 | 1512 | config CPU_MIPS32_R6 |
674d10e2 | 1513 | bool "MIPS32 Release 6" |
7fd08ca5 LY |
1514 | depends on SYS_HAS_CPU_MIPS32_R6 |
1515 | select CPU_HAS_PREFETCH | |
1516 | select CPU_SUPPORTS_32BIT_KERNEL | |
1517 | select CPU_SUPPORTS_HIGHMEM | |
1518 | select CPU_SUPPORTS_MSA | |
1519 | select HAVE_KVM | |
1520 | select MIPS_O32_FP64_SUPPORT | |
1521 | help | |
1522 | Choose this option to build a kernel for release 6 or later of the | |
1523 | MIPS32 architecture. New MIPS processors, starting with the Warrior | |
1524 | family, are based on a MIPS32r6 processor. If you own an older | |
1525 | processor, you probably need to select MIPS32r1 or MIPS32r2 instead. | |
1526 | ||
6e760c8d RB |
1527 | config CPU_MIPS64_R1 |
1528 | bool "MIPS64 Release 1" | |
7cf8053b | 1529 | depends on SYS_HAS_CPU_MIPS64_R1 |
797798c1 | 1530 | select CPU_HAS_PREFETCH |
932afdee | 1531 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1532 | select CPU_SUPPORTS_32BIT_KERNEL |
1533 | select CPU_SUPPORTS_64BIT_KERNEL | |
ec28f306 | 1534 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1535 | select CPU_SUPPORTS_HUGEPAGES |
6e760c8d RB |
1536 | help |
1537 | Choose this option to build a kernel for release 1 or later of the | |
1538 | MIPS64 architecture. Many modern embedded systems with a 64-bit | |
1539 | MIPS processor are based on a MIPS64 processor. If you know the | |
1540 | specific type of processor in your system, choose those that one | |
1541 | otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. | |
1e5f1caa RB |
1542 | Release 2 of the MIPS64 architecture is available since several |
1543 | years so chances are you even have a MIPS64 Release 2 processor | |
1544 | in which case you should choose CPU_MIPS64_R2 instead for better | |
1545 | performance. | |
1546 | ||
1547 | config CPU_MIPS64_R2 | |
1548 | bool "MIPS64 Release 2" | |
7cf8053b | 1549 | depends on SYS_HAS_CPU_MIPS64_R2 |
797798c1 | 1550 | select CPU_HAS_PREFETCH |
932afdee | 1551 | select CPU_HAS_LOAD_STORE_LR |
1e5f1caa RB |
1552 | select CPU_SUPPORTS_32BIT_KERNEL |
1553 | select CPU_SUPPORTS_64BIT_KERNEL | |
ec28f306 | 1554 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1555 | select CPU_SUPPORTS_HUGEPAGES |
a5e9a69e | 1556 | select CPU_SUPPORTS_MSA |
40a2df49 | 1557 | select HAVE_KVM |
1e5f1caa RB |
1558 | help |
1559 | Choose this option to build a kernel for release 2 or later of the | |
1560 | MIPS64 architecture. Many modern embedded systems with a 64-bit | |
1561 | MIPS processor are based on a MIPS64 processor. If you know the | |
1562 | specific type of processor in your system, choose those that one | |
1563 | otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. | |
1da177e4 | 1564 | |
7fd08ca5 | 1565 | config CPU_MIPS64_R6 |
674d10e2 | 1566 | bool "MIPS64 Release 6" |
7fd08ca5 LY |
1567 | depends on SYS_HAS_CPU_MIPS64_R6 |
1568 | select CPU_HAS_PREFETCH | |
1569 | select CPU_SUPPORTS_32BIT_KERNEL | |
1570 | select CPU_SUPPORTS_64BIT_KERNEL | |
1571 | select CPU_SUPPORTS_HIGHMEM | |
afd375dc | 1572 | select CPU_SUPPORTS_HUGEPAGES |
7fd08ca5 | 1573 | select CPU_SUPPORTS_MSA |
2e6c7747 | 1574 | select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 |
40a2df49 | 1575 | select HAVE_KVM |
7fd08ca5 LY |
1576 | help |
1577 | Choose this option to build a kernel for release 6 or later of the | |
1578 | MIPS64 architecture. New MIPS processors, starting with the Warrior | |
1579 | family, are based on a MIPS64r6 processor. If you own an older | |
1580 | processor, you probably need to select MIPS64r1 or MIPS64r2 instead. | |
1581 | ||
1da177e4 LT |
1582 | config CPU_R3000 |
1583 | bool "R3000" | |
7cf8053b | 1584 | depends on SYS_HAS_CPU_R3000 |
f7062ddb | 1585 | select CPU_HAS_WB |
932afdee | 1586 | select CPU_HAS_LOAD_STORE_LR |
54746829 | 1587 | select CPU_R3K_TLB |
ed5ba2fb | 1588 | select CPU_SUPPORTS_32BIT_KERNEL |
797798c1 | 1589 | select CPU_SUPPORTS_HIGHMEM |
1da177e4 LT |
1590 | help |
1591 | Please make sure to pick the right CPU type. Linux/MIPS is not | |
1592 | designed to be generic, i.e. Kernels compiled for R3000 CPUs will | |
1593 | *not* work on R4000 machines and vice versa. However, since most | |
1594 | of the supported machines have an R4000 (or similar) CPU, R4x00 | |
1595 | might be a safe bet. If the resulting kernel does not work, | |
1596 | try to recompile with R3000. | |
1597 | ||
1598 | config CPU_TX39XX | |
1599 | bool "R39XX" | |
7cf8053b | 1600 | depends on SYS_HAS_CPU_TX39XX |
ed5ba2fb | 1601 | select CPU_SUPPORTS_32BIT_KERNEL |
932afdee | 1602 | select CPU_HAS_LOAD_STORE_LR |
54746829 | 1603 | select CPU_R3K_TLB |
1da177e4 LT |
1604 | |
1605 | config CPU_VR41XX | |
1606 | bool "R41xx" | |
7cf8053b | 1607 | depends on SYS_HAS_CPU_VR41XX |
ed5ba2fb YY |
1608 | select CPU_SUPPORTS_32BIT_KERNEL |
1609 | select CPU_SUPPORTS_64BIT_KERNEL | |
932afdee | 1610 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 | 1611 | help |
5e83d430 | 1612 | The options selects support for the NEC VR4100 series of processors. |
1da177e4 LT |
1613 | Only choose this option if you have one of these processors as a |
1614 | kernel built with this option will not run on any other type of | |
1615 | processor or vice versa. | |
1616 | ||
1da177e4 LT |
1617 | config CPU_R4X00 |
1618 | bool "R4x00" | |
7cf8053b | 1619 | depends on SYS_HAS_CPU_R4X00 |
ed5ba2fb YY |
1620 | select CPU_SUPPORTS_32BIT_KERNEL |
1621 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1622 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1623 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1624 | help |
1625 | MIPS Technologies R4000-series processors other than 4300, including | |
1626 | the R4000, R4400, R4600, and 4700. | |
1627 | ||
1628 | config CPU_TX49XX | |
1629 | bool "R49XX" | |
7cf8053b | 1630 | depends on SYS_HAS_CPU_TX49XX |
de862b48 | 1631 | select CPU_HAS_PREFETCH |
932afdee | 1632 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1633 | select CPU_SUPPORTS_32BIT_KERNEL |
1634 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1635 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1636 | |
1637 | config CPU_R5000 | |
1638 | bool "R5000" | |
7cf8053b | 1639 | depends on SYS_HAS_CPU_R5000 |
ed5ba2fb YY |
1640 | select CPU_SUPPORTS_32BIT_KERNEL |
1641 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1642 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1643 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1644 | help |
1645 | MIPS Technologies R5000-series processors other than the Nevada. | |
1646 | ||
542c1020 SK |
1647 | config CPU_R5500 |
1648 | bool "R5500" | |
1649 | depends on SYS_HAS_CPU_R5500 | |
542c1020 SK |
1650 | select CPU_SUPPORTS_32BIT_KERNEL |
1651 | select CPU_SUPPORTS_64BIT_KERNEL | |
9cffd154 | 1652 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1653 | select CPU_HAS_LOAD_STORE_LR |
542c1020 SK |
1654 | help |
1655 | NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV | |
1656 | instruction set. | |
1657 | ||
1da177e4 LT |
1658 | config CPU_NEVADA |
1659 | bool "RM52xx" | |
7cf8053b | 1660 | depends on SYS_HAS_CPU_NEVADA |
ed5ba2fb YY |
1661 | select CPU_SUPPORTS_32BIT_KERNEL |
1662 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1663 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1664 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1665 | help |
1666 | QED / PMC-Sierra RM52xx-series ("Nevada") processors. | |
1667 | ||
1da177e4 LT |
1668 | config CPU_R10000 |
1669 | bool "R10000" | |
7cf8053b | 1670 | depends on SYS_HAS_CPU_R10000 |
5e83d430 | 1671 | select CPU_HAS_PREFETCH |
932afdee | 1672 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1673 | select CPU_SUPPORTS_32BIT_KERNEL |
1674 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1675 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1676 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1677 | help |
1678 | MIPS Technologies R10000-series processors. | |
1679 | ||
1680 | config CPU_RM7000 | |
1681 | bool "RM7000" | |
7cf8053b | 1682 | depends on SYS_HAS_CPU_RM7000 |
5e83d430 | 1683 | select CPU_HAS_PREFETCH |
932afdee | 1684 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1685 | select CPU_SUPPORTS_32BIT_KERNEL |
1686 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1687 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1688 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1689 | |
1690 | config CPU_SB1 | |
1691 | bool "SB1" | |
7cf8053b | 1692 | depends on SYS_HAS_CPU_SB1 |
932afdee | 1693 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1694 | select CPU_SUPPORTS_32BIT_KERNEL |
1695 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1696 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1697 | select CPU_SUPPORTS_HUGEPAGES |
0004a9df | 1698 | select WEAK_ORDERING |
1da177e4 | 1699 | |
a86c7f72 DD |
1700 | config CPU_CAVIUM_OCTEON |
1701 | bool "Cavium Octeon processor" | |
5e683389 | 1702 | depends on SYS_HAS_CPU_CAVIUM_OCTEON |
a86c7f72 | 1703 | select CPU_HAS_PREFETCH |
932afdee | 1704 | select CPU_HAS_LOAD_STORE_LR |
a86c7f72 | 1705 | select CPU_SUPPORTS_64BIT_KERNEL |
a86c7f72 | 1706 | select WEAK_ORDERING |
a86c7f72 | 1707 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1708 | select CPU_SUPPORTS_HUGEPAGES |
df115f3e BH |
1709 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
1710 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
930beb5a | 1711 | select MIPS_L1_CACHE_SHIFT_7 |
0ae3abcd | 1712 | select HAVE_KVM |
a86c7f72 DD |
1713 | help |
1714 | The Cavium Octeon processor is a highly integrated chip containing | |
1715 | many ethernet hardware widgets for networking tasks. The processor | |
1716 | can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. | |
1717 | Full details can be found at http://www.caviumnetworks.com. | |
1718 | ||
cd746249 JG |
1719 | config CPU_BMIPS |
1720 | bool "Broadcom BMIPS" | |
1721 | depends on SYS_HAS_CPU_BMIPS | |
1722 | select CPU_MIPS32 | |
fe7f62c0 | 1723 | select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 |
cd746249 JG |
1724 | select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 |
1725 | select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 | |
1726 | select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 | |
1727 | select CPU_SUPPORTS_32BIT_KERNEL | |
1728 | select DMA_NONCOHERENT | |
67e38cf2 | 1729 | select IRQ_MIPS_CPU |
cd746249 JG |
1730 | select SWAP_IO_SPACE |
1731 | select WEAK_ORDERING | |
c1c0c461 | 1732 | select CPU_SUPPORTS_HIGHMEM |
69aaf9c8 | 1733 | select CPU_HAS_PREFETCH |
932afdee | 1734 | select CPU_HAS_LOAD_STORE_LR |
a8d709b0 MM |
1735 | select CPU_SUPPORTS_CPUFREQ |
1736 | select MIPS_EXTERNAL_TIMER | |
c1c0c461 | 1737 | help |
fe7f62c0 | 1738 | Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. |
c1c0c461 | 1739 | |
7f058e85 J |
1740 | config CPU_XLR |
1741 | bool "Netlogic XLR SoC" | |
1742 | depends on SYS_HAS_CPU_XLR | |
932afdee | 1743 | select CPU_HAS_LOAD_STORE_LR |
7f058e85 J |
1744 | select CPU_SUPPORTS_32BIT_KERNEL |
1745 | select CPU_SUPPORTS_64BIT_KERNEL | |
1746 | select CPU_SUPPORTS_HIGHMEM | |
970d032f | 1747 | select CPU_SUPPORTS_HUGEPAGES |
7f058e85 J |
1748 | select WEAK_ORDERING |
1749 | select WEAK_REORDERING_BEYOND_LLSC | |
7f058e85 J |
1750 | help |
1751 | Netlogic Microsystems XLR/XLS processors. | |
1c773ea4 J |
1752 | |
1753 | config CPU_XLP | |
1754 | bool "Netlogic XLP SoC" | |
1755 | depends on SYS_HAS_CPU_XLP | |
1756 | select CPU_SUPPORTS_32BIT_KERNEL | |
1757 | select CPU_SUPPORTS_64BIT_KERNEL | |
1758 | select CPU_SUPPORTS_HIGHMEM | |
1c773ea4 J |
1759 | select WEAK_ORDERING |
1760 | select WEAK_REORDERING_BEYOND_LLSC | |
1761 | select CPU_HAS_PREFETCH | |
932afdee | 1762 | select CPU_HAS_LOAD_STORE_LR |
d6504846 | 1763 | select CPU_MIPSR2 |
ddba6833 | 1764 | select CPU_SUPPORTS_HUGEPAGES |
2db003a5 | 1765 | select MIPS_ASID_BITS_VARIABLE |
1c773ea4 J |
1766 | help |
1767 | Netlogic Microsystems XLP processors. | |
1da177e4 LT |
1768 | endchoice |
1769 | ||
a6e18781 LY |
1770 | config CPU_MIPS32_3_5_FEATURES |
1771 | bool "MIPS32 Release 3.5 Features" | |
1772 | depends on SYS_HAS_CPU_MIPS32_R3_5 | |
7fd08ca5 | 1773 | depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 |
a6e18781 LY |
1774 | help |
1775 | Choose this option to build a kernel for release 2 or later of the | |
1776 | MIPS32 architecture including features from the 3.5 release such as | |
1777 | support for Enhanced Virtual Addressing (EVA). | |
1778 | ||
1779 | config CPU_MIPS32_3_5_EVA | |
1780 | bool "Enhanced Virtual Addressing (EVA)" | |
1781 | depends on CPU_MIPS32_3_5_FEATURES | |
1782 | select EVA | |
1783 | default y | |
1784 | help | |
1785 | Choose this option if you want to enable the Enhanced Virtual | |
1786 | Addressing (EVA) on your MIPS32 core (such as proAptiv). | |
1787 | One of its primary benefits is an increase in the maximum size | |
1788 | of lowmem (up to 3GB). If unsure, say 'N' here. | |
1789 | ||
c5b36783 SH |
1790 | config CPU_MIPS32_R5_FEATURES |
1791 | bool "MIPS32 Release 5 Features" | |
1792 | depends on SYS_HAS_CPU_MIPS32_R5 | |
1793 | depends on CPU_MIPS32_R2 | |
1794 | help | |
1795 | Choose this option to build a kernel for release 2 or later of the | |
1796 | MIPS32 architecture including features from release 5 such as | |
1797 | support for Extended Physical Addressing (XPA). | |
1798 | ||
1799 | config CPU_MIPS32_R5_XPA | |
1800 | bool "Extended Physical Addressing (XPA)" | |
1801 | depends on CPU_MIPS32_R5_FEATURES | |
1802 | depends on !EVA | |
1803 | depends on !PAGE_SIZE_4KB | |
1804 | depends on SYS_SUPPORTS_HIGHMEM | |
1805 | select XPA | |
1806 | select HIGHMEM | |
d4a451d5 | 1807 | select PHYS_ADDR_T_64BIT |
c5b36783 SH |
1808 | default n |
1809 | help | |
1810 | Choose this option if you want to enable the Extended Physical | |
1811 | Addressing (XPA) on your MIPS32 core (such as P5600 series). The | |
1812 | benefit is to increase physical addressing equal to or greater | |
1813 | than 40 bits. Note that this has the side effect of turning on | |
1814 | 64-bit addressing which in turn makes the PTEs 64-bit in size. | |
1815 | If unsure, say 'N' here. | |
1816 | ||
622844bf WZ |
1817 | if CPU_LOONGSON2F |
1818 | config CPU_NOP_WORKAROUNDS | |
1819 | bool | |
1820 | ||
1821 | config CPU_JUMP_WORKAROUNDS | |
1822 | bool | |
1823 | ||
1824 | config CPU_LOONGSON2F_WORKAROUNDS | |
1825 | bool "Loongson 2F Workarounds" | |
1826 | default y | |
1827 | select CPU_NOP_WORKAROUNDS | |
1828 | select CPU_JUMP_WORKAROUNDS | |
1829 | help | |
1830 | Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which | |
1831 | require workarounds. Without workarounds the system may hang | |
1832 | unexpectedly. For more information please refer to the gas | |
1833 | -mfix-loongson2f-nop and -mfix-loongson2f-jump options. | |
1834 | ||
1835 | Loongson 2F03 and later have fixed these issues and no workarounds | |
1836 | are needed. The workarounds have no significant side effect on them | |
1837 | but may decrease the performance of the system so this option should | |
1838 | be disabled unless the kernel is intended to be run on 2F01 or 2F02 | |
1839 | systems. | |
1840 | ||
1841 | If unsure, please say Y. | |
1842 | endif # CPU_LOONGSON2F | |
1843 | ||
1b93b3c3 WZ |
1844 | config SYS_SUPPORTS_ZBOOT |
1845 | bool | |
1846 | select HAVE_KERNEL_GZIP | |
1847 | select HAVE_KERNEL_BZIP2 | |
31c4867d | 1848 | select HAVE_KERNEL_LZ4 |
1b93b3c3 | 1849 | select HAVE_KERNEL_LZMA |
fe1d45e0 | 1850 | select HAVE_KERNEL_LZO |
4e23eb63 | 1851 | select HAVE_KERNEL_XZ |
1b93b3c3 WZ |
1852 | |
1853 | config SYS_SUPPORTS_ZBOOT_UART16550 | |
1854 | bool | |
1855 | select SYS_SUPPORTS_ZBOOT | |
1856 | ||
dbb98314 AB |
1857 | config SYS_SUPPORTS_ZBOOT_UART_PROM |
1858 | bool | |
1859 | select SYS_SUPPORTS_ZBOOT | |
1860 | ||
3702bba5 WZ |
1861 | config CPU_LOONGSON2 |
1862 | bool | |
1863 | select CPU_SUPPORTS_32BIT_KERNEL | |
1864 | select CPU_SUPPORTS_64BIT_KERNEL | |
1865 | select CPU_SUPPORTS_HIGHMEM | |
970d032f | 1866 | select CPU_SUPPORTS_HUGEPAGES |
e905086e | 1867 | select ARCH_HAS_PHYS_TO_DMA |
932afdee | 1868 | select CPU_HAS_LOAD_STORE_LR |
3702bba5 | 1869 | |
ca585cf9 KC |
1870 | config CPU_LOONGSON1 |
1871 | bool | |
1872 | select CPU_MIPS32 | |
7e280f6b | 1873 | select CPU_MIPSR2 |
ca585cf9 | 1874 | select CPU_HAS_PREFETCH |
932afdee | 1875 | select CPU_HAS_LOAD_STORE_LR |
ca585cf9 KC |
1876 | select CPU_SUPPORTS_32BIT_KERNEL |
1877 | select CPU_SUPPORTS_HIGHMEM | |
f29ad10d | 1878 | select CPU_SUPPORTS_CPUFREQ |
ca585cf9 | 1879 | |
fe7f62c0 | 1880 | config CPU_BMIPS32_3300 |
04fa8bf7 | 1881 | select SMP_UP if SMP |
1bbb6c1b | 1882 | bool |
cd746249 JG |
1883 | |
1884 | config CPU_BMIPS4350 | |
1885 | bool | |
1886 | select SYS_SUPPORTS_SMP | |
1887 | select SYS_SUPPORTS_HOTPLUG_CPU | |
1888 | ||
1889 | config CPU_BMIPS4380 | |
1890 | bool | |
bbf2ba67 | 1891 | select MIPS_L1_CACHE_SHIFT_6 |
cd746249 JG |
1892 | select SYS_SUPPORTS_SMP |
1893 | select SYS_SUPPORTS_HOTPLUG_CPU | |
b4720809 | 1894 | select CPU_HAS_RIXI |
cd746249 JG |
1895 | |
1896 | config CPU_BMIPS5000 | |
1897 | bool | |
cd746249 | 1898 | select MIPS_CPU_SCACHE |
bbf2ba67 | 1899 | select MIPS_L1_CACHE_SHIFT_7 |
cd746249 JG |
1900 | select SYS_SUPPORTS_SMP |
1901 | select SYS_SUPPORTS_HOTPLUG_CPU | |
b4720809 | 1902 | select CPU_HAS_RIXI |
1bbb6c1b | 1903 | |
0e476d91 HC |
1904 | config SYS_HAS_CPU_LOONGSON3 |
1905 | bool | |
1906 | select CPU_SUPPORTS_CPUFREQ | |
b2edcfc8 | 1907 | select CPU_HAS_RIXI |
0e476d91 | 1908 | |
3702bba5 | 1909 | config SYS_HAS_CPU_LOONGSON2E |
2a21c730 FZ |
1910 | bool |
1911 | ||
6f7a251a WZ |
1912 | config SYS_HAS_CPU_LOONGSON2F |
1913 | bool | |
55045ff5 WZ |
1914 | select CPU_SUPPORTS_CPUFREQ |
1915 | select CPU_SUPPORTS_ADDRWINCFG if 64BIT | |
22f1fdfd | 1916 | select CPU_SUPPORTS_UNCACHED_ACCELERATED |
6f7a251a | 1917 | |
ca585cf9 KC |
1918 | config SYS_HAS_CPU_LOONGSON1B |
1919 | bool | |
1920 | ||
12e3280b YL |
1921 | config SYS_HAS_CPU_LOONGSON1C |
1922 | bool | |
1923 | ||
7cf8053b RB |
1924 | config SYS_HAS_CPU_MIPS32_R1 |
1925 | bool | |
1926 | ||
1927 | config SYS_HAS_CPU_MIPS32_R2 | |
1928 | bool | |
1929 | ||
a6e18781 LY |
1930 | config SYS_HAS_CPU_MIPS32_R3_5 |
1931 | bool | |
1932 | ||
c5b36783 SH |
1933 | config SYS_HAS_CPU_MIPS32_R5 |
1934 | bool | |
9ae1f262 | 1935 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
c5b36783 | 1936 | |
7fd08ca5 LY |
1937 | config SYS_HAS_CPU_MIPS32_R6 |
1938 | bool | |
9ae1f262 | 1939 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
7fd08ca5 | 1940 | |
7cf8053b RB |
1941 | config SYS_HAS_CPU_MIPS64_R1 |
1942 | bool | |
1943 | ||
1944 | config SYS_HAS_CPU_MIPS64_R2 | |
1945 | bool | |
1946 | ||
7fd08ca5 LY |
1947 | config SYS_HAS_CPU_MIPS64_R6 |
1948 | bool | |
9ae1f262 | 1949 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
7fd08ca5 | 1950 | |
7cf8053b RB |
1951 | config SYS_HAS_CPU_R3000 |
1952 | bool | |
1953 | ||
1954 | config SYS_HAS_CPU_TX39XX | |
1955 | bool | |
1956 | ||
1957 | config SYS_HAS_CPU_VR41XX | |
1958 | bool | |
1959 | ||
7cf8053b RB |
1960 | config SYS_HAS_CPU_R4X00 |
1961 | bool | |
1962 | ||
1963 | config SYS_HAS_CPU_TX49XX | |
1964 | bool | |
1965 | ||
1966 | config SYS_HAS_CPU_R5000 | |
1967 | bool | |
1968 | ||
542c1020 SK |
1969 | config SYS_HAS_CPU_R5500 |
1970 | bool | |
1971 | ||
7cf8053b RB |
1972 | config SYS_HAS_CPU_NEVADA |
1973 | bool | |
1974 | ||
7cf8053b RB |
1975 | config SYS_HAS_CPU_R10000 |
1976 | bool | |
9ae1f262 | 1977 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
7cf8053b RB |
1978 | |
1979 | config SYS_HAS_CPU_RM7000 | |
1980 | bool | |
1981 | ||
7cf8053b RB |
1982 | config SYS_HAS_CPU_SB1 |
1983 | bool | |
1984 | ||
5e683389 DD |
1985 | config SYS_HAS_CPU_CAVIUM_OCTEON |
1986 | bool | |
1987 | ||
cd746249 | 1988 | config SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
1989 | bool |
1990 | ||
fe7f62c0 | 1991 | config SYS_HAS_CPU_BMIPS32_3300 |
c1c0c461 | 1992 | bool |
cd746249 | 1993 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
1994 | |
1995 | config SYS_HAS_CPU_BMIPS4350 | |
1996 | bool | |
cd746249 | 1997 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
1998 | |
1999 | config SYS_HAS_CPU_BMIPS4380 | |
2000 | bool | |
cd746249 | 2001 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
2002 | |
2003 | config SYS_HAS_CPU_BMIPS5000 | |
2004 | bool | |
cd746249 | 2005 | select SYS_HAS_CPU_BMIPS |
f263f2a2 | 2006 | select ARCH_HAS_SYNC_DMA_FOR_CPU |
c1c0c461 | 2007 | |
7f058e85 J |
2008 | config SYS_HAS_CPU_XLR |
2009 | bool | |
2010 | ||
1c773ea4 J |
2011 | config SYS_HAS_CPU_XLP |
2012 | bool | |
2013 | ||
17099b11 RB |
2014 | # |
2015 | # CPU may reorder R->R, R->W, W->R, W->W | |
2016 | # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC | |
2017 | # | |
0004a9df RB |
2018 | config WEAK_ORDERING |
2019 | bool | |
17099b11 RB |
2020 | |
2021 | # | |
2022 | # CPU may reorder reads and writes beyond LL/SC | |
2023 | # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC | |
2024 | # | |
2025 | config WEAK_REORDERING_BEYOND_LLSC | |
2026 | bool | |
5e83d430 RB |
2027 | endmenu |
2028 | ||
2029 | # | |
c09b47d8 | 2030 | # These two indicate any level of the MIPS32 and MIPS64 architecture |
5e83d430 RB |
2031 | # |
2032 | config CPU_MIPS32 | |
2033 | bool | |
7fd08ca5 | 2034 | default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 |
5e83d430 RB |
2035 | |
2036 | config CPU_MIPS64 | |
2037 | bool | |
7fd08ca5 | 2038 | default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 |
5e83d430 RB |
2039 | |
2040 | # | |
57eeaced | 2041 | # These indicate the revision of the architecture |
5e83d430 RB |
2042 | # |
2043 | config CPU_MIPSR1 | |
2044 | bool | |
2045 | default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 | |
2046 | ||
2047 | config CPU_MIPSR2 | |
2048 | bool | |
a86c7f72 | 2049 | default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON |
8256b17e | 2050 | select CPU_HAS_RIXI |
a7e07b1a | 2051 | select MIPS_SPRAM |
5e83d430 | 2052 | |
7fd08ca5 LY |
2053 | config CPU_MIPSR6 |
2054 | bool | |
2055 | default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 | |
8256b17e | 2056 | select CPU_HAS_RIXI |
87321fdd | 2057 | select HAVE_ARCH_BITREVERSE |
2db003a5 | 2058 | select MIPS_ASID_BITS_VARIABLE |
4a5dc51e | 2059 | select MIPS_CRC_SUPPORT |
a7e07b1a | 2060 | select MIPS_SPRAM |
5e83d430 | 2061 | |
57eeaced PB |
2062 | config TARGET_ISA_REV |
2063 | int | |
2064 | default 1 if CPU_MIPSR1 | |
2065 | default 2 if CPU_MIPSR2 | |
2066 | default 6 if CPU_MIPSR6 | |
2067 | default 0 | |
2068 | help | |
2069 | Reflects the ISA revision being targeted by the kernel build. This | |
2070 | is effectively the Kconfig equivalent of MIPS_ISA_REV. | |
2071 | ||
a6e18781 LY |
2072 | config EVA |
2073 | bool | |
2074 | ||
c5b36783 SH |
2075 | config XPA |
2076 | bool | |
2077 | ||
5e83d430 RB |
2078 | config SYS_SUPPORTS_32BIT_KERNEL |
2079 | bool | |
2080 | config SYS_SUPPORTS_64BIT_KERNEL | |
2081 | bool | |
2082 | config CPU_SUPPORTS_32BIT_KERNEL | |
2083 | bool | |
2084 | config CPU_SUPPORTS_64BIT_KERNEL | |
2085 | bool | |
55045ff5 WZ |
2086 | config CPU_SUPPORTS_CPUFREQ |
2087 | bool | |
2088 | config CPU_SUPPORTS_ADDRWINCFG | |
2089 | bool | |
9cffd154 DD |
2090 | config CPU_SUPPORTS_HUGEPAGES |
2091 | bool | |
171543e7 | 2092 | depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA)) |
22f1fdfd WZ |
2093 | config CPU_SUPPORTS_UNCACHED_ACCELERATED |
2094 | bool | |
82622284 DD |
2095 | config MIPS_PGD_C0_CONTEXT |
2096 | bool | |
cebf8c0f | 2097 | default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP |
5e83d430 | 2098 | |
8192c9ea DD |
2099 | # |
2100 | # Set to y for ptrace access to watch registers. | |
2101 | # | |
2102 | config HARDWARE_WATCHPOINTS | |
371a4151 EWI |
2103 | bool |
2104 | default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 | |
8192c9ea | 2105 | |
5e83d430 RB |
2106 | menu "Kernel type" |
2107 | ||
2108 | choice | |
5e83d430 RB |
2109 | prompt "Kernel code model" |
2110 | help | |
2111 | You should only select this option if you have a workload that | |
2112 | actually benefits from 64-bit processing or if your machine has | |
2113 | large memory. You will only be presented a single option in this | |
2114 | menu if your system does not support both 32-bit and 64-bit kernels. | |
2115 | ||
2116 | config 32BIT | |
2117 | bool "32-bit kernel" | |
2118 | depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL | |
2119 | select TRAD_SIGNALS | |
2120 | help | |
2121 | Select this option if you want to build a 32-bit kernel. | |
f17c4ca3 | 2122 | |
5e83d430 RB |
2123 | config 64BIT |
2124 | bool "64-bit kernel" | |
2125 | depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL | |
2126 | help | |
2127 | Select this option if you want to build a 64-bit kernel. | |
2128 | ||
2129 | endchoice | |
2130 | ||
2235a54d SL |
2131 | config KVM_GUEST |
2132 | bool "KVM Guest Kernel" | |
f2a5b1d7 | 2133 | depends on BROKEN_ON_SMP |
2235a54d | 2134 | help |
caa1faa7 JH |
2135 | Select this option if building a guest kernel for KVM (Trap & Emulate) |
2136 | mode. | |
2235a54d | 2137 | |
eda3d33c JH |
2138 | config KVM_GUEST_TIMER_FREQ |
2139 | int "Count/Compare Timer Frequency (MHz)" | |
2235a54d | 2140 | depends on KVM_GUEST |
eda3d33c | 2141 | default 100 |
2235a54d | 2142 | help |
eda3d33c JH |
2143 | Set this to non-zero if building a guest kernel for KVM to skip RTC |
2144 | emulation when determining guest CPU Frequency. Instead, the guest's | |
2145 | timer frequency is specified directly. | |
2235a54d | 2146 | |
1e321fa9 LY |
2147 | config MIPS_VA_BITS_48 |
2148 | bool "48 bits virtual memory" | |
2149 | depends on 64BIT | |
2150 | help | |
3377e227 AB |
2151 | Support a maximum at least 48 bits of application virtual |
2152 | memory. Default is 40 bits or less, depending on the CPU. | |
2153 | For page sizes 16k and above, this option results in a small | |
2154 | memory overhead for page tables. For 4k page size, a fourth | |
2155 | level of page tables is added which imposes both a memory | |
2156 | overhead as well as slower TLB fault handling. | |
2157 | ||
1e321fa9 LY |
2158 | If unsure, say N. |
2159 | ||
1da177e4 LT |
2160 | choice |
2161 | prompt "Kernel page size" | |
2162 | default PAGE_SIZE_4KB | |
2163 | ||
2164 | config PAGE_SIZE_4KB | |
2165 | bool "4kB" | |
0e476d91 | 2166 | depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 |
1da177e4 | 2167 | help |
371a4151 EWI |
2168 | This option select the standard 4kB Linux page size. On some |
2169 | R3000-family processors this is the only available page size. Using | |
2170 | 4kB page size will minimize memory consumption and is therefore | |
2171 | recommended for low memory systems. | |
1da177e4 LT |
2172 | |
2173 | config PAGE_SIZE_8KB | |
2174 | bool "8kB" | |
c2aeaaea | 2175 | depends on CPU_CAVIUM_OCTEON |
1e321fa9 | 2176 | depends on !MIPS_VA_BITS_48 |
1da177e4 LT |
2177 | help |
2178 | Using 8kB page size will result in higher performance kernel at | |
2179 | the price of higher memory consumption. This option is available | |
c2aeaaea PB |
2180 | only on cnMIPS processors. Note that you will need a suitable Linux |
2181 | distribution to support this. | |
1da177e4 LT |
2182 | |
2183 | config PAGE_SIZE_16KB | |
2184 | bool "16kB" | |
714bfad6 | 2185 | depends on !CPU_R3000 && !CPU_TX39XX |
1da177e4 LT |
2186 | help |
2187 | Using 16kB page size will result in higher performance kernel at | |
2188 | the price of higher memory consumption. This option is available on | |
714bfad6 RB |
2189 | all non-R3000 family processors. Note that you will need a suitable |
2190 | Linux distribution to support this. | |
1da177e4 | 2191 | |
c52399be RB |
2192 | config PAGE_SIZE_32KB |
2193 | bool "32kB" | |
2194 | depends on CPU_CAVIUM_OCTEON | |
1e321fa9 | 2195 | depends on !MIPS_VA_BITS_48 |
c52399be RB |
2196 | help |
2197 | Using 32kB page size will result in higher performance kernel at | |
2198 | the price of higher memory consumption. This option is available | |
2199 | only on cnMIPS cores. Note that you will need a suitable Linux | |
2200 | distribution to support this. | |
2201 | ||
1da177e4 LT |
2202 | config PAGE_SIZE_64KB |
2203 | bool "64kB" | |
3b2db173 | 2204 | depends on !CPU_R3000 && !CPU_TX39XX |
1da177e4 LT |
2205 | help |
2206 | Using 64kB page size will result in higher performance kernel at | |
2207 | the price of higher memory consumption. This option is available on | |
2208 | all non-R3000 family processor. Not that at the time of this | |
714bfad6 | 2209 | writing this option is still high experimental. |
1da177e4 LT |
2210 | |
2211 | endchoice | |
2212 | ||
c9bace7c DD |
2213 | config FORCE_MAX_ZONEORDER |
2214 | int "Maximum zone order" | |
e4362d1e AS |
2215 | range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB |
2216 | default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB | |
2217 | range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB | |
2218 | default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB | |
2219 | range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB | |
2220 | default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB | |
c9bace7c DD |
2221 | range 11 64 |
2222 | default "11" | |
2223 | help | |
2224 | The kernel memory allocator divides physically contiguous memory | |
2225 | blocks into "zones", where each zone is a power of two number of | |
2226 | pages. This option selects the largest power of two that the kernel | |
2227 | keeps in the memory allocator. If you need to allocate very large | |
2228 | blocks of physically contiguous memory, then you may need to | |
2229 | increase this value. | |
2230 | ||
2231 | This config option is actually maximum order plus one. For example, | |
2232 | a value of 11 means that the largest free memory block is 2^10 pages. | |
2233 | ||
2234 | The page size is not necessarily 4KB. Keep this in mind | |
2235 | when choosing a value for this option. | |
2236 | ||
1da177e4 LT |
2237 | config BOARD_SCACHE |
2238 | bool | |
2239 | ||
2240 | config IP22_CPU_SCACHE | |
2241 | bool | |
2242 | select BOARD_SCACHE | |
2243 | ||
9318c51a CD |
2244 | # |
2245 | # Support for a MIPS32 / MIPS64 style S-caches | |
2246 | # | |
2247 | config MIPS_CPU_SCACHE | |
2248 | bool | |
2249 | select BOARD_SCACHE | |
2250 | ||
1da177e4 LT |
2251 | config R5000_CPU_SCACHE |
2252 | bool | |
2253 | select BOARD_SCACHE | |
2254 | ||
2255 | config RM7000_CPU_SCACHE | |
2256 | bool | |
2257 | select BOARD_SCACHE | |
2258 | ||
2259 | config SIBYTE_DMA_PAGEOPS | |
2260 | bool "Use DMA to clear/copy pages" | |
2261 | depends on CPU_SB1 | |
2262 | help | |
2263 | Instead of using the CPU to zero and copy pages, use a Data Mover | |
2264 | channel. These DMA channels are otherwise unused by the standard | |
2265 | SiByte Linux port. Seems to give a small performance benefit. | |
2266 | ||
2267 | config CPU_HAS_PREFETCH | |
c8094b53 | 2268 | bool |
1da177e4 | 2269 | |
3165c846 FF |
2270 | config CPU_GENERIC_DUMP_TLB |
2271 | bool | |
c2aeaaea | 2272 | default y if !(CPU_R3000 || CPU_TX39XX) |
3165c846 | 2273 | |
c92e47e5 | 2274 | config MIPS_FP_SUPPORT |
183b40f9 PB |
2275 | bool "Floating Point support" if EXPERT |
2276 | default y | |
2277 | help | |
2278 | Select y to include support for floating point in the kernel | |
2279 | including initialization of FPU hardware, FP context save & restore | |
2280 | and emulation of an FPU where necessary. Without this support any | |
2281 | userland program attempting to use floating point instructions will | |
2282 | receive a SIGILL. | |
2283 | ||
2284 | If you know that your userland will not attempt to use floating point | |
2285 | instructions then you can say n here to shrink the kernel a little. | |
2286 | ||
2287 | If unsure, say y. | |
c92e47e5 | 2288 | |
97f7dcbf PB |
2289 | config CPU_R2300_FPU |
2290 | bool | |
c92e47e5 | 2291 | depends on MIPS_FP_SUPPORT |
97f7dcbf PB |
2292 | default y if CPU_R3000 || CPU_TX39XX |
2293 | ||
54746829 PB |
2294 | config CPU_R3K_TLB |
2295 | bool | |
2296 | ||
91405eb6 FF |
2297 | config CPU_R4K_FPU |
2298 | bool | |
c92e47e5 | 2299 | depends on MIPS_FP_SUPPORT |
97f7dcbf | 2300 | default y if !CPU_R2300_FPU |
91405eb6 | 2301 | |
62cedc4f FF |
2302 | config CPU_R4K_CACHE_TLB |
2303 | bool | |
54746829 | 2304 | default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON) |
62cedc4f | 2305 | |
59d6ab86 | 2306 | config MIPS_MT_SMP |
a92b7f87 | 2307 | bool "MIPS MT SMP support (1 TC on each available VPE)" |
5cbf9688 | 2308 | default y |
527f1028 | 2309 | depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS |
f7062ddb | 2310 | select CPU_MIPSR2_IRQ_VI |
d725cf38 | 2311 | select CPU_MIPSR2_IRQ_EI |
c080faa5 | 2312 | select SYNC_R4K |
f41ae0b2 | 2313 | select MIPS_MT |
41c594ab | 2314 | select SMP |
87353d8a | 2315 | select SMP_UP |
c080faa5 SH |
2316 | select SYS_SUPPORTS_SMP |
2317 | select SYS_SUPPORTS_SCHED_SMT | |
399aaa25 | 2318 | select MIPS_PERF_SHARED_TC_COUNTERS |
f41ae0b2 | 2319 | help |
c080faa5 SH |
2320 | This is a kernel model which is known as SMVP. This is supported |
2321 | on cores with the MT ASE and uses the available VPEs to implement | |
2322 | virtual processors which supports SMP. This is equivalent to the | |
2323 | Intel Hyperthreading feature. For further information go to | |
2324 | <http://www.imgtec.com/mips/mips-multithreading.asp>. | |
41c594ab | 2325 | |
f41ae0b2 RB |
2326 | config MIPS_MT |
2327 | bool | |
2328 | ||
0ab7aefc RB |
2329 | config SCHED_SMT |
2330 | bool "SMT (multithreading) scheduler support" | |
2331 | depends on SYS_SUPPORTS_SCHED_SMT | |
2332 | default n | |
2333 | help | |
2334 | SMT scheduler support improves the CPU scheduler's decision making | |
2335 | when dealing with MIPS MT enabled cores at a cost of slightly | |
2336 | increased overhead in some places. If unsure say N here. | |
2337 | ||
2338 | config SYS_SUPPORTS_SCHED_SMT | |
2339 | bool | |
2340 | ||
f41ae0b2 RB |
2341 | config SYS_SUPPORTS_MULTITHREADING |
2342 | bool | |
2343 | ||
f088fc84 RB |
2344 | config MIPS_MT_FPAFF |
2345 | bool "Dynamic FPU affinity for FP-intensive threads" | |
f088fc84 | 2346 | default y |
b633648c | 2347 | depends on MIPS_MT_SMP |
07cc0c9e | 2348 | |
b0a668fb LY |
2349 | config MIPSR2_TO_R6_EMULATOR |
2350 | bool "MIPS R2-to-R6 emulator" | |
9eaa9a82 | 2351 | depends on CPU_MIPSR6 |
c92e47e5 | 2352 | depends on MIPS_FP_SUPPORT |
b0a668fb LY |
2353 | default y |
2354 | help | |
2355 | Choose this option if you want to run non-R6 MIPS userland code. | |
2356 | Even if you say 'Y' here, the emulator will still be disabled by | |
07edf0d4 | 2357 | default. You can enable it using the 'mipsr2emu' kernel option. |
b0a668fb LY |
2358 | The only reason this is a build-time option is to save ~14K from the |
2359 | final kernel image. | |
b0a668fb | 2360 | |
f35764e7 JH |
2361 | config SYS_SUPPORTS_VPE_LOADER |
2362 | bool | |
2363 | depends on SYS_SUPPORTS_MULTITHREADING | |
2364 | help | |
2365 | Indicates that the platform supports the VPE loader, and provides | |
2366 | physical_memsize. | |
2367 | ||
07cc0c9e RB |
2368 | config MIPS_VPE_LOADER |
2369 | bool "VPE loader support." | |
f35764e7 | 2370 | depends on SYS_SUPPORTS_VPE_LOADER && MODULES |
07cc0c9e RB |
2371 | select CPU_MIPSR2_IRQ_VI |
2372 | select CPU_MIPSR2_IRQ_EI | |
07cc0c9e RB |
2373 | select MIPS_MT |
2374 | help | |
2375 | Includes a loader for loading an elf relocatable object | |
2376 | onto another VPE and running it. | |
f088fc84 | 2377 | |
17a1d523 DZ |
2378 | config MIPS_VPE_LOADER_CMP |
2379 | bool | |
2380 | default "y" | |
2381 | depends on MIPS_VPE_LOADER && MIPS_CMP | |
2382 | ||
1a2a6d7e DZ |
2383 | config MIPS_VPE_LOADER_MT |
2384 | bool | |
2385 | default "y" | |
2386 | depends on MIPS_VPE_LOADER && !MIPS_CMP | |
2387 | ||
e01402b1 RB |
2388 | config MIPS_VPE_LOADER_TOM |
2389 | bool "Load VPE program into memory hidden from linux" | |
2390 | depends on MIPS_VPE_LOADER | |
2391 | default y | |
2392 | help | |
2393 | The loader can use memory that is present but has been hidden from | |
2394 | Linux using the kernel command line option "mem=xxMB". It's up to | |
2395 | you to ensure the amount you put in the option and the space your | |
2396 | program requires is less or equal to the amount physically present. | |
2397 | ||
e01402b1 | 2398 | config MIPS_VPE_APSP_API |
5e83d430 RB |
2399 | bool "Enable support for AP/SP API (RTLX)" |
2400 | depends on MIPS_VPE_LOADER | |
e01402b1 | 2401 | |
da615cf6 DZ |
2402 | config MIPS_VPE_APSP_API_CMP |
2403 | bool | |
2404 | default "y" | |
2405 | depends on MIPS_VPE_APSP_API && MIPS_CMP | |
2406 | ||
2c973ef0 DZ |
2407 | config MIPS_VPE_APSP_API_MT |
2408 | bool | |
2409 | default "y" | |
2410 | depends on MIPS_VPE_APSP_API && !MIPS_CMP | |
2411 | ||
4a16ff4c | 2412 | config MIPS_CMP |
5cac93b3 | 2413 | bool "MIPS CMP framework support (DEPRECATED)" |
5676319c | 2414 | depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 |
b10b43ba | 2415 | select SMP |
eb9b5141 | 2416 | select SYNC_R4K |
b10b43ba | 2417 | select SYS_SUPPORTS_SMP |
4a16ff4c RB |
2418 | select WEAK_ORDERING |
2419 | default n | |
2420 | help | |
044505c7 PB |
2421 | Select this if you are using a bootloader which implements the "CMP |
2422 | framework" protocol (ie. YAMON) and want your kernel to make use of | |
2423 | its ability to start secondary CPUs. | |
4a16ff4c | 2424 | |
5cac93b3 PB |
2425 | Unless you have a specific need, you should use CONFIG_MIPS_CPS |
2426 | instead of this. | |
2427 | ||
0ee958e1 PB |
2428 | config MIPS_CPS |
2429 | bool "MIPS Coherent Processing System support" | |
5a3e7c02 | 2430 | depends on SYS_SUPPORTS_MIPS_CPS |
0ee958e1 | 2431 | select MIPS_CM |
1d8f1f5a | 2432 | select MIPS_CPS_PM if HOTPLUG_CPU |
0ee958e1 PB |
2433 | select SMP |
2434 | select SYNC_R4K if (CEVT_R4K || CSRC_R4K) | |
1d8f1f5a | 2435 | select SYS_SUPPORTS_HOTPLUG_CPU |
c8b7712c | 2436 | select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 |
0ee958e1 PB |
2437 | select SYS_SUPPORTS_SMP |
2438 | select WEAK_ORDERING | |
2439 | help | |
2440 | Select this if you wish to run an SMP kernel across multiple cores | |
2441 | within a MIPS Coherent Processing System. When this option is | |
2442 | enabled the kernel will probe for other cores and boot them with | |
2443 | no external assistance. It is safe to enable this when hardware | |
2444 | support is unavailable. | |
2445 | ||
3179d37e | 2446 | config MIPS_CPS_PM |
39a59593 | 2447 | depends on MIPS_CPS |
3179d37e PB |
2448 | bool |
2449 | ||
9f98f3dd PB |
2450 | config MIPS_CM |
2451 | bool | |
3c9b4166 | 2452 | select MIPS_CPC |
9f98f3dd | 2453 | |
9c38cf44 PB |
2454 | config MIPS_CPC |
2455 | bool | |
4a16ff4c | 2456 | |
1da177e4 LT |
2457 | config SB1_PASS_2_WORKAROUNDS |
2458 | bool | |
2459 | depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) | |
2460 | default y | |
2461 | ||
2462 | config SB1_PASS_2_1_WORKAROUNDS | |
2463 | bool | |
2464 | depends on CPU_SB1 && CPU_SB1_PASS_2 | |
2465 | default y | |
2466 | ||
9e2b5372 MC |
2467 | choice |
2468 | prompt "SmartMIPS or microMIPS ASE support" | |
2469 | ||
2470 | config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS | |
2471 | bool "None" | |
2472 | help | |
2473 | Select this if you want neither microMIPS nor SmartMIPS support | |
2474 | ||
9693a853 FBH |
2475 | config CPU_HAS_SMARTMIPS |
2476 | depends on SYS_SUPPORTS_SMARTMIPS | |
9e2b5372 | 2477 | bool "SmartMIPS" |
9693a853 FBH |
2478 | help |
2479 | SmartMIPS is a extension of the MIPS32 architecture aimed at | |
2480 | increased security at both hardware and software level for | |
2481 | smartcards. Enabling this option will allow proper use of the | |
2482 | SmartMIPS instructions by Linux applications. However a kernel with | |
2483 | this option will not work on a MIPS core without SmartMIPS core. If | |
2484 | you don't know you probably don't have SmartMIPS and should say N | |
2485 | here. | |
2486 | ||
bce86083 | 2487 | config CPU_MICROMIPS |
7fd08ca5 | 2488 | depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 |
9e2b5372 | 2489 | bool "microMIPS" |
bce86083 SH |
2490 | help |
2491 | When this option is enabled the kernel will be built using the | |
2492 | microMIPS ISA | |
2493 | ||
9e2b5372 MC |
2494 | endchoice |
2495 | ||
a5e9a69e | 2496 | config CPU_HAS_MSA |
0ce3417e | 2497 | bool "Support for the MIPS SIMD Architecture" |
a5e9a69e | 2498 | depends on CPU_SUPPORTS_MSA |
c92e47e5 | 2499 | depends on MIPS_FP_SUPPORT |
2a6cb669 | 2500 | depends on 64BIT || MIPS_O32_FP64_SUPPORT |
a5e9a69e PB |
2501 | help |
2502 | MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers | |
2503 | and a set of SIMD instructions to operate on them. When this option | |
1db1af84 PB |
2504 | is enabled the kernel will support allocating & switching MSA |
2505 | vector register contexts. If you know that your kernel will only be | |
2506 | running on CPUs which do not support MSA or that your userland will | |
2507 | not be making use of it then you may wish to say N here to reduce | |
2508 | the size & complexity of your kernel. | |
a5e9a69e PB |
2509 | |
2510 | If unsure, say Y. | |
2511 | ||
1da177e4 | 2512 | config CPU_HAS_WB |
f7062ddb | 2513 | bool |
e01402b1 | 2514 | |
df0ac8a4 KC |
2515 | config XKS01 |
2516 | bool | |
2517 | ||
8256b17e FF |
2518 | config CPU_HAS_RIXI |
2519 | bool | |
2520 | ||
932afdee YC |
2521 | config CPU_HAS_LOAD_STORE_LR |
2522 | bool | |
2523 | help | |
2524 | CPU has support for unaligned load and store instructions: | |
2525 | LWL, LWR, SWL, SWR (Load/store word left/right). | |
2526 | LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit systems). | |
2527 | ||
f41ae0b2 RB |
2528 | # |
2529 | # Vectored interrupt mode is an R2 feature | |
2530 | # | |
e01402b1 | 2531 | config CPU_MIPSR2_IRQ_VI |
f41ae0b2 | 2532 | bool |
e01402b1 | 2533 | |
f41ae0b2 RB |
2534 | # |
2535 | # Extended interrupt mode is an R2 feature | |
2536 | # | |
e01402b1 | 2537 | config CPU_MIPSR2_IRQ_EI |
f41ae0b2 | 2538 | bool |
e01402b1 | 2539 | |
1da177e4 LT |
2540 | config CPU_HAS_SYNC |
2541 | bool | |
2542 | depends on !CPU_R3000 | |
2543 | default y | |
2544 | ||
20d60d99 MR |
2545 | # |
2546 | # CPU non-features | |
2547 | # | |
2548 | config CPU_DADDI_WORKAROUNDS | |
2549 | bool | |
2550 | ||
2551 | config CPU_R4000_WORKAROUNDS | |
2552 | bool | |
2553 | select CPU_R4400_WORKAROUNDS | |
2554 | ||
2555 | config CPU_R4400_WORKAROUNDS | |
2556 | bool | |
2557 | ||
4edf00a4 PB |
2558 | config MIPS_ASID_SHIFT |
2559 | int | |
2560 | default 6 if CPU_R3000 || CPU_TX39XX | |
4edf00a4 PB |
2561 | default 0 |
2562 | ||
2563 | config MIPS_ASID_BITS | |
2564 | int | |
2db003a5 | 2565 | default 0 if MIPS_ASID_BITS_VARIABLE |
4edf00a4 PB |
2566 | default 6 if CPU_R3000 || CPU_TX39XX |
2567 | default 8 | |
2568 | ||
2db003a5 PB |
2569 | config MIPS_ASID_BITS_VARIABLE |
2570 | bool | |
2571 | ||
4a5dc51e MN |
2572 | config MIPS_CRC_SUPPORT |
2573 | bool | |
2574 | ||
1da177e4 LT |
2575 | # |
2576 | # - Highmem only makes sense for the 32-bit kernel. | |
2577 | # - The current highmem code will only work properly on physically indexed | |
2578 | # caches such as R3000, SB1, R7000 or those that look like they're virtually | |
2579 | # indexed such as R4000/R4400 SC and MC versions or R10000. So for the | |
2580 | # moment we protect the user and offer the highmem option only on machines | |
2581 | # where it's known to be safe. This will not offer highmem on a few systems | |
2582 | # such as MIPS32 and MIPS64 CPUs which may have virtual and physically | |
2583 | # indexed CPUs but we're playing safe. | |
797798c1 RB |
2584 | # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we |
2585 | # know they might have memory configurations that could make use of highmem | |
2586 | # support. | |
1da177e4 LT |
2587 | # |
2588 | config HIGHMEM | |
2589 | bool "High Memory Support" | |
a6e18781 | 2590 | depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA |
797798c1 RB |
2591 | |
2592 | config CPU_SUPPORTS_HIGHMEM | |
2593 | bool | |
2594 | ||
2595 | config SYS_SUPPORTS_HIGHMEM | |
2596 | bool | |
1da177e4 | 2597 | |
9693a853 FBH |
2598 | config SYS_SUPPORTS_SMARTMIPS |
2599 | bool | |
2600 | ||
a6a4834c SH |
2601 | config SYS_SUPPORTS_MICROMIPS |
2602 | bool | |
2603 | ||
377cb1b6 RB |
2604 | config SYS_SUPPORTS_MIPS16 |
2605 | bool | |
2606 | help | |
2607 | This option must be set if a kernel might be executed on a MIPS16- | |
2608 | enabled CPU even if MIPS16 is not actually being used. In other | |
2609 | words, it makes the kernel MIPS16-tolerant. | |
2610 | ||
a5e9a69e PB |
2611 | config CPU_SUPPORTS_MSA |
2612 | bool | |
2613 | ||
b4819b59 YY |
2614 | config ARCH_FLATMEM_ENABLE |
2615 | def_bool y | |
f133f22d | 2616 | depends on !NUMA && !CPU_LOONGSON2 |
b4819b59 | 2617 | |
d8cb4e11 RB |
2618 | config ARCH_DISCONTIGMEM_ENABLE |
2619 | bool | |
2620 | default y if SGI_IP27 | |
2621 | help | |
3dde6ad8 | 2622 | Say Y to support efficient handling of discontiguous physical memory, |
d8cb4e11 RB |
2623 | for architectures which are either NUMA (Non-Uniform Memory Access) |
2624 | or have huge holes in the physical address space for other reasons. | |
ad56b738 | 2625 | See <file:Documentation/vm/numa.rst> for more. |
d8cb4e11 | 2626 | |
31473747 AN |
2627 | config ARCH_SPARSEMEM_ENABLE |
2628 | bool | |
7de58fab | 2629 | select SPARSEMEM_STATIC |
31473747 | 2630 | |
d8cb4e11 RB |
2631 | config NUMA |
2632 | bool "NUMA Support" | |
2633 | depends on SYS_SUPPORTS_NUMA | |
2634 | help | |
2635 | Say Y to compile the kernel to support NUMA (Non-Uniform Memory | |
2636 | Access). This option improves performance on systems with more | |
2637 | than two nodes; on two node systems it is generally better to | |
2638 | leave it disabled; on single node systems disable this option | |
2639 | disabled. | |
2640 | ||
2641 | config SYS_SUPPORTS_NUMA | |
2642 | bool | |
2643 | ||
8c530ea3 MR |
2644 | config RELOCATABLE |
2645 | bool "Relocatable kernel" | |
3ff72be4 | 2646 | depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC) |
8c530ea3 MR |
2647 | help |
2648 | This builds a kernel image that retains relocation information | |
2649 | so it can be loaded someplace besides the default 1MB. | |
2650 | The relocations make the kernel binary about 15% larger, | |
2651 | but are discarded at runtime | |
2652 | ||
069fd766 MR |
2653 | config RELOCATION_TABLE_SIZE |
2654 | hex "Relocation table size" | |
2655 | depends on RELOCATABLE | |
2656 | range 0x0 0x01000000 | |
2657 | default "0x00100000" | |
2658 | ---help--- | |
2659 | A table of relocation data will be appended to the kernel binary | |
2660 | and parsed at boot to fix up the relocated kernel. | |
2661 | ||
2662 | This option allows the amount of space reserved for the table to be | |
2663 | adjusted, although the default of 1Mb should be ok in most cases. | |
2664 | ||
2665 | The build will fail and a valid size suggested if this is too small. | |
2666 | ||
2667 | If unsure, leave at the default value. | |
2668 | ||
405bc8fd MR |
2669 | config RANDOMIZE_BASE |
2670 | bool "Randomize the address of the kernel image" | |
2671 | depends on RELOCATABLE | |
2672 | ---help--- | |
371a4151 EWI |
2673 | Randomizes the physical and virtual address at which the |
2674 | kernel image is loaded, as a security feature that | |
2675 | deters exploit attempts relying on knowledge of the location | |
2676 | of kernel internals. | |
405bc8fd | 2677 | |
371a4151 | 2678 | Entropy is generated using any coprocessor 0 registers available. |
405bc8fd | 2679 | |
371a4151 | 2680 | The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. |
405bc8fd | 2681 | |
371a4151 | 2682 | If unsure, say N. |
405bc8fd MR |
2683 | |
2684 | config RANDOMIZE_BASE_MAX_OFFSET | |
2685 | hex "Maximum kASLR offset" if EXPERT | |
2686 | depends on RANDOMIZE_BASE | |
2687 | range 0x0 0x40000000 if EVA || 64BIT | |
2688 | range 0x0 0x08000000 | |
2689 | default "0x01000000" | |
2690 | ---help--- | |
2691 | When kASLR is active, this provides the maximum offset that will | |
2692 | be applied to the kernel image. It should be set according to the | |
2693 | amount of physical RAM available in the target system minus | |
2694 | PHYSICAL_START and must be a power of 2. | |
2695 | ||
2696 | This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with | |
2697 | EVA or 64-bit. The default is 16Mb. | |
2698 | ||
c80d79d7 YG |
2699 | config NODES_SHIFT |
2700 | int | |
2701 | default "6" | |
2702 | depends on NEED_MULTIPLE_NODES | |
2703 | ||
14f70012 DZ |
2704 | config HW_PERF_EVENTS |
2705 | bool "Enable hardware performance counter support for perf events" | |
23021b2b | 2706 | depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) |
14f70012 DZ |
2707 | default y |
2708 | help | |
2709 | Enable hardware performance counter support for perf events. If | |
2710 | disabled, perf events will use software events only. | |
2711 | ||
1da177e4 LT |
2712 | config SMP |
2713 | bool "Multi-Processing support" | |
e73ea273 RB |
2714 | depends on SYS_SUPPORTS_SMP |
2715 | help | |
1da177e4 | 2716 | This enables support for systems with more than one CPU. If you have |
4a474157 RG |
2717 | a system with only one CPU, say N. If you have a system with more |
2718 | than one CPU, say Y. | |
1da177e4 | 2719 | |
4a474157 | 2720 | If you say N here, the kernel will run on uni- and multiprocessor |
1da177e4 LT |
2721 | machines, but will use only one CPU of a multiprocessor machine. If |
2722 | you say Y here, the kernel will run on many, but not all, | |
4a474157 | 2723 | uniprocessor machines. On a uniprocessor machine, the kernel |
1da177e4 LT |
2724 | will run faster if you say N here. |
2725 | ||
2726 | People using multiprocessor machines who say Y here should also say | |
2727 | Y to "Enhanced Real Time Clock Support", below. | |
2728 | ||
03502faa AB |
2729 | See also the SMP-HOWTO available at |
2730 | <http://www.tldp.org/docs.html#howto>. | |
1da177e4 LT |
2731 | |
2732 | If you don't know what to do here, say N. | |
2733 | ||
7840d618 MR |
2734 | config HOTPLUG_CPU |
2735 | bool "Support for hot-pluggable CPUs" | |
2736 | depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU | |
2737 | help | |
2738 | Say Y here to allow turning CPUs off and on. CPUs can be | |
2739 | controlled through /sys/devices/system/cpu. | |
2740 | (Note: power management support will enable this option | |
2741 | automatically on SMP systems. ) | |
2742 | Say N if you want to disable CPU hotplug. | |
2743 | ||
87353d8a RB |
2744 | config SMP_UP |
2745 | bool | |
2746 | ||
4a16ff4c RB |
2747 | config SYS_SUPPORTS_MIPS_CMP |
2748 | bool | |
2749 | ||
0ee958e1 PB |
2750 | config SYS_SUPPORTS_MIPS_CPS |
2751 | bool | |
2752 | ||
e73ea273 RB |
2753 | config SYS_SUPPORTS_SMP |
2754 | bool | |
2755 | ||
130e2fb7 RB |
2756 | config NR_CPUS_DEFAULT_4 |
2757 | bool | |
2758 | ||
2759 | config NR_CPUS_DEFAULT_8 | |
2760 | bool | |
2761 | ||
2762 | config NR_CPUS_DEFAULT_16 | |
2763 | bool | |
2764 | ||
2765 | config NR_CPUS_DEFAULT_32 | |
2766 | bool | |
2767 | ||
2768 | config NR_CPUS_DEFAULT_64 | |
2769 | bool | |
2770 | ||
1da177e4 | 2771 | config NR_CPUS |
a91796a9 J |
2772 | int "Maximum number of CPUs (2-256)" |
2773 | range 2 256 | |
1da177e4 | 2774 | depends on SMP |
130e2fb7 RB |
2775 | default "4" if NR_CPUS_DEFAULT_4 |
2776 | default "8" if NR_CPUS_DEFAULT_8 | |
2777 | default "16" if NR_CPUS_DEFAULT_16 | |
2778 | default "32" if NR_CPUS_DEFAULT_32 | |
2779 | default "64" if NR_CPUS_DEFAULT_64 | |
1da177e4 LT |
2780 | help |
2781 | This allows you to specify the maximum number of CPUs which this | |
2782 | kernel will support. The maximum supported value is 32 for 32-bit | |
2783 | kernel and 64 for 64-bit kernels; the minimum value which makes | |
72ede9b1 AN |
2784 | sense is 1 for Qemu (useful only for kernel debugging purposes) |
2785 | and 2 for all others. | |
1da177e4 LT |
2786 | |
2787 | This is purely to save memory - each supported CPU adds | |
72ede9b1 AN |
2788 | approximately eight kilobytes to the kernel image. For best |
2789 | performance should round up your number of processors to the next | |
2790 | power of two. | |
1da177e4 | 2791 | |
399aaa25 AC |
2792 | config MIPS_PERF_SHARED_TC_COUNTERS |
2793 | bool | |
7820b84b DD |
2794 | |
2795 | config MIPS_NR_CPU_NR_MAP_1024 | |
2796 | bool | |
2797 | ||
2798 | config MIPS_NR_CPU_NR_MAP | |
2799 | int | |
2800 | depends on SMP | |
2801 | default 1024 if MIPS_NR_CPU_NR_MAP_1024 | |
2802 | default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 | |
399aaa25 | 2803 | |
1723b4a3 AN |
2804 | # |
2805 | # Timer Interrupt Frequency Configuration | |
2806 | # | |
2807 | ||
2808 | choice | |
2809 | prompt "Timer frequency" | |
2810 | default HZ_250 | |
2811 | help | |
371a4151 | 2812 | Allows the configuration of the timer frequency. |
1723b4a3 | 2813 | |
67596573 PB |
2814 | config HZ_24 |
2815 | bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ | |
2816 | ||
1723b4a3 | 2817 | config HZ_48 |
0f873585 | 2818 | bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ |
1723b4a3 AN |
2819 | |
2820 | config HZ_100 | |
2821 | bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ | |
2822 | ||
2823 | config HZ_128 | |
2824 | bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ | |
2825 | ||
2826 | config HZ_250 | |
2827 | bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ | |
2828 | ||
2829 | config HZ_256 | |
2830 | bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ | |
2831 | ||
2832 | config HZ_1000 | |
2833 | bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ | |
2834 | ||
2835 | config HZ_1024 | |
2836 | bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ | |
2837 | ||
2838 | endchoice | |
2839 | ||
67596573 PB |
2840 | config SYS_SUPPORTS_24HZ |
2841 | bool | |
2842 | ||
1723b4a3 AN |
2843 | config SYS_SUPPORTS_48HZ |
2844 | bool | |
2845 | ||
2846 | config SYS_SUPPORTS_100HZ | |
2847 | bool | |
2848 | ||
2849 | config SYS_SUPPORTS_128HZ | |
2850 | bool | |
2851 | ||
2852 | config SYS_SUPPORTS_250HZ | |
2853 | bool | |
2854 | ||
2855 | config SYS_SUPPORTS_256HZ | |
2856 | bool | |
2857 | ||
2858 | config SYS_SUPPORTS_1000HZ | |
2859 | bool | |
2860 | ||
2861 | config SYS_SUPPORTS_1024HZ | |
2862 | bool | |
2863 | ||
2864 | config SYS_SUPPORTS_ARBIT_HZ | |
2865 | bool | |
67596573 PB |
2866 | default y if !SYS_SUPPORTS_24HZ && \ |
2867 | !SYS_SUPPORTS_48HZ && \ | |
2868 | !SYS_SUPPORTS_100HZ && \ | |
2869 | !SYS_SUPPORTS_128HZ && \ | |
2870 | !SYS_SUPPORTS_250HZ && \ | |
2871 | !SYS_SUPPORTS_256HZ && \ | |
2872 | !SYS_SUPPORTS_1000HZ && \ | |
1723b4a3 AN |
2873 | !SYS_SUPPORTS_1024HZ |
2874 | ||
2875 | config HZ | |
2876 | int | |
67596573 | 2877 | default 24 if HZ_24 |
1723b4a3 AN |
2878 | default 48 if HZ_48 |
2879 | default 100 if HZ_100 | |
2880 | default 128 if HZ_128 | |
2881 | default 250 if HZ_250 | |
2882 | default 256 if HZ_256 | |
2883 | default 1000 if HZ_1000 | |
2884 | default 1024 if HZ_1024 | |
2885 | ||
96685b17 DZ |
2886 | config SCHED_HRTICK |
2887 | def_bool HIGH_RES_TIMERS | |
2888 | ||
ea6e942b | 2889 | config KEXEC |
7d60717e | 2890 | bool "Kexec system call" |
2965faa5 | 2891 | select KEXEC_CORE |
ea6e942b AN |
2892 | help |
2893 | kexec is a system call that implements the ability to shutdown your | |
2894 | current kernel, and to start another kernel. It is like a reboot | |
3dde6ad8 | 2895 | but it is independent of the system firmware. And like a reboot |
ea6e942b AN |
2896 | you can start any kernel with it, not just Linux. |
2897 | ||
01dd2fbf | 2898 | The name comes from the similarity to the exec system call. |
ea6e942b AN |
2899 | |
2900 | It is an ongoing process to be certain the hardware in a machine | |
2901 | is properly shutdown, so do not be surprised if this code does not | |
bf220695 GU |
2902 | initially work for you. As of this writing the exact hardware |
2903 | interface is strongly in flux, so no good recommendation can be | |
2904 | made. | |
ea6e942b | 2905 | |
7aa1c8f4 | 2906 | config CRASH_DUMP |
bff323d5 MN |
2907 | bool "Kernel crash dumps" |
2908 | help | |
7aa1c8f4 RB |
2909 | Generate crash dump after being started by kexec. |
2910 | This should be normally only set in special crash dump kernels | |
2911 | which are loaded in the main kernel with kexec-tools into | |
2912 | a specially reserved region and then later executed after | |
2913 | a crash by kdump/kexec. The crash dump kernel must be compiled | |
2914 | to a memory address not used by the main kernel or firmware using | |
2915 | PHYSICAL_START. | |
2916 | ||
2917 | config PHYSICAL_START | |
bff323d5 | 2918 | hex "Physical address where the kernel is loaded" |
8bda3e26 | 2919 | default "0xffffffff84000000" |
bff323d5 MN |
2920 | depends on CRASH_DUMP |
2921 | help | |
7aa1c8f4 RB |
2922 | This gives the CKSEG0 or KSEG0 address where the kernel is loaded. |
2923 | If you plan to use kernel for capturing the crash dump change | |
2924 | this value to start of the reserved region (the "X" value as | |
2925 | specified in the "crashkernel=YM@XM" command line boot parameter | |
2926 | passed to the panic-ed kernel). | |
2927 | ||
ea6e942b AN |
2928 | config SECCOMP |
2929 | bool "Enable seccomp to safely compute untrusted bytecode" | |
293c5bd1 | 2930 | depends on PROC_FS |
ea6e942b AN |
2931 | default y |
2932 | help | |
2933 | This kernel feature is useful for number crunching applications | |
2934 | that may need to compute untrusted bytecode during their | |
2935 | execution. By using pipes or other transports made available to | |
2936 | the process as file descriptors supporting the read/write | |
2937 | syscalls, it's possible to isolate those applications in | |
2938 | their own address space using seccomp. Once seccomp is | |
2939 | enabled via /proc/<pid>/seccomp, it cannot be disabled | |
2940 | and the task is only allowed to execute a few safe syscalls | |
2941 | defined by each seccomp mode. | |
2942 | ||
2943 | If unsure, say Y. Only embedded should say N here. | |
2944 | ||
597ce172 | 2945 | config MIPS_O32_FP64_SUPPORT |
b7f1e273 | 2946 | bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6 |
597ce172 | 2947 | depends on 32BIT || MIPS32_O32 |
597ce172 PB |
2948 | help |
2949 | When this is enabled, the kernel will support use of 64-bit floating | |
2950 | point registers with binaries using the O32 ABI along with the | |
2951 | EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On | |
2952 | 32-bit MIPS systems this support is at the cost of increasing the | |
2953 | size and complexity of the compiled FPU emulator. Thus if you are | |
2954 | running a MIPS32 system and know that none of your userland binaries | |
2955 | will require 64-bit floating point, you may wish to reduce the size | |
2956 | of your kernel & potentially improve FP emulation performance by | |
2957 | saying N here. | |
2958 | ||
06e2e882 PB |
2959 | Although binutils currently supports use of this flag the details |
2960 | concerning its effect upon the O32 ABI in userland are still being | |
2961 | worked on. In order to avoid userland becoming dependant upon current | |
2962 | behaviour before the details have been finalised, this option should | |
2963 | be considered experimental and only enabled by those working upon | |
2964 | said details. | |
2965 | ||
2966 | If unsure, say N. | |
597ce172 | 2967 | |
f2ffa5ab | 2968 | config USE_OF |
0b3e06fd | 2969 | bool |
f2ffa5ab | 2970 | select OF |
e6ce1324 | 2971 | select OF_EARLY_FLATTREE |
abd2363f | 2972 | select IRQ_DOMAIN |
f2ffa5ab | 2973 | |
2fe8ea39 DZ |
2974 | config UHI_BOOT |
2975 | bool | |
2976 | ||
7fafb068 AB |
2977 | config BUILTIN_DTB |
2978 | bool | |
2979 | ||
1da8f179 | 2980 | choice |
5b24d52c | 2981 | prompt "Kernel appended dtb support" if USE_OF |
1da8f179 JG |
2982 | default MIPS_NO_APPENDED_DTB |
2983 | ||
2984 | config MIPS_NO_APPENDED_DTB | |
2985 | bool "None" | |
2986 | help | |
2987 | Do not enable appended dtb support. | |
2988 | ||
87db537d AK |
2989 | config MIPS_ELF_APPENDED_DTB |
2990 | bool "vmlinux" | |
2991 | help | |
2992 | With this option, the boot code will look for a device tree binary | |
2993 | DTB) included in the vmlinux ELF section .appended_dtb. By default | |
2994 | it is empty and the DTB can be appended using binutils command | |
2995 | objcopy: | |
2996 | ||
2997 | objcopy --update-section .appended_dtb=<filename>.dtb vmlinux | |
2998 | ||
2999 | This is meant as a backward compatiblity convenience for those | |
3000 | systems with a bootloader that can't be upgraded to accommodate | |
3001 | the documented boot protocol using a device tree. | |
3002 | ||
1da8f179 | 3003 | config MIPS_RAW_APPENDED_DTB |
b8f54f2c | 3004 | bool "vmlinux.bin or vmlinuz.bin" |
1da8f179 JG |
3005 | help |
3006 | With this option, the boot code will look for a device tree binary | |
b8f54f2c | 3007 | DTB) appended to raw vmlinux.bin or vmlinuz.bin. |
1da8f179 JG |
3008 | (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). |
3009 | ||
3010 | This is meant as a backward compatibility convenience for those | |
3011 | systems with a bootloader that can't be upgraded to accommodate | |
3012 | the documented boot protocol using a device tree. | |
3013 | ||
3014 | Beware that there is very little in terms of protection against | |
3015 | this option being confused by leftover garbage in memory that might | |
3016 | look like a DTB header after a reboot if no actual DTB is appended | |
3017 | to vmlinux.bin. Do not leave this option active in a production kernel | |
3018 | if you don't intend to always append a DTB. | |
3019 | endchoice | |
3020 | ||
2024972e JG |
3021 | choice |
3022 | prompt "Kernel command line type" if !CMDLINE_OVERRIDE | |
2bcef9b4 | 3023 | default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ |
3f5f0a44 | 3024 | !MIPS_MALTA && \ |
2bcef9b4 | 3025 | !CAVIUM_OCTEON_SOC |
2024972e JG |
3026 | default MIPS_CMDLINE_FROM_BOOTLOADER |
3027 | ||
3028 | config MIPS_CMDLINE_FROM_DTB | |
3029 | depends on USE_OF | |
3030 | bool "Dtb kernel arguments if available" | |
3031 | ||
3032 | config MIPS_CMDLINE_DTB_EXTEND | |
3033 | depends on USE_OF | |
3034 | bool "Extend dtb kernel arguments with bootloader arguments" | |
3035 | ||
3036 | config MIPS_CMDLINE_FROM_BOOTLOADER | |
3037 | bool "Bootloader kernel arguments if available" | |
ed47e153 RV |
3038 | |
3039 | config MIPS_CMDLINE_BUILTIN_EXTEND | |
3040 | depends on CMDLINE_BOOL | |
3041 | bool "Extend builtin kernel arguments with bootloader arguments" | |
2024972e JG |
3042 | endchoice |
3043 | ||
5e83d430 RB |
3044 | endmenu |
3045 | ||
1df0f0ff AN |
3046 | config LOCKDEP_SUPPORT |
3047 | bool | |
3048 | default y | |
3049 | ||
3050 | config STACKTRACE_SUPPORT | |
3051 | bool | |
3052 | default y | |
3053 | ||
a728ab52 KS |
3054 | config PGTABLE_LEVELS |
3055 | int | |
3377e227 | 3056 | default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 |
a728ab52 KS |
3057 | default 3 if 64BIT && !PAGE_SIZE_64KB |
3058 | default 2 | |
3059 | ||
6c359eb1 PB |
3060 | config MIPS_AUTO_PFN_OFFSET |
3061 | bool | |
3062 | ||
1da177e4 LT |
3063 | menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" |
3064 | ||
c5611df9 | 3065 | config PCI_DRIVERS_GENERIC |
2eac9c2d | 3066 | select PCI_DOMAINS_GENERIC if PCI |
c5611df9 PB |
3067 | bool |
3068 | ||
3069 | config PCI_DRIVERS_LEGACY | |
3070 | def_bool !PCI_DRIVERS_GENERIC | |
3071 | select NO_GENERIC_PCI_IOPORT_MAP | |
2eac9c2d | 3072 | select PCI_DOMAINS if PCI |
1da177e4 LT |
3073 | |
3074 | # | |
3075 | # ISA support is now enabled via select. Too many systems still have the one | |
3076 | # or other ISA chip on the board that users don't know about so don't expect | |
3077 | # users to choose the right thing ... | |
3078 | # | |
3079 | config ISA | |
3080 | bool | |
3081 | ||
1da177e4 LT |
3082 | config TC |
3083 | bool "TURBOchannel support" | |
3084 | depends on MACH_DECSTATION | |
3085 | help | |
50a23e6e JM |
3086 | TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS |
3087 | processors. TURBOchannel programming specifications are available | |
3088 | at: | |
3089 | <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> | |
3090 | and: | |
3091 | <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> | |
3092 | Linux driver support status is documented at: | |
3093 | <http://www.linux-mips.org/wiki/DECstation> | |
1da177e4 | 3094 | |
1da177e4 LT |
3095 | config MMU |
3096 | bool | |
3097 | default y | |
3098 | ||
109c32ff MR |
3099 | config ARCH_MMAP_RND_BITS_MIN |
3100 | default 12 if 64BIT | |
3101 | default 8 | |
3102 | ||
3103 | config ARCH_MMAP_RND_BITS_MAX | |
3104 | default 18 if 64BIT | |
3105 | default 15 | |
3106 | ||
3107 | config ARCH_MMAP_RND_COMPAT_BITS_MIN | |
371a4151 | 3108 | default 8 |
109c32ff MR |
3109 | |
3110 | config ARCH_MMAP_RND_COMPAT_BITS_MAX | |
371a4151 | 3111 | default 15 |
109c32ff | 3112 | |
d865bea4 RB |
3113 | config I8253 |
3114 | bool | |
798778b8 | 3115 | select CLKSRC_I8253 |
2d02612f | 3116 | select CLKEVT_I8253 |
9726b43a | 3117 | select MIPS_EXTERNAL_TIMER |
d865bea4 | 3118 | |
e05eb3f8 RB |
3119 | config ZONE_DMA |
3120 | bool | |
3121 | ||
cce335ae RB |
3122 | config ZONE_DMA32 |
3123 | bool | |
3124 | ||
1da177e4 LT |
3125 | endmenu |
3126 | ||
1da177e4 LT |
3127 | config TRAD_SIGNALS |
3128 | bool | |
1da177e4 | 3129 | |
1da177e4 | 3130 | config MIPS32_COMPAT |
78aaf956 | 3131 | bool |
1da177e4 LT |
3132 | |
3133 | config COMPAT | |
3134 | bool | |
1da177e4 | 3135 | |
05e43966 AN |
3136 | config SYSVIPC_COMPAT |
3137 | bool | |
05e43966 | 3138 | |
1da177e4 LT |
3139 | config MIPS32_O32 |
3140 | bool "Kernel support for o32 binaries" | |
78aaf956 RB |
3141 | depends on 64BIT |
3142 | select ARCH_WANT_OLD_COMPAT_IPC | |
3143 | select COMPAT | |
3144 | select MIPS32_COMPAT | |
3145 | select SYSVIPC_COMPAT if SYSVIPC | |
1da177e4 LT |
3146 | help |
3147 | Select this option if you want to run o32 binaries. These are pure | |
3148 | 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of | |
3149 | existing binaries are in this format. | |
3150 | ||
3151 | If unsure, say Y. | |
3152 | ||
3153 | config MIPS32_N32 | |
3154 | bool "Kernel support for n32 binaries" | |
c22eacfe | 3155 | depends on 64BIT |
5a9372f7 | 3156 | select ARCH_WANT_COMPAT_IPC_PARSE_VERSION |
78aaf956 RB |
3157 | select COMPAT |
3158 | select MIPS32_COMPAT | |
3159 | select SYSVIPC_COMPAT if SYSVIPC | |
1da177e4 LT |
3160 | help |
3161 | Select this option if you want to run n32 binaries. These are | |
3162 | 64-bit binaries using 32-bit quantities for addressing and certain | |
3163 | data that would normally be 64-bit. They are used in special | |
3164 | cases. | |
3165 | ||
3166 | If unsure, say N. | |
3167 | ||
3168 | config BINFMT_ELF32 | |
3169 | bool | |
3170 | default y if MIPS32_O32 || MIPS32_N32 | |
f43edca7 | 3171 | select ELFCORE |
1da177e4 | 3172 | |
2116245e RB |
3173 | menu "Power management options" |
3174 | ||
363c55ca WZ |
3175 | config ARCH_HIBERNATION_POSSIBLE |
3176 | def_bool y | |
3f5b3e17 | 3177 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
363c55ca | 3178 | |
f4cb5700 JB |
3179 | config ARCH_SUSPEND_POSSIBLE |
3180 | def_bool y | |
3f5b3e17 | 3181 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
f4cb5700 | 3182 | |
2116245e | 3183 | source "kernel/power/Kconfig" |
952fa954 | 3184 | |
1da177e4 LT |
3185 | endmenu |
3186 | ||
7a998935 VK |
3187 | config MIPS_EXTERNAL_TIMER |
3188 | bool | |
3189 | ||
7a998935 | 3190 | menu "CPU Power Management" |
c095ebaf PB |
3191 | |
3192 | if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER | |
7a998935 | 3193 | source "drivers/cpufreq/Kconfig" |
7a998935 | 3194 | endif |
9726b43a | 3195 | |
c095ebaf PB |
3196 | source "drivers/cpuidle/Kconfig" |
3197 | ||
3198 | endmenu | |
3199 | ||
98cdee0e RB |
3200 | source "drivers/firmware/Kconfig" |
3201 | ||
2235a54d | 3202 | source "arch/mips/kvm/Kconfig" |