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MIPS: Use WARN() in uasm for better diagnostics.
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1da177e4
LT
1config MIPS
2 bool
3 default y
f8ac0425 4 select HAVE_GENERIC_DMA_COHERENT
ec7748b5 5 select HAVE_IDE
42d4b839 6 select HAVE_OPROFILE
7f788d2d
DZ
7 select HAVE_PERF_EVENTS
8 select PERF_USE_VMALLOC
88547001 9 select HAVE_ARCH_KGDB
d2bb0762 10 select HAVE_FUNCTION_TRACER
69a7d1b3 11 select HAVE_FUNCTION_TRACE_MCOUNT_TEST
538f1952
WZ
12 select HAVE_DYNAMIC_FTRACE
13 select HAVE_FTRACE_MCOUNT_RECORD
64575f91 14 select HAVE_C_RECORDMCOUNT
29c5d346 15 select HAVE_FUNCTION_GRAPH_TRACER
c1bf207d
DD
16 select HAVE_KPROBES
17 select HAVE_KRETPROBES
21a41faa 18 select RTC_LIB if !MACH_LOONGSON
2b78920d 19 select GENERIC_ATOMIC64 if !64BIT
48e1fd5a
DD
20 select HAVE_DMA_ATTRS
21 select HAVE_DMA_API_DEBUG
3bd27e32
DD
22 select HAVE_GENERIC_HARDIRQS
23 select GENERIC_IRQ_PROBE
1da177e4 24
1da177e4
LT
25menu "Machine selection"
26
5ac6da66
CL
27config ZONE_DMA
28 bool
5ac6da66 29
5e83d430
RB
30choice
31 prompt "System type"
32 default SGI_IP22
1da177e4 33
42a4f17d 34config MIPS_ALCHEMY
c3543e25 35 bool "Alchemy processor based machines"
42a4f17d
ML
36 select 64BIT_PHYS_ADDR
37 select CEVT_R4K_LIB
38 select CSRC_R4K_LIB
39 select IRQ_CPU
40 select SYS_HAS_CPU_MIPS32_R1
41 select SYS_SUPPORTS_32BIT_KERNEL
42 select SYS_SUPPORTS_APM_EMULATION
43 select GENERIC_GPIO
44 select ARCH_WANT_OPTIONAL_GPIOLIB
1b93b3c3 45 select SYS_SUPPORTS_ZBOOT
1da177e4 46
7ca5dc14
FF
47config AR7
48 bool "Texas Instruments AR7"
49 select BOOT_ELF32
50 select DMA_NONCOHERENT
51 select CEVT_R4K
52 select CSRC_R4K
53 select IRQ_CPU
54 select NO_EXCEPT_FILL
55 select SWAP_IO_SPACE
56 select SYS_HAS_CPU_MIPS32_R1
57 select SYS_HAS_EARLY_PRINTK
58 select SYS_SUPPORTS_32BIT_KERNEL
59 select SYS_SUPPORTS_LITTLE_ENDIAN
1b93b3c3 60 select SYS_SUPPORTS_ZBOOT_UART16550
5f3c9098 61 select ARCH_REQUIRE_GPIOLIB
7ca5dc14
FF
62 select GCD
63 select VLYNQ
64 help
65 Support for the Texas Instruments AR7 System-on-a-Chip
66 family: TNETD7100, 7200 and 7300.
67
1c0c13eb 68config BCM47XX
c619366e 69 bool "Broadcom BCM47XX based boards"
42f77542 70 select CEVT_R4K
940f6b48 71 select CSRC_R4K
1c0c13eb
AJ
72 select DMA_NONCOHERENT
73 select HW_HAS_PCI
74 select IRQ_CPU
75 select SYS_HAS_CPU_MIPS32_R1
76 select SYS_SUPPORTS_32BIT_KERNEL
77 select SYS_SUPPORTS_LITTLE_ENDIAN
78 select SSB
79 select SSB_DRIVER_MIPS
2f02c15a 80 select SSB_DRIVER_EXTIF
b06f3e19 81 select SSB_EMBEDDED
220937b1 82 select SSB_B43_PCI_BRIDGE if PCI
2f02c15a 83 select SSB_PCICORE_HOSTMODE if PCI
1c0c13eb 84 select GENERIC_GPIO
25e5fb97
AJ
85 select SYS_HAS_EARLY_PRINTK
86 select CFE
1c0c13eb
AJ
87 help
88 Support for BCM47XX based boards
89
e7300d04
MB
90config BCM63XX
91 bool "Broadcom BCM63XX based boards"
92 select CEVT_R4K
93 select CSRC_R4K
94 select DMA_NONCOHERENT
95 select IRQ_CPU
96 select SYS_HAS_CPU_MIPS32_R1
97 select SYS_SUPPORTS_32BIT_KERNEL
98 select SYS_SUPPORTS_BIG_ENDIAN
99 select SYS_HAS_EARLY_PRINTK
100 select SWAP_IO_SPACE
101 select ARCH_REQUIRE_GPIOLIB
102 help
103 Support for BCM63XX based boards
104
1da177e4 105config MIPS_COBALT
3fa986fa 106 bool "Cobalt Server"
42f77542 107 select CEVT_R4K
940f6b48 108 select CSRC_R4K
1097c6ac 109 select CEVT_GT641XX
1da177e4
LT
110 select DMA_NONCOHERENT
111 select HW_HAS_PCI
d865bea4 112 select I8253
1da177e4
LT
113 select I8259
114 select IRQ_CPU
d5ab1a69 115 select IRQ_GT641XX
252161ec 116 select PCI_GT64XXX_PCI0
e25bfc92 117 select PCI
7cf8053b 118 select SYS_HAS_CPU_NEVADA
0a22e0d4 119 select SYS_HAS_EARLY_PRINTK
ed5ba2fb 120 select SYS_SUPPORTS_32BIT_KERNEL
0e8774b6 121 select SYS_SUPPORTS_64BIT_KERNEL
5e83d430 122 select SYS_SUPPORTS_LITTLE_ENDIAN
1da177e4
LT
123
124config MACH_DECSTATION
3fa986fa 125 bool "DECstations"
1da177e4 126 select BOOT_ELF32
6457d9fc 127 select CEVT_DS1287
42f77542 128 select CEVT_R4K
4247417d 129 select CSRC_IOASIC
940f6b48 130 select CSRC_R4K
20d60d99
MR
131 select CPU_DADDI_WORKAROUNDS if 64BIT
132 select CPU_R4000_WORKAROUNDS if 64BIT
133 select CPU_R4400_WORKAROUNDS if 64BIT
1da177e4 134 select DMA_NONCOHERENT
d388d685 135 select NO_IOPORT
1da177e4 136 select IRQ_CPU
7cf8053b
RB
137 select SYS_HAS_CPU_R3000
138 select SYS_HAS_CPU_R4X00
ed5ba2fb
YY
139 select SYS_SUPPORTS_32BIT_KERNEL
140 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
5e83d430 141 select SYS_SUPPORTS_LITTLE_ENDIAN
1723b4a3
AN
142 select SYS_SUPPORTS_128HZ
143 select SYS_SUPPORTS_256HZ
144 select SYS_SUPPORTS_1024HZ
5e83d430 145 help
1da177e4
LT
146 This enables support for DEC's MIPS based workstations. For details
147 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
148 DECstation porting pages on <http://decstation.unix-ag.org/>.
149
150 If you have one of the following DECstation Models you definitely
151 want to choose R4xx0 for the CPU Type:
152
9308816c
RB
153 DECstation 5000/50
154 DECstation 5000/150
155 DECstation 5000/260
156 DECsystem 5900/260
1da177e4
LT
157
158 otherwise choose R3000.
159
5e83d430 160config MACH_JAZZ
3fa986fa 161 bool "Jazz family of machines"
5e83d430
RB
162 select ARC
163 select ARC32
164 select ARCH_MAY_HAVE_PC_FDC
42f77542 165 select CEVT_R4K
940f6b48 166 select CSRC_R4K
e2defae5 167 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
5e83d430 168 select GENERIC_ISA_DMA
ea202c63 169 select IRQ_CPU
d865bea4 170 select I8253
5e83d430
RB
171 select I8259
172 select ISA
7cf8053b 173 select SYS_HAS_CPU_R4X00
5e83d430
RB
174 select SYS_SUPPORTS_32BIT_KERNEL
175 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
1723b4a3 176 select SYS_SUPPORTS_100HZ
1da177e4 177 help
5e83d430
RB
178 This a family of machines based on the MIPS R4030 chipset which was
179 used by several vendors to build RISC/os and Windows NT workstations.
692105b8 180 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
5e83d430
RB
181 Olivetti M700-10 workstations.
182
5ebabe59
LPC
183config MACH_JZ4740
184 bool "Ingenic JZ4740 based machines"
185 select SYS_HAS_CPU_MIPS32_R1
186 select SYS_SUPPORTS_32BIT_KERNEL
187 select SYS_SUPPORTS_LITTLE_ENDIAN
188 select DMA_NONCOHERENT
189 select IRQ_CPU
190 select GENERIC_GPIO
191 select ARCH_REQUIRE_GPIOLIB
192 select SYS_HAS_EARLY_PRINTK
193 select HAVE_PWM
194
1f21d2bd
BM
195config LASAT
196 bool "LASAT Networks platforms"
42f77542 197 select CEVT_R4K
940f6b48 198 select CSRC_R4K
1f21d2bd
BM
199 select DMA_NONCOHERENT
200 select SYS_HAS_EARLY_PRINTK
201 select HW_HAS_PCI
a5ccfe5c 202 select IRQ_CPU
1f21d2bd
BM
203 select PCI_GT64XXX_PCI0
204 select MIPS_NILE4
205 select R5000_CPU_SCACHE
206 select SYS_HAS_CPU_R5000
207 select SYS_SUPPORTS_32BIT_KERNEL
208 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
209 select SYS_SUPPORTS_LITTLE_ENDIAN
1f21d2bd 210
85749d24
WZ
211config MACH_LOONGSON
212 bool "Loongson family of machines"
c7e8c668 213 select SYS_SUPPORTS_ZBOOT
ade299d8 214 help
85749d24
WZ
215 This enables the support of Loongson family of machines.
216
217 Loongson is a family of general-purpose MIPS-compatible CPUs.
218 developed at Institute of Computing Technology (ICT),
219 Chinese Academy of Sciences (CAS) in the People's Republic
220 of China. The chief architect is Professor Weiwu Hu.
ade299d8 221
1da177e4 222config MIPS_MALTA
3fa986fa 223 bool "MIPS Malta board"
61ed242d 224 select ARCH_MAY_HAVE_PC_FDC
1da177e4 225 select BOOT_ELF32
fa71c960 226 select BOOT_RAW
42f77542 227 select CEVT_R4K
940f6b48 228 select CSRC_R4K
1da177e4
LT
229 select DMA_NONCOHERENT
230 select GENERIC_ISA_DMA
aa414dff 231 select IRQ_CPU
39b8d525 232 select IRQ_GIC
1da177e4 233 select HW_HAS_PCI
d865bea4 234 select I8253
1da177e4 235 select I8259
5e83d430
RB
236 select MIPS_BOARDS_GEN
237 select MIPS_BONITO64
9318c51a 238 select MIPS_CPU_SCACHE
252161ec 239 select PCI_GT64XXX_PCI0
5e83d430 240 select MIPS_MSC
1da177e4 241 select SWAP_IO_SPACE
7cf8053b
RB
242 select SYS_HAS_CPU_MIPS32_R1
243 select SYS_HAS_CPU_MIPS32_R2
244 select SYS_HAS_CPU_MIPS64_R1
245 select SYS_HAS_CPU_NEVADA
246 select SYS_HAS_CPU_RM7000
36a88530 247 select SYS_HAS_EARLY_PRINTK
ed5ba2fb
YY
248 select SYS_SUPPORTS_32BIT_KERNEL
249 select SYS_SUPPORTS_64BIT_KERNEL
5e83d430
RB
250 select SYS_SUPPORTS_BIG_ENDIAN
251 select SYS_SUPPORTS_LITTLE_ENDIAN
0365070f 252 select SYS_SUPPORTS_MIPS_CMP
f41ae0b2 253 select SYS_SUPPORTS_MULTITHREADING
9693a853 254 select SYS_SUPPORTS_SMARTMIPS
1b93b3c3 255 select SYS_SUPPORTS_ZBOOT
1da177e4 256 help
f638d197 257 This enables support for the MIPS Technologies Malta evaluation
1da177e4
LT
258 board.
259
5e83d430 260config MIPS_SIM
3fa986fa 261 bool 'MIPS simulator (MIPSsim)'
42f77542 262 select CEVT_R4K
940f6b48 263 select CSRC_R4K
1da177e4 264 select DMA_NONCOHERENT
36a88530 265 select SYS_HAS_EARLY_PRINTK
1da177e4 266 select IRQ_CPU
9267a30d 267 select BOOT_RAW
7cf8053b
RB
268 select SYS_HAS_CPU_MIPS32_R1
269 select SYS_HAS_CPU_MIPS32_R2
36a88530 270 select SYS_HAS_EARLY_PRINTK
ed5ba2fb 271 select SYS_SUPPORTS_32BIT_KERNEL
5e83d430 272 select SYS_SUPPORTS_BIG_ENDIAN
f6e2373a 273 select SYS_SUPPORTS_MULTITHREADING
5e83d430 274 select SYS_SUPPORTS_LITTLE_ENDIAN
1da177e4 275 help
5e83d430
RB
276 This option enables support for MIPS Technologies MIPSsim software
277 emulator.
1da177e4 278
a83860c2
RB
279config NEC_MARKEINS
280 bool "NEC EMMA2RH Mark-eins board"
281 select SOC_EMMA2RH
282 select HW_HAS_PCI
283 help
284 This enables support for the NEC Electronics Mark-eins boards.
ade299d8 285
5e83d430 286config MACH_VR41XX
74142d65 287 bool "NEC VR4100 series based machines"
42f77542 288 select CEVT_R4K
940f6b48 289 select CSRC_R4K
7cf8053b 290 select SYS_HAS_CPU_VR41XX
27fdd325 291 select ARCH_REQUIRE_GPIOLIB
5e83d430 292
edb6310a
DL
293config NXP_STB220
294 bool "NXP STB220 board"
295 select SOC_PNX833X
296 help
297 Support for NXP Semiconductors STB220 Development Board.
298
299config NXP_STB225
300 bool "NXP 225 board"
301 select SOC_PNX833X
302 select SOC_PNX8335
303 help
304 Support for NXP Semiconductors STB225 Development Board.
305
ade299d8 306config PNX8550_JBS
a92b0588 307 bool "NXP PNX8550 based JBS board"
ade299d8
YY
308 select PNX8550
309 select SYS_SUPPORTS_LITTLE_ENDIAN
310
311config PNX8550_STB810
a92b0588 312 bool "NXP PNX8550 based STB810 board"
ade299d8
YY
313 select PNX8550
314 select SYS_SUPPORTS_LITTLE_ENDIAN
315
9267a30d
MSJ
316config PMC_MSP
317 bool "PMC-Sierra MSP chipsets"
318 depends on EXPERIMENTAL
319 select DMA_NONCOHERENT
320 select SWAP_IO_SPACE
321 select NO_EXCEPT_FILL
322 select BOOT_RAW
323 select SYS_HAS_CPU_MIPS32_R1
324 select SYS_HAS_CPU_MIPS32_R2
325 select SYS_SUPPORTS_32BIT_KERNEL
326 select SYS_SUPPORTS_BIG_ENDIAN
9267a30d
MSJ
327 select IRQ_CPU
328 select SERIAL_8250
329 select SERIAL_8250_CONSOLE
330 help
331 This adds support for the PMC-Sierra family of Multi-Service
332 Processor System-On-A-Chips. These parts include a number
333 of integrated peripherals, interfaces and DSPs in addition to
334 a variety of MIPS cores.
335
5e83d430 336config PMC_YOSEMITE
3fa986fa 337 bool "PMC-Sierra Yosemite eval board"
42f77542 338 select CEVT_R4K
940f6b48 339 select CSRC_R4K
5e83d430
RB
340 select DMA_COHERENT
341 select HW_HAS_PCI
342 select IRQ_CPU
343 select IRQ_CPU_RM7K
344 select IRQ_CPU_RM9K
345 select SWAP_IO_SPACE
7cf8053b 346 select SYS_HAS_CPU_RM9000
36a88530 347 select SYS_HAS_EARLY_PRINTK
5e83d430
RB
348 select SYS_SUPPORTS_32BIT_KERNEL
349 select SYS_SUPPORTS_64BIT_KERNEL
350 select SYS_SUPPORTS_BIG_ENDIAN
351 select SYS_SUPPORTS_HIGHMEM
e73ea273 352 select SYS_SUPPORTS_SMP
5e83d430
RB
353 help
354 Yosemite is an evaluation board for the RM9000x2 processor
355 manufactured by PMC-Sierra.
1da177e4 356
a3a0f8c8
DV
357config POWERTV
358 bool "Cisco PowerTV"
359 select BOOT_ELF32
360 select CEVT_R4K
361 select CPU_MIPSR2_IRQ_VI
362 select CPU_MIPSR2_IRQ_EI
363 select CSRC_POWERTV
364 select DMA_NONCOHERENT
365 select HW_HAS_PCI
366 select SYS_HAS_EARLY_PRINTK
367 select SYS_HAS_CPU_MIPS32_R2
368 select SYS_SUPPORTS_32BIT_KERNEL
369 select SYS_SUPPORTS_BIG_ENDIAN
370 select SYS_SUPPORTS_HIGHMEM
371 select USB_OHCI_LITTLE_ENDIAN
372 help
373 This enables support for the Cisco PowerTV Platform.
374
1da177e4 375config SGI_IP22
3fa986fa 376 bool "SGI IP22 (Indy/Indigo2)"
1da177e4
LT
377 select ARC
378 select ARC32
379 select BOOT_ELF32
42f77542 380 select CEVT_R4K
940f6b48 381 select CSRC_R4K
e2defae5 382 select DEFAULT_SGI_PARTITION
1da177e4 383 select DMA_NONCOHERENT
5e83d430 384 select HW_HAS_EISA
d865bea4 385 select I8253
68de4803 386 select I8259
1da177e4
LT
387 select IP22_CPU_SCACHE
388 select IRQ_CPU
aa414dff 389 select GENERIC_ISA_DMA_SUPPORT_BROKEN
e2defae5
TB
390 select SGI_HAS_I8042
391 select SGI_HAS_INDYDOG
36e5c21d 392 select SGI_HAS_HAL2
e2defae5
TB
393 select SGI_HAS_SEEQ
394 select SGI_HAS_WD93
395 select SGI_HAS_ZILOG
1da177e4 396 select SWAP_IO_SPACE
7cf8053b
RB
397 select SYS_HAS_CPU_R4X00
398 select SYS_HAS_CPU_R5000
2b5e63f6
MM
399 #
400 # Disable EARLY_PRINTK for now since it leads to overwritten prom
401 # memory during early boot on some machines.
402 #
403 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
404 # for a more details discussion
405 #
406 # select SYS_HAS_EARLY_PRINTK
ed5ba2fb
YY
407 select SYS_SUPPORTS_32BIT_KERNEL
408 select SYS_SUPPORTS_64BIT_KERNEL
5e83d430 409 select SYS_SUPPORTS_BIG_ENDIAN
1da177e4
LT
410 help
411 This are the SGI Indy, Challenge S and Indigo2, as well as certain
412 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
413 that runs on these, say Y here.
414
415config SGI_IP27
3fa986fa 416 bool "SGI IP27 (Origin200/2000)"
1da177e4
LT
417 select ARC
418 select ARC64
5e83d430 419 select BOOT_ELF64
e2defae5 420 select DEFAULT_SGI_PARTITION
634286f1 421 select DMA_COHERENT
36a88530 422 select SYS_HAS_EARLY_PRINTK
1da177e4 423 select HW_HAS_PCI
130e2fb7 424 select NR_CPUS_DEFAULT_64
7cf8053b 425 select SYS_HAS_CPU_R10000
ed5ba2fb 426 select SYS_SUPPORTS_64BIT_KERNEL
5e83d430 427 select SYS_SUPPORTS_BIG_ENDIAN
d8cb4e11 428 select SYS_SUPPORTS_NUMA
1a5c5de1 429 select SYS_SUPPORTS_SMP
1da177e4
LT
430 help
431 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
432 workstations. To compile a Linux kernel that runs on these, say Y
433 here.
434
e2defae5
TB
435config SGI_IP28
436 bool "SGI IP28 (Indigo2 R10k) (EXPERIMENTAL)"
437 depends on EXPERIMENTAL
438 select ARC
439 select ARC64
440 select BOOT_ELF64
441 select CEVT_R4K
442 select CSRC_R4K
443 select DEFAULT_SGI_PARTITION
444 select DMA_NONCOHERENT
445 select GENERIC_ISA_DMA_SUPPORT_BROKEN
446 select IRQ_CPU
447 select HW_HAS_EISA
448 select I8253
449 select I8259
e2defae5
TB
450 select SGI_HAS_I8042
451 select SGI_HAS_INDYDOG
5b438c44 452 select SGI_HAS_HAL2
e2defae5
TB
453 select SGI_HAS_SEEQ
454 select SGI_HAS_WD93
455 select SGI_HAS_ZILOG
456 select SWAP_IO_SPACE
457 select SYS_HAS_CPU_R10000
2b5e63f6
MM
458 #
459 # Disable EARLY_PRINTK for now since it leads to overwritten prom
460 # memory during early boot on some machines.
461 #
462 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
463 # for a more details discussion
464 #
465 # select SYS_HAS_EARLY_PRINTK
e2defae5
TB
466 select SYS_SUPPORTS_64BIT_KERNEL
467 select SYS_SUPPORTS_BIG_ENDIAN
468 help
469 This is the SGI Indigo2 with R10000 processor. To compile a Linux
470 kernel that runs on these, say Y here.
471
1da177e4 472config SGI_IP32
cfd2afc0 473 bool "SGI IP32 (O2)"
1da177e4
LT
474 select ARC
475 select ARC32
476 select BOOT_ELF32
42f77542 477 select CEVT_R4K
940f6b48 478 select CSRC_R4K
1da177e4
LT
479 select DMA_NONCOHERENT
480 select HW_HAS_PCI
dd67b155 481 select IRQ_CPU
1da177e4
LT
482 select R5000_CPU_SCACHE
483 select RM7000_CPU_SCACHE
7cf8053b
RB
484 select SYS_HAS_CPU_R5000
485 select SYS_HAS_CPU_R10000 if BROKEN
486 select SYS_HAS_CPU_RM7000
dd2f18fe 487 select SYS_HAS_CPU_NEVADA
ed5ba2fb 488 select SYS_SUPPORTS_64BIT_KERNEL
23fbee9d 489 select SYS_SUPPORTS_BIG_ENDIAN
23fbee9d 490 help
5e83d430 491 If you want this kernel to run on SGI O2 workstation, say Y here.
1da177e4 492
ade299d8
YY
493config SIBYTE_CRHINE
494 bool "Sibyte BCM91120C-CRhine"
495 depends on EXPERIMENTAL
9a6dcea1
AI
496 select BOOT_ELF32
497 select DMA_COHERENT
ade299d8 498 select SIBYTE_BCM1120
9a6dcea1 499 select SWAP_IO_SPACE
7cf8053b 500 select SYS_HAS_CPU_SB1
9a6dcea1
AI
501 select SYS_SUPPORTS_BIG_ENDIAN
502 select SYS_SUPPORTS_LITTLE_ENDIAN
503
ade299d8
YY
504config SIBYTE_CARMEL
505 bool "Sibyte BCM91120x-Carmel"
506 depends on EXPERIMENTAL
5e83d430 507 select BOOT_ELF32
1da177e4 508 select DMA_COHERENT
ade299d8 509 select SIBYTE_BCM1120
5e83d430 510 select SWAP_IO_SPACE
7cf8053b 511 select SYS_HAS_CPU_SB1
81731f79 512 select SYS_SUPPORTS_BIG_ENDIAN
5e83d430 513 select SYS_SUPPORTS_LITTLE_ENDIAN
1da177e4 514
ade299d8
YY
515config SIBYTE_CRHONE
516 bool "Sibyte BCM91125C-CRhone"
5e83d430
RB
517 depends on EXPERIMENTAL
518 select BOOT_ELF32
519 select DMA_COHERENT
ade299d8 520 select SIBYTE_BCM1125
5e83d430 521 select SWAP_IO_SPACE
7cf8053b 522 select SYS_HAS_CPU_SB1
5e83d430 523 select SYS_SUPPORTS_BIG_ENDIAN
ade299d8 524 select SYS_SUPPORTS_HIGHMEM
5e83d430 525 select SYS_SUPPORTS_LITTLE_ENDIAN
1da177e4 526
5e83d430 527config SIBYTE_RHONE
3fa986fa 528 bool "Sibyte BCM91125E-Rhone"
5e83d430
RB
529 depends on EXPERIMENTAL
530 select BOOT_ELF32
531 select DMA_COHERENT
532 select SIBYTE_BCM1125H
533 select SWAP_IO_SPACE
7cf8053b 534 select SYS_HAS_CPU_SB1
5e83d430
RB
535 select SYS_SUPPORTS_BIG_ENDIAN
536 select SYS_SUPPORTS_LITTLE_ENDIAN
1da177e4 537
ade299d8
YY
538config SIBYTE_SWARM
539 bool "Sibyte BCM91250A-SWARM"
5e83d430 540 select BOOT_ELF32
26a940e2 541 select DMA_COHERENT
fcf3ca4c 542 select HAVE_PATA_PLATFORM
ade299d8
YY
543 select NR_CPUS_DEFAULT_2
544 select SIBYTE_SB1250
5e83d430 545 select SWAP_IO_SPACE
7cf8053b 546 select SYS_HAS_CPU_SB1
5e83d430 547 select SYS_SUPPORTS_BIG_ENDIAN
ade299d8 548 select SYS_SUPPORTS_HIGHMEM
e3ad1c23 549 select SYS_SUPPORTS_LITTLE_ENDIAN
cce335ae 550 select ZONE_DMA32 if 64BIT
e3ad1c23 551
ade299d8
YY
552config SIBYTE_LITTLESUR
553 bool "Sibyte BCM91250C2-LittleSur"
5e83d430
RB
554 depends on EXPERIMENTAL
555 select BOOT_ELF32
556 select DMA_COHERENT
fcf3ca4c 557 select HAVE_PATA_PLATFORM
130e2fb7 558 select NR_CPUS_DEFAULT_2
5e83d430
RB
559 select SIBYTE_SB1250
560 select SWAP_IO_SPACE
7cf8053b 561 select SYS_HAS_CPU_SB1
5e83d430
RB
562 select SYS_SUPPORTS_BIG_ENDIAN
563 select SYS_SUPPORTS_HIGHMEM
564 select SYS_SUPPORTS_LITTLE_ENDIAN
1da177e4 565
ade299d8
YY
566config SIBYTE_SENTOSA
567 bool "Sibyte BCM91250E-Sentosa"
5e83d430
RB
568 depends on EXPERIMENTAL
569 select BOOT_ELF32
570 select DMA_COHERENT
130e2fb7 571 select NR_CPUS_DEFAULT_2
5e83d430
RB
572 select SIBYTE_SB1250
573 select SWAP_IO_SPACE
7cf8053b 574 select SYS_HAS_CPU_SB1
5e83d430 575 select SYS_SUPPORTS_BIG_ENDIAN
5e83d430 576 select SYS_SUPPORTS_LITTLE_ENDIAN
1da177e4 577
ade299d8
YY
578config SIBYTE_BIGSUR
579 bool "Sibyte BCM91480B-BigSur"
5e83d430
RB
580 select BOOT_ELF32
581 select DMA_COHERENT
ade299d8 582 select NR_CPUS_DEFAULT_4
ade299d8 583 select SIBYTE_BCM1x80
5e83d430 584 select SWAP_IO_SPACE
7cf8053b 585 select SYS_HAS_CPU_SB1
5e83d430 586 select SYS_SUPPORTS_BIG_ENDIAN
651194f8 587 select SYS_SUPPORTS_HIGHMEM
5e83d430 588 select SYS_SUPPORTS_LITTLE_ENDIAN
cce335ae 589 select ZONE_DMA32 if 64BIT
1da177e4 590
14b36af4
TB
591config SNI_RM
592 bool "SNI RM200/300/400"
4a0312fc
TB
593 select ARC if CPU_LITTLE_ENDIAN
594 select ARC32 if CPU_LITTLE_ENDIAN
231a35d3 595 select SNIPROM if CPU_BIG_ENDIAN
61ed242d 596 select ARCH_MAY_HAVE_PC_FDC
1da177e4 597 select BOOT_ELF32
42f77542 598 select CEVT_R4K
940f6b48 599 select CSRC_R4K
e2defae5 600 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
1da177e4
LT
601 select DMA_NONCOHERENT
602 select GENERIC_ISA_DMA
5e83d430 603 select HW_HAS_EISA
1da177e4 604 select HW_HAS_PCI
c066a32a 605 select IRQ_CPU
d865bea4 606 select I8253
1da177e4
LT
607 select I8259
608 select ISA
4a0312fc 609 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
7cf8053b 610 select SYS_HAS_CPU_R4X00
4a0312fc 611 select SYS_HAS_CPU_R5000
c066a32a 612 select SYS_HAS_CPU_R10000
4a0312fc 613 select R5000_CPU_SCACHE
36a88530 614 select SYS_HAS_EARLY_PRINTK
ed5ba2fb
YY
615 select SYS_SUPPORTS_32BIT_KERNEL
616 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
4a0312fc 617 select SYS_SUPPORTS_BIG_ENDIAN
797798c1 618 select SYS_SUPPORTS_HIGHMEM
5e83d430 619 select SYS_SUPPORTS_LITTLE_ENDIAN
1da177e4 620 help
14b36af4
TB
621 The SNI RM200/300/400 are MIPS-based machines manufactured by
622 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
1da177e4
LT
623 Technology and now in turn merged with Fujitsu. Say Y here to
624 support this machine type.
625
edcaf1a6
AN
626config MACH_TX39XX
627 bool "Toshiba TX39 series based machines"
5e83d430 628
edcaf1a6
AN
629config MACH_TX49XX
630 bool "Toshiba TX49 series based machines"
5e83d430 631
73b4390f
RB
632config MIKROTIK_RB532
633 bool "Mikrotik RB532 boards"
634 select CEVT_R4K
635 select CSRC_R4K
636 select DMA_NONCOHERENT
73b4390f
RB
637 select HW_HAS_PCI
638 select IRQ_CPU
639 select SYS_HAS_CPU_MIPS32_R1
640 select SYS_SUPPORTS_32BIT_KERNEL
641 select SYS_SUPPORTS_LITTLE_ENDIAN
642 select SWAP_IO_SPACE
643 select BOOT_RAW
d888e25b 644 select ARCH_REQUIRE_GPIOLIB
73b4390f
RB
645 help
646 Support the Mikrotik(tm) RouterBoard 532 series,
647 based on the IDT RC32434 SoC.
648
ade299d8
YY
649config WR_PPMC
650 bool "Wind River PPMC board"
42f77542 651 select CEVT_R4K
940f6b48 652 select CSRC_R4K
ade299d8
YY
653 select IRQ_CPU
654 select BOOT_ELF32
655 select DMA_NONCOHERENT
656 select HW_HAS_PCI
657 select PCI_GT64XXX_PCI0
658 select SWAP_IO_SPACE
659 select SYS_HAS_CPU_MIPS32_R1
660 select SYS_HAS_CPU_MIPS32_R2
661 select SYS_HAS_CPU_MIPS64_R1
662 select SYS_HAS_CPU_NEVADA
663 select SYS_HAS_CPU_RM7000
664 select SYS_SUPPORTS_32BIT_KERNEL
665 select SYS_SUPPORTS_64BIT_KERNEL
666 select SYS_SUPPORTS_BIG_ENDIAN
667 select SYS_SUPPORTS_LITTLE_ENDIAN
668 help
669 This enables support for the Wind River MIPS32 4KC PPMC evaluation
670 board, which is based on GT64120 bridge chip.
671
a86c7f72 672config CAVIUM_OCTEON_SIMULATOR
c9d89d97 673 bool "Cavium Networks Octeon Simulator"
a86c7f72
DD
674 select CEVT_R4K
675 select 64BIT_PHYS_ADDR
676 select DMA_COHERENT
677 select SYS_SUPPORTS_64BIT_KERNEL
678 select SYS_SUPPORTS_BIG_ENDIAN
679 select SYS_SUPPORTS_HIGHMEM
773cb77d 680 select SYS_SUPPORTS_HOTPLUG_CPU
5e683389 681 select SYS_HAS_CPU_CAVIUM_OCTEON
a86c7f72
DD
682 help
683 The Octeon simulator is software performance model of the Cavium
684 Octeon Processor. It supports simulating Octeon processors on x86
685 hardware.
686
687config CAVIUM_OCTEON_REFERENCE_BOARD
c9d89d97 688 bool "Cavium Networks Octeon reference board"
a86c7f72
DD
689 select CEVT_R4K
690 select 64BIT_PHYS_ADDR
691 select DMA_COHERENT
692 select SYS_SUPPORTS_64BIT_KERNEL
693 select SYS_SUPPORTS_BIG_ENDIAN
694 select SYS_SUPPORTS_HIGHMEM
773cb77d 695 select SYS_SUPPORTS_HOTPLUG_CPU
a86c7f72 696 select SYS_HAS_EARLY_PRINTK
5e683389 697 select SYS_HAS_CPU_CAVIUM_OCTEON
a86c7f72 698 select SWAP_IO_SPACE
e8635b48
DD
699 select HW_HAS_PCI
700 select ARCH_SUPPORTS_MSI
f00e001e 701 select ZONE_DMA32
340fbb8b
DD
702 select USB_ARCH_HAS_OHCI
703 select USB_ARCH_HAS_EHCI
a86c7f72
DD
704 help
705 This option supports all of the Octeon reference boards from Cavium
706 Networks. It builds a kernel that dynamically determines the Octeon
707 CPU type and supports all known board reference implementations.
708 Some of the supported boards are:
709 EBT3000
710 EBH3000
711 EBH3100
712 Thunder
713 Kodama
714 Hikari
715 Say Y here for most Octeon reference boards.
716
5e83d430 717endchoice
1da177e4 718
e8c7c482 719source "arch/mips/alchemy/Kconfig"
e7300d04 720source "arch/mips/bcm63xx/Kconfig"
5e83d430 721source "arch/mips/jazz/Kconfig"
5ebabe59 722source "arch/mips/jz4740/Kconfig"
1f21d2bd 723source "arch/mips/lasat/Kconfig"
5e83d430 724source "arch/mips/pmc-sierra/Kconfig"
a3a0f8c8 725source "arch/mips/powertv/Kconfig"
29c48699 726source "arch/mips/sgi-ip27/Kconfig"
38b18f72 727source "arch/mips/sibyte/Kconfig"
22b1d707 728source "arch/mips/txx9/Kconfig"
5e83d430 729source "arch/mips/vr41xx/Kconfig"
a86c7f72 730source "arch/mips/cavium-octeon/Kconfig"
85749d24 731source "arch/mips/loongson/Kconfig"
38b18f72 732
5e83d430
RB
733endmenu
734
1da177e4
LT
735config RWSEM_GENERIC_SPINLOCK
736 bool
737 default y
738
739config RWSEM_XCHGADD_ALGORITHM
740 bool
741
f0d1b0b3
DH
742config ARCH_HAS_ILOG2_U32
743 bool
744 default n
745
746config ARCH_HAS_ILOG2_U64
747 bool
748 default n
749
00a58253
RB
750config ARCH_SUPPORTS_OPROFILE
751 bool
752 default y if !MIPS_MT_SMTC
753
3c9ee7ef
AM
754config GENERIC_FIND_NEXT_BIT
755 bool
756 default y
757
758config GENERIC_HWEIGHT
759 bool
760 default y
761
1da177e4
LT
762config GENERIC_CALIBRATE_DELAY
763 bool
764 default y
765
7bcf7717
RB
766config GENERIC_CLOCKEVENTS
767 bool
768 default y
769
f5ff0a28
RB
770config GENERIC_CMOS_UPDATE
771 bool
772 default y
773
ae1e9130 774config SCHED_OMIT_FRAME_POINTER
1cc89038
AN
775 bool
776 default y
777
e77c232c 778config GENERIC_HARDIRQS_NO__DO_IRQ
c87e0909 779 def_bool y
e77c232c 780
1da177e4
LT
781#
782# Select some configuration options automatically based on user selections.
783#
784config ARC
785 bool
1da177e4 786
61ed242d
RB
787config ARCH_MAY_HAVE_PC_FDC
788 bool
789
9267a30d
MSJ
790config BOOT_RAW
791 bool
792
217dd11e
RB
793config CEVT_BCM1480
794 bool
795
6457d9fc
YY
796config CEVT_DS1287
797 bool
798
1097c6ac
YY
799config CEVT_GT641XX
800 bool
801
779e7d41
ML
802config CEVT_R4K_LIB
803 bool
804
42f77542 805config CEVT_R4K
779e7d41 806 select CEVT_R4K_LIB
42f77542
RB
807 bool
808
217dd11e
RB
809config CEVT_SB1250
810 bool
811
229f773e
AN
812config CEVT_TXX9
813 bool
814
217dd11e
RB
815config CSRC_BCM1480
816 bool
817
4247417d
YY
818config CSRC_IOASIC
819 bool
820
a3a0f8c8
DV
821config CSRC_POWERTV
822 bool
823
779e7d41
ML
824config CSRC_R4K_LIB
825 bool
826
940f6b48 827config CSRC_R4K
779e7d41 828 select CSRC_R4K_LIB
940f6b48
RB
829 bool
830
217dd11e
RB
831config CSRC_SB1250
832 bool
833
a9aec7fe
AN
834config GPIO_TXX9
835 select GENERIC_GPIO
7444a72e 836 select ARCH_REQUIRE_GPIOLIB
a9aec7fe
AN
837 bool
838
df78b5c8
AJ
839config CFE
840 bool
841
4ce588cd 842config DMA_COHERENT
1da177e4
LT
843 bool
844
4ce588cd
RB
845config DMA_NONCOHERENT
846 bool
e1e02b32 847 select NEED_DMA_MAP_STATE
4ce588cd 848
e1e02b32 849config NEED_DMA_MAP_STATE
1da177e4
LT
850 bool
851
36a88530 852config SYS_HAS_EARLY_PRINTK
1da177e4 853 bool
1da177e4 854
dbb74540 855config HOTPLUG_CPU
1b2bc75c
RB
856 bool "Support for hot-pluggable CPUs"
857 depends on SMP && HOTPLUG && SYS_SUPPORTS_HOTPLUG_CPU
858 help
859 Say Y here to allow turning CPUs off and on. CPUs can be
860 controlled through /sys/devices/system/cpu.
861 (Note: power management support will enable this option
862 automatically on SMP systems. )
863 Say N if you want to disable CPU hotplug.
864
865config SYS_SUPPORTS_HOTPLUG_CPU
dbb74540 866 bool
dbb74540 867
1da177e4
LT
868config I8259
869 bool
1da177e4 870
1da177e4
LT
871config MIPS_BONITO64
872 bool
1da177e4
LT
873
874config MIPS_MSC
875 bool
1da177e4 876
1f21d2bd
BM
877config MIPS_NILE4
878 bool
879
1da177e4
LT
880config MIPS_DISABLE_OBSOLETE_IDE
881 bool
882
39b8d525
RB
883config SYNC_R4K
884 bool
885
487d70d0
GJ
886config MIPS_MACHINE
887 def_bool n
888
d388d685
MR
889config NO_IOPORT
890 def_bool n
891
8313da30
RB
892config GENERIC_ISA_DMA
893 bool
894 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
a35bee8a 895 select ISA_DMA_API
8313da30 896
aa414dff
RB
897config GENERIC_ISA_DMA_SUPPORT_BROKEN
898 bool
8313da30 899 select GENERIC_ISA_DMA
aa414dff 900
a35bee8a
NK
901config ISA_DMA_API
902 bool
903
09663335
YY
904config GENERIC_GPIO
905 bool
906
5e83d430 907#
3cb2fccc 908# Endianess selection. Sufficiently obscure so many users don't know what to
5e83d430
RB
909# answer,so we try hard to limit the available choices. Also the use of a
910# choice statement should be more obvious to the user.
911#
912choice
913 prompt "Endianess selection"
1da177e4
LT
914 help
915 Some MIPS machines can be configured for either little or big endian
5e83d430 916 byte order. These modes require different kernels and a different
3cb2fccc 917 Linux distribution. In general there is one preferred byteorder for a
5e83d430 918 particular system but some systems are just as commonly used in the
3dde6ad8 919 one or the other endianness.
5e83d430
RB
920
921config CPU_BIG_ENDIAN
922 bool "Big endian"
923 depends on SYS_SUPPORTS_BIG_ENDIAN
924
925config CPU_LITTLE_ENDIAN
926 bool "Little endian"
927 depends on SYS_SUPPORTS_LITTLE_ENDIAN
928 help
929
930endchoice
931
22b0763a
DD
932config EXPORT_UASM
933 bool
934
2116245e
RB
935config SYS_SUPPORTS_APM_EMULATION
936 bool
937
5e83d430
RB
938config SYS_SUPPORTS_BIG_ENDIAN
939 bool
940
941config SYS_SUPPORTS_LITTLE_ENDIAN
942 bool
1da177e4 943
9cffd154
DD
944config SYS_SUPPORTS_HUGETLBFS
945 bool
946 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
947 default y
948
1da177e4
LT
949config IRQ_CPU
950 bool
951
952config IRQ_CPU_RM7K
953 bool
954
5e83d430
RB
955config IRQ_CPU_RM9K
956 bool
957
9267a30d
MSJ
958config IRQ_MSP_SLP
959 bool
960
961config IRQ_MSP_CIC
962 bool
963
8420fd00
AN
964config IRQ_TXX9
965 bool
966
d5ab1a69
YY
967config IRQ_GT641XX
968 bool
969
39b8d525
RB
970config IRQ_GIC
971 bool
972
a86c7f72
DD
973config IRQ_CPU_OCTEON
974 bool
975
1da177e4
LT
976config MIPS_BOARDS_GEN
977 bool
1da177e4 978
252161ec 979config PCI_GT64XXX_PCI0
1da177e4 980 bool
1da177e4 981
9267a30d
MSJ
982config NO_EXCEPT_FILL
983 bool
984
663c3d90 985config MIPS_RM9122
986 bool
987 select SERIAL_RM9000
663c3d90 988
a83860c2
RB
989config SOC_EMMA2RH
990 bool
991 select CEVT_R4K
992 select CSRC_R4K
993 select DMA_NONCOHERENT
994 select IRQ_CPU
995 select SWAP_IO_SPACE
996 select SYS_HAS_CPU_R5500
997 select SYS_SUPPORTS_32BIT_KERNEL
998 select SYS_SUPPORTS_64BIT_KERNEL
999 select SYS_SUPPORTS_BIG_ENDIAN
1000
edb6310a
DL
1001config SOC_PNX833X
1002 bool
1003 select CEVT_R4K
1004 select CSRC_R4K
1005 select IRQ_CPU
1006 select DMA_NONCOHERENT
1007 select SYS_HAS_CPU_MIPS32_R2
1008 select SYS_SUPPORTS_32BIT_KERNEL
1009 select SYS_SUPPORTS_LITTLE_ENDIAN
1010 select SYS_SUPPORTS_BIG_ENDIAN
edb6310a
DL
1011 select GENERIC_GPIO
1012 select CPU_MIPSR2_IRQ_VI
1013
1014config SOC_PNX8335
1015 bool
1016 select SOC_PNX833X
1017
bdf21b18
PP
1018config PNX8550
1019 bool
1020 select SOC_PNX8550
1021
1022config SOC_PNX8550
1023 bool
bdf21b18
PP
1024 select DMA_NONCOHERENT
1025 select HW_HAS_PCI
b8c2a77c 1026 select SYS_HAS_CPU_MIPS32_R1
36a88530 1027 select SYS_HAS_EARLY_PRINTK
7cf8053b 1028 select SYS_SUPPORTS_32BIT_KERNEL
4ead1681 1029 select GENERIC_GPIO
bdf21b18 1030
1da177e4
LT
1031config SWAP_IO_SPACE
1032 bool
1033
663c3d90 1034config SERIAL_RM9000
1035 bool
1036
e2defae5
TB
1037config SGI_HAS_INDYDOG
1038 bool
1039
5b438c44
TB
1040config SGI_HAS_HAL2
1041 bool
1042
e2defae5
TB
1043config SGI_HAS_SEEQ
1044 bool
1045
1046config SGI_HAS_WD93
1047 bool
1048
1049config SGI_HAS_ZILOG
1050 bool
1051
1052config SGI_HAS_I8042
1053 bool
1054
1055config DEFAULT_SGI_PARTITION
1056 bool
1057
5e83d430
RB
1058config ARC32
1059 bool
1060
231a35d3
TB
1061config SNIPROM
1062 bool
1063
1da177e4
LT
1064config BOOT_ELF32
1065 bool
1da177e4
LT
1066
1067config MIPS_L1_CACHE_SHIFT
1068 int
c7088755 1069 default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL
0db2b74e 1070 default "6" if MIPS_CPU_SCACHE
a86c7f72 1071 default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON
1da177e4
LT
1072 default "5"
1073
1da177e4
LT
1074config HAVE_STD_PC_SERIAL_PORT
1075 bool
1076
1da177e4
LT
1077config ARC_CONSOLE
1078 bool "ARC console support"
e2defae5 1079 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1da177e4
LT
1080
1081config ARC_MEMORY
1082 bool
14b36af4 1083 depends on MACH_JAZZ || SNI_RM || SGI_IP32
1da177e4
LT
1084 default y
1085
1086config ARC_PROMLIB
1087 bool
e2defae5 1088 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
1da177e4
LT
1089 default y
1090
1091config ARC64
1092 bool
1da177e4
LT
1093
1094config BOOT_ELF64
1095 bool
1da177e4 1096
1da177e4
LT
1097menu "CPU selection"
1098
1099choice
1100 prompt "CPU type"
1101 default CPU_R4X00
1102
3702bba5
WZ
1103config CPU_LOONGSON2E
1104 bool "Loongson 2E"
1105 depends on SYS_HAS_CPU_LOONGSON2E
1106 select CPU_LOONGSON2
2a21c730
FZ
1107 help
1108 The Loongson 2E processor implements the MIPS III instruction set
1109 with many extensions.
1110
6f7a251a
WZ
1111 It has an internal FPGA northbridge, which is compatiable to
1112 bonito64.
1113
1114config CPU_LOONGSON2F
1115 bool "Loongson 2F"
1116 depends on SYS_HAS_CPU_LOONGSON2F
1117 select CPU_LOONGSON2
c197da91
AP
1118 select GENERIC_GPIO
1119 select ARCH_REQUIRE_GPIOLIB
6f7a251a
WZ
1120 help
1121 The Loongson 2F processor implements the MIPS III instruction set
1122 with many extensions.
1123
1124 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1125 have a similar programming interface with FPGA northbridge used in
1126 Loongson2E.
1127
6e760c8d
RB
1128config CPU_MIPS32_R1
1129 bool "MIPS32 Release 1"
7cf8053b 1130 depends on SYS_HAS_CPU_MIPS32_R1
6e760c8d 1131 select CPU_HAS_PREFETCH
797798c1 1132 select CPU_SUPPORTS_32BIT_KERNEL
ec28f306 1133 select CPU_SUPPORTS_HIGHMEM
1e5f1caa 1134 help
5e83d430 1135 Choose this option to build a kernel for release 1 or later of the
1e5f1caa
RB
1136 MIPS32 architecture. Most modern embedded systems with a 32-bit
1137 MIPS processor are based on a MIPS32 processor. If you know the
1138 specific type of processor in your system, choose those that one
1139 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1140 Release 2 of the MIPS32 architecture is available since several
1141 years so chances are you even have a MIPS32 Release 2 processor
1142 in which case you should choose CPU_MIPS32_R2 instead for better
1143 performance.
1144
1145config CPU_MIPS32_R2
1146 bool "MIPS32 Release 2"
7cf8053b 1147 depends on SYS_HAS_CPU_MIPS32_R2
1e5f1caa 1148 select CPU_HAS_PREFETCH
797798c1 1149 select CPU_SUPPORTS_32BIT_KERNEL
ec28f306 1150 select CPU_SUPPORTS_HIGHMEM
6e760c8d 1151 help
5e83d430 1152 Choose this option to build a kernel for release 2 or later of the
6e760c8d
RB
1153 MIPS32 architecture. Most modern embedded systems with a 32-bit
1154 MIPS processor are based on a MIPS32 processor. If you know the
1155 specific type of processor in your system, choose those that one
1156 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1157
1158config CPU_MIPS64_R1
1159 bool "MIPS64 Release 1"
7cf8053b 1160 depends on SYS_HAS_CPU_MIPS64_R1
797798c1 1161 select CPU_HAS_PREFETCH
ed5ba2fb
YY
1162 select CPU_SUPPORTS_32BIT_KERNEL
1163 select CPU_SUPPORTS_64BIT_KERNEL
ec28f306 1164 select CPU_SUPPORTS_HIGHMEM
9cffd154 1165 select CPU_SUPPORTS_HUGEPAGES
6e760c8d
RB
1166 help
1167 Choose this option to build a kernel for release 1 or later of the
1168 MIPS64 architecture. Many modern embedded systems with a 64-bit
1169 MIPS processor are based on a MIPS64 processor. If you know the
1170 specific type of processor in your system, choose those that one
1171 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1e5f1caa
RB
1172 Release 2 of the MIPS64 architecture is available since several
1173 years so chances are you even have a MIPS64 Release 2 processor
1174 in which case you should choose CPU_MIPS64_R2 instead for better
1175 performance.
1176
1177config CPU_MIPS64_R2
1178 bool "MIPS64 Release 2"
7cf8053b 1179 depends on SYS_HAS_CPU_MIPS64_R2
797798c1 1180 select CPU_HAS_PREFETCH
1e5f1caa
RB
1181 select CPU_SUPPORTS_32BIT_KERNEL
1182 select CPU_SUPPORTS_64BIT_KERNEL
ec28f306 1183 select CPU_SUPPORTS_HIGHMEM
9cffd154 1184 select CPU_SUPPORTS_HUGEPAGES
1e5f1caa
RB
1185 help
1186 Choose this option to build a kernel for release 2 or later of the
1187 MIPS64 architecture. Many modern embedded systems with a 64-bit
1188 MIPS processor are based on a MIPS64 processor. If you know the
1189 specific type of processor in your system, choose those that one
1190 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1da177e4
LT
1191
1192config CPU_R3000
1193 bool "R3000"
7cf8053b 1194 depends on SYS_HAS_CPU_R3000
f7062ddb 1195 select CPU_HAS_WB
ed5ba2fb 1196 select CPU_SUPPORTS_32BIT_KERNEL
797798c1 1197 select CPU_SUPPORTS_HIGHMEM
1da177e4
LT
1198 help
1199 Please make sure to pick the right CPU type. Linux/MIPS is not
1200 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1201 *not* work on R4000 machines and vice versa. However, since most
1202 of the supported machines have an R4000 (or similar) CPU, R4x00
1203 might be a safe bet. If the resulting kernel does not work,
1204 try to recompile with R3000.
1205
1206config CPU_TX39XX
1207 bool "R39XX"
7cf8053b 1208 depends on SYS_HAS_CPU_TX39XX
ed5ba2fb 1209 select CPU_SUPPORTS_32BIT_KERNEL
1da177e4
LT
1210
1211config CPU_VR41XX
1212 bool "R41xx"
7cf8053b 1213 depends on SYS_HAS_CPU_VR41XX
ed5ba2fb
YY
1214 select CPU_SUPPORTS_32BIT_KERNEL
1215 select CPU_SUPPORTS_64BIT_KERNEL
1da177e4 1216 help
5e83d430 1217 The options selects support for the NEC VR4100 series of processors.
1da177e4
LT
1218 Only choose this option if you have one of these processors as a
1219 kernel built with this option will not run on any other type of
1220 processor or vice versa.
1221
1222config CPU_R4300
1223 bool "R4300"
7cf8053b 1224 depends on SYS_HAS_CPU_R4300
ed5ba2fb
YY
1225 select CPU_SUPPORTS_32BIT_KERNEL
1226 select CPU_SUPPORTS_64BIT_KERNEL
1da177e4
LT
1227 help
1228 MIPS Technologies R4300-series processors.
1229
1230config CPU_R4X00
1231 bool "R4x00"
7cf8053b 1232 depends on SYS_HAS_CPU_R4X00
ed5ba2fb
YY
1233 select CPU_SUPPORTS_32BIT_KERNEL
1234 select CPU_SUPPORTS_64BIT_KERNEL
1da177e4
LT
1235 help
1236 MIPS Technologies R4000-series processors other than 4300, including
1237 the R4000, R4400, R4600, and 4700.
1238
1239config CPU_TX49XX
1240 bool "R49XX"
7cf8053b 1241 depends on SYS_HAS_CPU_TX49XX
de862b48 1242 select CPU_HAS_PREFETCH
ed5ba2fb
YY
1243 select CPU_SUPPORTS_32BIT_KERNEL
1244 select CPU_SUPPORTS_64BIT_KERNEL
1da177e4
LT
1245
1246config CPU_R5000
1247 bool "R5000"
7cf8053b 1248 depends on SYS_HAS_CPU_R5000
ed5ba2fb
YY
1249 select CPU_SUPPORTS_32BIT_KERNEL
1250 select CPU_SUPPORTS_64BIT_KERNEL
1da177e4
LT
1251 help
1252 MIPS Technologies R5000-series processors other than the Nevada.
1253
1254config CPU_R5432
1255 bool "R5432"
7cf8053b 1256 depends on SYS_HAS_CPU_R5432
5e83d430
RB
1257 select CPU_SUPPORTS_32BIT_KERNEL
1258 select CPU_SUPPORTS_64BIT_KERNEL
1da177e4 1259
542c1020
SK
1260config CPU_R5500
1261 bool "R5500"
1262 depends on SYS_HAS_CPU_R5500
542c1020
SK
1263 select CPU_SUPPORTS_32BIT_KERNEL
1264 select CPU_SUPPORTS_64BIT_KERNEL
9cffd154 1265 select CPU_SUPPORTS_HUGEPAGES
542c1020
SK
1266 help
1267 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1268 instruction set.
1269
1da177e4
LT
1270config CPU_R6000
1271 bool "R6000"
ed5ba2fb 1272 depends on EXPERIMENTAL
7cf8053b 1273 depends on SYS_HAS_CPU_R6000
ed5ba2fb 1274 select CPU_SUPPORTS_32BIT_KERNEL
1da177e4
LT
1275 help
1276 MIPS Technologies R6000 and R6000A series processors. Note these
c09b47d8 1277 processors are extremely rare and the support for them is incomplete.
1da177e4
LT
1278
1279config CPU_NEVADA
1280 bool "RM52xx"
7cf8053b 1281 depends on SYS_HAS_CPU_NEVADA
ed5ba2fb
YY
1282 select CPU_SUPPORTS_32BIT_KERNEL
1283 select CPU_SUPPORTS_64BIT_KERNEL
1da177e4
LT
1284 help
1285 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1286
1287config CPU_R8000
1288 bool "R8000"
ed5ba2fb 1289 depends on EXPERIMENTAL
7cf8053b 1290 depends on SYS_HAS_CPU_R8000
5e83d430 1291 select CPU_HAS_PREFETCH
ed5ba2fb 1292 select CPU_SUPPORTS_64BIT_KERNEL
1da177e4
LT
1293 help
1294 MIPS Technologies R8000 processors. Note these processors are
1295 uncommon and the support for them is incomplete.
1296
1297config CPU_R10000
1298 bool "R10000"
7cf8053b 1299 depends on SYS_HAS_CPU_R10000
5e83d430 1300 select CPU_HAS_PREFETCH
ed5ba2fb
YY
1301 select CPU_SUPPORTS_32BIT_KERNEL
1302 select CPU_SUPPORTS_64BIT_KERNEL
797798c1 1303 select CPU_SUPPORTS_HIGHMEM
1da177e4
LT
1304 help
1305 MIPS Technologies R10000-series processors.
1306
1307config CPU_RM7000
1308 bool "RM7000"
7cf8053b 1309 depends on SYS_HAS_CPU_RM7000
5e83d430 1310 select CPU_HAS_PREFETCH
ed5ba2fb
YY
1311 select CPU_SUPPORTS_32BIT_KERNEL
1312 select CPU_SUPPORTS_64BIT_KERNEL
797798c1 1313 select CPU_SUPPORTS_HIGHMEM
1da177e4
LT
1314
1315config CPU_RM9000
1316 bool "RM9000"
7cf8053b 1317 depends on SYS_HAS_CPU_RM9000
5e83d430 1318 select CPU_HAS_PREFETCH
ed5ba2fb
YY
1319 select CPU_SUPPORTS_32BIT_KERNEL
1320 select CPU_SUPPORTS_64BIT_KERNEL
797798c1 1321 select CPU_SUPPORTS_HIGHMEM
0004a9df 1322 select WEAK_ORDERING
1da177e4
LT
1323
1324config CPU_SB1
1325 bool "SB1"
7cf8053b 1326 depends on SYS_HAS_CPU_SB1
ed5ba2fb
YY
1327 select CPU_SUPPORTS_32BIT_KERNEL
1328 select CPU_SUPPORTS_64BIT_KERNEL
797798c1 1329 select CPU_SUPPORTS_HIGHMEM
0004a9df 1330 select WEAK_ORDERING
1da177e4 1331
a86c7f72
DD
1332config CPU_CAVIUM_OCTEON
1333 bool "Cavium Octeon processor"
5e683389 1334 depends on SYS_HAS_CPU_CAVIUM_OCTEON
a86c7f72
DD
1335 select IRQ_CPU
1336 select IRQ_CPU_OCTEON
1337 select CPU_HAS_PREFETCH
1338 select CPU_SUPPORTS_64BIT_KERNEL
1339 select SYS_SUPPORTS_SMP
1340 select NR_CPUS_DEFAULT_16
1341 select WEAK_ORDERING
a86c7f72 1342 select CPU_SUPPORTS_HIGHMEM
9cffd154 1343 select CPU_SUPPORTS_HUGEPAGES
a86c7f72
DD
1344 help
1345 The Cavium Octeon processor is a highly integrated chip containing
1346 many ethernet hardware widgets for networking tasks. The processor
1347 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1348 Full details can be found at http://www.caviumnetworks.com.
1349
c1c0c461
KC
1350config CPU_BMIPS3300
1351 bool "BMIPS3300"
1352 depends on SYS_HAS_CPU_BMIPS3300
1353 select DMA_NONCOHERENT
1354 select IRQ_CPU
1355 select SWAP_IO_SPACE
1356 select SYS_SUPPORTS_32BIT_KERNEL
1357 select WEAK_ORDERING
1358 help
1359 Broadcom BMIPS3300 processors.
1360
1361config CPU_BMIPS4350
1362 bool "BMIPS4350"
1363 depends on SYS_HAS_CPU_BMIPS4350
1364 select CPU_SUPPORTS_32BIT_KERNEL
1365 select DMA_NONCOHERENT
1366 select IRQ_CPU
1367 select SWAP_IO_SPACE
1368 select SYS_SUPPORTS_SMP
1369 select SYS_SUPPORTS_HOTPLUG_CPU
1370 select WEAK_ORDERING
1371 help
1372 Broadcom BMIPS4350 ("VIPER") processors.
1373
1374config CPU_BMIPS4380
1375 bool "BMIPS4380"
1376 depends on SYS_HAS_CPU_BMIPS4380
1377 select CPU_SUPPORTS_32BIT_KERNEL
1378 select DMA_NONCOHERENT
1379 select IRQ_CPU
1380 select SWAP_IO_SPACE
1381 select SYS_SUPPORTS_SMP
1382 select SYS_SUPPORTS_HOTPLUG_CPU
1383 select WEAK_ORDERING
1384 help
1385 Broadcom BMIPS4380 processors.
1386
1387config CPU_BMIPS5000
1388 bool "BMIPS5000"
1389 depends on SYS_HAS_CPU_BMIPS5000
1390 select CPU_SUPPORTS_32BIT_KERNEL
1391 select CPU_SUPPORTS_HIGHMEM
1392 select DMA_NONCOHERENT
1393 select IRQ_CPU
1394 select SWAP_IO_SPACE
1395 select SYS_SUPPORTS_SMP
1396 select SYS_SUPPORTS_HOTPLUG_CPU
1397 select WEAK_ORDERING
1398 help
1399 Broadcom BMIPS5000 processors.
1400
1da177e4
LT
1401endchoice
1402
622844bf
WZ
1403if CPU_LOONGSON2F
1404config CPU_NOP_WORKAROUNDS
1405 bool
1406
1407config CPU_JUMP_WORKAROUNDS
1408 bool
1409
1410config CPU_LOONGSON2F_WORKAROUNDS
1411 bool "Loongson 2F Workarounds"
1412 default y
1413 select CPU_NOP_WORKAROUNDS
1414 select CPU_JUMP_WORKAROUNDS
1415 help
1416 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1417 require workarounds. Without workarounds the system may hang
1418 unexpectedly. For more information please refer to the gas
1419 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1420
1421 Loongson 2F03 and later have fixed these issues and no workarounds
1422 are needed. The workarounds have no significant side effect on them
1423 but may decrease the performance of the system so this option should
1424 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1425 systems.
1426
1427 If unsure, please say Y.
1428endif # CPU_LOONGSON2F
1429
1b93b3c3
WZ
1430config SYS_SUPPORTS_ZBOOT
1431 bool
1432 select HAVE_KERNEL_GZIP
1433 select HAVE_KERNEL_BZIP2
1434 select HAVE_KERNEL_LZMA
fe1d45e0 1435 select HAVE_KERNEL_LZO
1b93b3c3
WZ
1436
1437config SYS_SUPPORTS_ZBOOT_UART16550
1438 bool
1439 select SYS_SUPPORTS_ZBOOT
1440
3702bba5
WZ
1441config CPU_LOONGSON2
1442 bool
1443 select CPU_SUPPORTS_32BIT_KERNEL
1444 select CPU_SUPPORTS_64BIT_KERNEL
1445 select CPU_SUPPORTS_HIGHMEM
1446
1447config SYS_HAS_CPU_LOONGSON2E
2a21c730
FZ
1448 bool
1449
6f7a251a
WZ
1450config SYS_HAS_CPU_LOONGSON2F
1451 bool
55045ff5
WZ
1452 select CPU_SUPPORTS_CPUFREQ
1453 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
22f1fdfd 1454 select CPU_SUPPORTS_UNCACHED_ACCELERATED
6f7a251a 1455
7cf8053b
RB
1456config SYS_HAS_CPU_MIPS32_R1
1457 bool
1458
1459config SYS_HAS_CPU_MIPS32_R2
1460 bool
1461
1462config SYS_HAS_CPU_MIPS64_R1
1463 bool
1464
1465config SYS_HAS_CPU_MIPS64_R2
1466 bool
1467
1468config SYS_HAS_CPU_R3000
1469 bool
1470
1471config SYS_HAS_CPU_TX39XX
1472 bool
1473
1474config SYS_HAS_CPU_VR41XX
1475 bool
1476
1477config SYS_HAS_CPU_R4300
1478 bool
1479
1480config SYS_HAS_CPU_R4X00
1481 bool
1482
1483config SYS_HAS_CPU_TX49XX
1484 bool
1485
1486config SYS_HAS_CPU_R5000
1487 bool
1488
1489config SYS_HAS_CPU_R5432
1490 bool
1491
542c1020
SK
1492config SYS_HAS_CPU_R5500
1493 bool
1494
7cf8053b
RB
1495config SYS_HAS_CPU_R6000
1496 bool
1497
1498config SYS_HAS_CPU_NEVADA
1499 bool
1500
1501config SYS_HAS_CPU_R8000
1502 bool
1503
1504config SYS_HAS_CPU_R10000
1505 bool
1506
1507config SYS_HAS_CPU_RM7000
1508 bool
1509
1510config SYS_HAS_CPU_RM9000
1511 bool
1512
1513config SYS_HAS_CPU_SB1
1514 bool
1515
5e683389
DD
1516config SYS_HAS_CPU_CAVIUM_OCTEON
1517 bool
1518
c1c0c461
KC
1519config SYS_HAS_CPU_BMIPS3300
1520 bool
1521
1522config SYS_HAS_CPU_BMIPS4350
1523 bool
1524
1525config SYS_HAS_CPU_BMIPS4380
1526 bool
1527
1528config SYS_HAS_CPU_BMIPS5000
1529 bool
1530
17099b11
RB
1531#
1532# CPU may reorder R->R, R->W, W->R, W->W
1533# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1534#
0004a9df
RB
1535config WEAK_ORDERING
1536 bool
17099b11
RB
1537
1538#
1539# CPU may reorder reads and writes beyond LL/SC
1540# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1541#
1542config WEAK_REORDERING_BEYOND_LLSC
1543 bool
5e83d430
RB
1544endmenu
1545
1546#
c09b47d8 1547# These two indicate any level of the MIPS32 and MIPS64 architecture
5e83d430
RB
1548#
1549config CPU_MIPS32
1550 bool
1551 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2
1552
1553config CPU_MIPS64
1554 bool
1555 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
1556
1557#
c09b47d8 1558# These two indicate the revision of the architecture, either Release 1 or Release 2
5e83d430
RB
1559#
1560config CPU_MIPSR1
1561 bool
1562 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1563
1564config CPU_MIPSR2
1565 bool
a86c7f72 1566 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
5e83d430
RB
1567
1568config SYS_SUPPORTS_32BIT_KERNEL
1569 bool
1570config SYS_SUPPORTS_64BIT_KERNEL
1571 bool
1572config CPU_SUPPORTS_32BIT_KERNEL
1573 bool
1574config CPU_SUPPORTS_64BIT_KERNEL
1575 bool
55045ff5
WZ
1576config CPU_SUPPORTS_CPUFREQ
1577 bool
1578config CPU_SUPPORTS_ADDRWINCFG
1579 bool
9cffd154
DD
1580config CPU_SUPPORTS_HUGEPAGES
1581 bool
22f1fdfd
WZ
1582config CPU_SUPPORTS_UNCACHED_ACCELERATED
1583 bool
82622284
DD
1584config MIPS_PGD_C0_CONTEXT
1585 bool
1586 default y if 64BIT && CPU_MIPSR2
5e83d430 1587
8192c9ea
DD
1588#
1589# Set to y for ptrace access to watch registers.
1590#
1591config HARDWARE_WATCHPOINTS
1592 bool
f839490a 1593 default y if CPU_MIPSR1 || CPU_MIPSR2
8192c9ea 1594
5e83d430
RB
1595menu "Kernel type"
1596
1597choice
1598
1599 prompt "Kernel code model"
1600 help
1601 You should only select this option if you have a workload that
1602 actually benefits from 64-bit processing or if your machine has
1603 large memory. You will only be presented a single option in this
1604 menu if your system does not support both 32-bit and 64-bit kernels.
1605
1606config 32BIT
1607 bool "32-bit kernel"
1608 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
1609 select TRAD_SIGNALS
1610 help
1611 Select this option if you want to build a 32-bit kernel.
1612config 64BIT
1613 bool "64-bit kernel"
1614 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
dbda6ac0 1615 select HAVE_SYSCALL_WRAPPERS
5e83d430
RB
1616 help
1617 Select this option if you want to build a 64-bit kernel.
1618
1619endchoice
1620
1da177e4
LT
1621choice
1622 prompt "Kernel page size"
1623 default PAGE_SIZE_4KB
1624
1625config PAGE_SIZE_4KB
1626 bool "4kB"
315fe625 1627 depends on !CPU_LOONGSON2
1da177e4
LT
1628 help
1629 This option select the standard 4kB Linux page size. On some
1630 R3000-family processors this is the only available page size. Using
1631 4kB page size will minimize memory consumption and is therefore
1632 recommended for low memory systems.
1633
1634config PAGE_SIZE_8KB
1635 bool "8kB"
c52399be 1636 depends on (EXPERIMENTAL && CPU_R8000) || CPU_CAVIUM_OCTEON
1da177e4
LT
1637 help
1638 Using 8kB page size will result in higher performance kernel at
1639 the price of higher memory consumption. This option is available
c52399be
RB
1640 only on R8000 and cnMIPS processors. Note that you will need a
1641 suitable Linux distribution to support this.
1da177e4
LT
1642
1643config PAGE_SIZE_16KB
1644 bool "16kB"
714bfad6 1645 depends on !CPU_R3000 && !CPU_TX39XX
1da177e4
LT
1646 help
1647 Using 16kB page size will result in higher performance kernel at
1648 the price of higher memory consumption. This option is available on
714bfad6
RB
1649 all non-R3000 family processors. Note that you will need a suitable
1650 Linux distribution to support this.
1da177e4 1651
c52399be
RB
1652config PAGE_SIZE_32KB
1653 bool "32kB"
1654 depends on CPU_CAVIUM_OCTEON
1655 help
1656 Using 32kB page size will result in higher performance kernel at
1657 the price of higher memory consumption. This option is available
1658 only on cnMIPS cores. Note that you will need a suitable Linux
1659 distribution to support this.
1660
1da177e4
LT
1661config PAGE_SIZE_64KB
1662 bool "64kB"
1663 depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX
1664 help
1665 Using 64kB page size will result in higher performance kernel at
1666 the price of higher memory consumption. This option is available on
1667 all non-R3000 family processor. Not that at the time of this
714bfad6 1668 writing this option is still high experimental.
1da177e4
LT
1669
1670endchoice
1671
c9bace7c
DD
1672config FORCE_MAX_ZONEORDER
1673 int "Maximum zone order"
1674 range 13 64 if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_32KB
1675 default "13" if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_32KB
1676 range 12 64 if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_16KB
1677 default "12" if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_16KB
1678 range 11 64
1679 default "11"
1680 help
1681 The kernel memory allocator divides physically contiguous memory
1682 blocks into "zones", where each zone is a power of two number of
1683 pages. This option selects the largest power of two that the kernel
1684 keeps in the memory allocator. If you need to allocate very large
1685 blocks of physically contiguous memory, then you may need to
1686 increase this value.
1687
1688 This config option is actually maximum order plus one. For example,
1689 a value of 11 means that the largest free memory block is 2^10 pages.
1690
1691 The page size is not necessarily 4KB. Keep this in mind
1692 when choosing a value for this option.
1693
1da177e4
LT
1694config BOARD_SCACHE
1695 bool
1696
1697config IP22_CPU_SCACHE
1698 bool
1699 select BOARD_SCACHE
1700
9318c51a
CD
1701#
1702# Support for a MIPS32 / MIPS64 style S-caches
1703#
1704config MIPS_CPU_SCACHE
1705 bool
1706 select BOARD_SCACHE
1707
1da177e4
LT
1708config R5000_CPU_SCACHE
1709 bool
1710 select BOARD_SCACHE
1711
1712config RM7000_CPU_SCACHE
1713 bool
1714 select BOARD_SCACHE
1715
1716config SIBYTE_DMA_PAGEOPS
1717 bool "Use DMA to clear/copy pages"
1718 depends on CPU_SB1
1719 help
1720 Instead of using the CPU to zero and copy pages, use a Data Mover
1721 channel. These DMA channels are otherwise unused by the standard
1722 SiByte Linux port. Seems to give a small performance benefit.
1723
1724config CPU_HAS_PREFETCH
c8094b53 1725 bool
1da177e4 1726
340ee4b9
RB
1727choice
1728 prompt "MIPS MT options"
f41ae0b2
RB
1729
1730config MIPS_MT_DISABLED
1731 bool "Disable multithreading support."
1732 help
1733 Use this option if your workload can't take advantage of
1734 MIPS hardware multithreading support. On systems that don't have
1735 the option of an MT-enabled processor this option will be the only
1736 option in this menu.
340ee4b9 1737
59d6ab86
RB
1738config MIPS_MT_SMP
1739 bool "Use 1 TC on each available VPE for SMP"
f41ae0b2 1740 depends on SYS_SUPPORTS_MULTITHREADING
f7062ddb 1741 select CPU_MIPSR2_IRQ_VI
d725cf38 1742 select CPU_MIPSR2_IRQ_EI
f41ae0b2 1743 select MIPS_MT
f510aa3b 1744 select NR_CPUS_DEFAULT_2
41c594ab 1745 select SMP
0ab7aefc 1746 select SYS_SUPPORTS_SCHED_SMT if SMP
73b76c78 1747 select SYS_SUPPORTS_SMP
87353d8a 1748 select SMP_UP
f41ae0b2 1749 help
25f12b33
RB
1750 This is a kernel model which is known a VSMP but lately has been
1751 marketesed into SMVP.
1752 Virtual SMP uses the processor's VPEs to implement virtual
1753 processors. In currently available configuration of the 34K processor
1754 this allows for a dual processor. Both processors will share the same
1755 primary caches; each will obtain the half of the TLB for it's own
1756 exclusive use. For a layman this model can be described as similar to
1757 what Intel calls Hyperthreading.
1758
1759 For further information see http://www.linux-mips.org/wiki/34K#VSMP
41c594ab 1760
59d6ab86
RB
1761config MIPS_MT_SMTC
1762 bool "SMTC: Use all TCs on all VPEs for SMP"
1763 depends on CPU_MIPS32_R2
1764 #depends on CPU_MIPS64_R2 # once there is hardware ...
f41ae0b2
RB
1765 depends on SYS_SUPPORTS_MULTITHREADING
1766 select CPU_MIPSR2_IRQ_VI
d725cf38 1767 select CPU_MIPSR2_IRQ_EI
f41ae0b2 1768 select MIPS_MT
130e2fb7 1769 select NR_CPUS_DEFAULT_8
340ee4b9 1770 select SMP
73b76c78 1771 select SYS_SUPPORTS_SMP
87353d8a 1772 select SMP_UP
f41ae0b2 1773 help
59d6ab86
RB
1774 This is a kernel model which is known a SMTC or lately has been
1775 marketesed into SMVP.
25f12b33
RB
1776 is presenting the available TC's of the core as processors to Linux.
1777 On currently available 34K processors this means a Linux system will
1778 see up to 5 processors. The implementation of the SMTC kernel differs
1779 significantly from VSMP and cannot efficiently coexist in the same
1780 kernel binary so the choice between VSMP and SMTC is a compile time
1781 decision.
1782
1783 For further information see http://www.linux-mips.org/wiki/34K#SMTC
340ee4b9 1784
340ee4b9
RB
1785endchoice
1786
f41ae0b2
RB
1787config MIPS_MT
1788 bool
1789
0ab7aefc
RB
1790config SCHED_SMT
1791 bool "SMT (multithreading) scheduler support"
1792 depends on SYS_SUPPORTS_SCHED_SMT
1793 default n
1794 help
1795 SMT scheduler support improves the CPU scheduler's decision making
1796 when dealing with MIPS MT enabled cores at a cost of slightly
1797 increased overhead in some places. If unsure say N here.
1798
1799config SYS_SUPPORTS_SCHED_SMT
1800 bool
1801
1802
f41ae0b2
RB
1803config SYS_SUPPORTS_MULTITHREADING
1804 bool
1805
f088fc84
RB
1806config MIPS_MT_FPAFF
1807 bool "Dynamic FPU affinity for FP-intensive threads"
f088fc84 1808 default y
07cc0c9e
RB
1809 depends on MIPS_MT_SMP || MIPS_MT_SMTC
1810
1811config MIPS_VPE_LOADER
1812 bool "VPE loader support."
1813 depends on SYS_SUPPORTS_MULTITHREADING
1814 select CPU_MIPSR2_IRQ_VI
1815 select CPU_MIPSR2_IRQ_EI
07cc0c9e
RB
1816 select MIPS_MT
1817 help
1818 Includes a loader for loading an elf relocatable object
1819 onto another VPE and running it.
f088fc84 1820
0db34215
KK
1821config MIPS_MT_SMTC_IM_BACKSTOP
1822 bool "Use per-TC register bits as backstop for inhibited IM bits"
1823 depends on MIPS_MT_SMTC
8531a35e 1824 default n
0db34215
KK
1825 help
1826 To support multiple TC microthreads acting as "CPUs" within
1827 a VPE, VPE-wide interrupt mask bits must be specially manipulated
1828 during interrupt handling. To support legacy drivers and interrupt
1829 controller management code, SMTC has a "backstop" to track and
1830 if necessary restore the interrupt mask. This has some performance
8531a35e 1831 impact on interrupt service overhead.
0db34215 1832
f571eff0
KK
1833config MIPS_MT_SMTC_IRQAFF
1834 bool "Support IRQ affinity API"
1835 depends on MIPS_MT_SMTC
1836 default n
1837 help
1838 Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.)
1839 for SMTC Linux kernel. Requires platform support, of which
1840 an example can be found in the MIPS kernel i8259 and Malta
8531a35e
KK
1841 platform code. Adds some overhead to interrupt dispatch, and
1842 should be used only if you know what you are doing.
f571eff0 1843
e01402b1
RB
1844config MIPS_VPE_LOADER_TOM
1845 bool "Load VPE program into memory hidden from linux"
1846 depends on MIPS_VPE_LOADER
1847 default y
1848 help
1849 The loader can use memory that is present but has been hidden from
1850 Linux using the kernel command line option "mem=xxMB". It's up to
1851 you to ensure the amount you put in the option and the space your
1852 program requires is less or equal to the amount physically present.
1853
1854# this should possibly be in drivers/char, but it is rather cpu related. Hmmm
1855config MIPS_VPE_APSP_API
5e83d430
RB
1856 bool "Enable support for AP/SP API (RTLX)"
1857 depends on MIPS_VPE_LOADER
1858 help
e01402b1 1859
2600990e
RB
1860config MIPS_APSP_KSPD
1861 bool "Enable KSPD"
1862 depends on MIPS_VPE_APSP_API
1863 default y
1864 help
1865 KSPD is a kernel daemon that accepts syscall requests from the SP
1866 side, actions them and returns the results. It also handles the
1867 "exit" syscall notifying other kernel modules the SP program is
1868 exiting. You probably want to say yes here.
1869
4a16ff4c
RB
1870config MIPS_CMP
1871 bool "MIPS CMP framework support"
1872 depends on SYS_SUPPORTS_MIPS_CMP
eb9b5141 1873 select SYNC_R4K
4a16ff4c
RB
1874 select SYS_SUPPORTS_SMP
1875 select SYS_SUPPORTS_SCHED_SMT if SMP
1876 select WEAK_ORDERING
1877 default n
1878 help
1879 This is a placeholder option for the GCMP work. It will need to
1880 be handled differently...
1881
1da177e4
LT
1882config SB1_PASS_1_WORKAROUNDS
1883 bool
1884 depends on CPU_SB1_PASS_1
1885 default y
1886
1887config SB1_PASS_2_WORKAROUNDS
1888 bool
1889 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
1890 default y
1891
1892config SB1_PASS_2_1_WORKAROUNDS
1893 bool
1894 depends on CPU_SB1 && CPU_SB1_PASS_2
1895 default y
1896
1897config 64BIT_PHYS_ADDR
d806cb2b 1898 bool
1da177e4 1899
60ec6571 1900config ARCH_PHYS_ADDR_T_64BIT
1901 def_bool 64BIT_PHYS_ADDR
1902
9693a853
FBH
1903config CPU_HAS_SMARTMIPS
1904 depends on SYS_SUPPORTS_SMARTMIPS
1905 bool "Support for the SmartMIPS ASE"
1906 help
1907 SmartMIPS is a extension of the MIPS32 architecture aimed at
1908 increased security at both hardware and software level for
1909 smartcards. Enabling this option will allow proper use of the
1910 SmartMIPS instructions by Linux applications. However a kernel with
1911 this option will not work on a MIPS core without SmartMIPS core. If
1912 you don't know you probably don't have SmartMIPS and should say N
1913 here.
1914
1da177e4 1915config CPU_HAS_WB
f7062ddb 1916 bool
e01402b1 1917
f41ae0b2
RB
1918#
1919# Vectored interrupt mode is an R2 feature
1920#
e01402b1 1921config CPU_MIPSR2_IRQ_VI
f41ae0b2 1922 bool
e01402b1 1923
f41ae0b2
RB
1924#
1925# Extended interrupt mode is an R2 feature
1926#
e01402b1 1927config CPU_MIPSR2_IRQ_EI
f41ae0b2 1928 bool
e01402b1 1929
1da177e4
LT
1930config CPU_HAS_SYNC
1931 bool
1932 depends on !CPU_R3000
1933 default y
1934
ea580401
RB
1935config GENERIC_CLOCKEVENTS_BROADCAST
1936 bool
1937
20d60d99
MR
1938#
1939# CPU non-features
1940#
1941config CPU_DADDI_WORKAROUNDS
1942 bool
1943
1944config CPU_R4000_WORKAROUNDS
1945 bool
1946 select CPU_R4400_WORKAROUNDS
1947
1948config CPU_R4400_WORKAROUNDS
1949 bool
1950
1da177e4
LT
1951#
1952# - Highmem only makes sense for the 32-bit kernel.
1953# - The current highmem code will only work properly on physically indexed
1954# caches such as R3000, SB1, R7000 or those that look like they're virtually
1955# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
1956# moment we protect the user and offer the highmem option only on machines
1957# where it's known to be safe. This will not offer highmem on a few systems
1958# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
1959# indexed CPUs but we're playing safe.
797798c1
RB
1960# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
1961# know they might have memory configurations that could make use of highmem
1962# support.
1da177e4
LT
1963#
1964config HIGHMEM
1965 bool "High Memory Support"
797798c1
RB
1966 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM
1967
1968config CPU_SUPPORTS_HIGHMEM
1969 bool
1970
1971config SYS_SUPPORTS_HIGHMEM
1972 bool
1da177e4 1973
9693a853
FBH
1974config SYS_SUPPORTS_SMARTMIPS
1975 bool
1976
b4819b59
YY
1977config ARCH_FLATMEM_ENABLE
1978 def_bool y
f133f22d 1979 depends on !NUMA && !CPU_LOONGSON2
b4819b59 1980
d8cb4e11
RB
1981config ARCH_DISCONTIGMEM_ENABLE
1982 bool
1983 default y if SGI_IP27
1984 help
3dde6ad8 1985 Say Y to support efficient handling of discontiguous physical memory,
d8cb4e11
RB
1986 for architectures which are either NUMA (Non-Uniform Memory Access)
1987 or have huge holes in the physical address space for other reasons.
1988 See <file:Documentation/vm/numa> for more.
1989
cce335ae
RB
1990config ARCH_POPULATES_NODE_MAP
1991 def_bool y
1992
31473747
AN
1993config ARCH_SPARSEMEM_ENABLE
1994 bool
7de58fab 1995 select SPARSEMEM_STATIC
31473747 1996
d8cb4e11
RB
1997config NUMA
1998 bool "NUMA Support"
1999 depends on SYS_SUPPORTS_NUMA
2000 help
2001 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2002 Access). This option improves performance on systems with more
2003 than two nodes; on two node systems it is generally better to
2004 leave it disabled; on single node systems disable this option
2005 disabled.
2006
2007config SYS_SUPPORTS_NUMA
2008 bool
2009
c80d79d7
YG
2010config NODES_SHIFT
2011 int
2012 default "6"
2013 depends on NEED_MULTIPLE_NODES
2014
14f70012
DZ
2015config HW_PERF_EVENTS
2016 bool "Enable hardware performance counter support for perf events"
2017 depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && CPU_MIPS32
2018 default y
2019 help
2020 Enable hardware performance counter support for perf events. If
2021 disabled, perf events will use software events only.
2022
b4819b59
YY
2023source "mm/Kconfig"
2024
1da177e4
LT
2025config SMP
2026 bool "Multi-Processing support"
e73ea273 2027 depends on SYS_SUPPORTS_SMP
b4b30a5a 2028 select IRQ_PER_CPU
2f304c0a 2029 select USE_GENERIC_SMP_HELPERS
e73ea273 2030 help
1da177e4
LT
2031 This enables support for systems with more than one CPU. If you have
2032 a system with only one CPU, like most personal computers, say N. If
2033 you have a system with more than one CPU, say Y.
2034
2035 If you say N here, the kernel will run on single and multiprocessor
2036 machines, but will use only one CPU of a multiprocessor machine. If
2037 you say Y here, the kernel will run on many, but not all,
2038 singleprocessor machines. On a singleprocessor machine, the kernel
2039 will run faster if you say N here.
2040
2041 People using multiprocessor machines who say Y here should also say
2042 Y to "Enhanced Real Time Clock Support", below.
2043
03502faa
AB
2044 See also the SMP-HOWTO available at
2045 <http://www.tldp.org/docs.html#howto>.
1da177e4
LT
2046
2047 If you don't know what to do here, say N.
2048
87353d8a
RB
2049config SMP_UP
2050 bool
2051
4a16ff4c
RB
2052config SYS_SUPPORTS_MIPS_CMP
2053 bool
2054
e73ea273
RB
2055config SYS_SUPPORTS_SMP
2056 bool
2057
72ede9b1
AN
2058config NR_CPUS_DEFAULT_1
2059 bool
2060
130e2fb7
RB
2061config NR_CPUS_DEFAULT_2
2062 bool
2063
2064config NR_CPUS_DEFAULT_4
2065 bool
2066
2067config NR_CPUS_DEFAULT_8
2068 bool
2069
2070config NR_CPUS_DEFAULT_16
2071 bool
2072
2073config NR_CPUS_DEFAULT_32
2074 bool
2075
2076config NR_CPUS_DEFAULT_64
2077 bool
2078
1da177e4
LT
2079config NR_CPUS
2080 int "Maximum number of CPUs (2-64)"
72ede9b1 2081 range 1 64 if NR_CPUS_DEFAULT_1
1da177e4 2082 depends on SMP
72ede9b1 2083 default "1" if NR_CPUS_DEFAULT_1
130e2fb7
RB
2084 default "2" if NR_CPUS_DEFAULT_2
2085 default "4" if NR_CPUS_DEFAULT_4
2086 default "8" if NR_CPUS_DEFAULT_8
2087 default "16" if NR_CPUS_DEFAULT_16
2088 default "32" if NR_CPUS_DEFAULT_32
2089 default "64" if NR_CPUS_DEFAULT_64
1da177e4
LT
2090 help
2091 This allows you to specify the maximum number of CPUs which this
2092 kernel will support. The maximum supported value is 32 for 32-bit
2093 kernel and 64 for 64-bit kernels; the minimum value which makes
72ede9b1
AN
2094 sense is 1 for Qemu (useful only for kernel debugging purposes)
2095 and 2 for all others.
1da177e4
LT
2096
2097 This is purely to save memory - each supported CPU adds
72ede9b1
AN
2098 approximately eight kilobytes to the kernel image. For best
2099 performance should round up your number of processors to the next
2100 power of two.
1da177e4 2101
c4eee283
AN
2102source "kernel/time/Kconfig"
2103
1723b4a3
AN
2104#
2105# Timer Interrupt Frequency Configuration
2106#
2107
2108choice
2109 prompt "Timer frequency"
2110 default HZ_250
2111 help
2112 Allows the configuration of the timer frequency.
2113
2114 config HZ_48
0f873585 2115 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
1723b4a3
AN
2116
2117 config HZ_100
2118 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2119
2120 config HZ_128
2121 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2122
2123 config HZ_250
2124 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2125
2126 config HZ_256
2127 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2128
2129 config HZ_1000
2130 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2131
2132 config HZ_1024
2133 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2134
2135endchoice
2136
2137config SYS_SUPPORTS_48HZ
2138 bool
2139
2140config SYS_SUPPORTS_100HZ
2141 bool
2142
2143config SYS_SUPPORTS_128HZ
2144 bool
2145
2146config SYS_SUPPORTS_250HZ
2147 bool
2148
2149config SYS_SUPPORTS_256HZ
2150 bool
2151
2152config SYS_SUPPORTS_1000HZ
2153 bool
2154
2155config SYS_SUPPORTS_1024HZ
2156 bool
2157
2158config SYS_SUPPORTS_ARBIT_HZ
2159 bool
2160 default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \
2161 !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \
2162 !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \
2163 !SYS_SUPPORTS_1024HZ
2164
2165config HZ
2166 int
2167 default 48 if HZ_48
2168 default 100 if HZ_100
2169 default 128 if HZ_128
2170 default 250 if HZ_250
2171 default 256 if HZ_256
2172 default 1000 if HZ_1000
2173 default 1024 if HZ_1024
2174
e80de850 2175source "kernel/Kconfig.preempt"
1da177e4 2176
1da177e4
LT
2177config MIPS_INSANE_LARGE
2178 bool "Support for large 64-bit configurations"
875d43e7 2179 depends on CPU_R10000 && 64BIT
1da177e4
LT
2180 help
2181 MIPS R10000 does support a 44 bit / 16TB address space as opposed to
2182 previous 64-bit processors which only supported 40 bit / 1TB. If you
2183 need processes of more than 1TB virtual address space, say Y here.
2184 This will result in additional memory usage, so it is not
2185 recommended for normal users.
2186
ea6e942b
AN
2187config KEXEC
2188 bool "Kexec system call (EXPERIMENTAL)"
2189 depends on EXPERIMENTAL
2190 help
2191 kexec is a system call that implements the ability to shutdown your
2192 current kernel, and to start another kernel. It is like a reboot
3dde6ad8 2193 but it is independent of the system firmware. And like a reboot
ea6e942b
AN
2194 you can start any kernel with it, not just Linux.
2195
01dd2fbf 2196 The name comes from the similarity to the exec system call.
ea6e942b
AN
2197
2198 It is an ongoing process to be certain the hardware in a machine
2199 is properly shutdown, so do not be surprised if this code does not
2200 initially work for you. It may help to enable device hotplugging
2201 support. As of this writing the exact hardware interface is
2202 strongly in flux, so no good recommendation can be made.
2203
2204config SECCOMP
2205 bool "Enable seccomp to safely compute untrusted bytecode"
293c5bd1 2206 depends on PROC_FS
ea6e942b
AN
2207 default y
2208 help
2209 This kernel feature is useful for number crunching applications
2210 that may need to compute untrusted bytecode during their
2211 execution. By using pipes or other transports made available to
2212 the process as file descriptors supporting the read/write
2213 syscalls, it's possible to isolate those applications in
2214 their own address space using seccomp. Once seccomp is
2215 enabled via /proc/<pid>/seccomp, it cannot be disabled
2216 and the task is only allowed to execute a few safe syscalls
2217 defined by each seccomp mode.
2218
2219 If unsure, say Y. Only embedded should say N here.
2220
f2ffa5ab
DD
2221config USE_OF
2222 bool "Flattened Device Tree support"
2223 select OF
e6ce1324 2224 select OF_EARLY_FLATTREE
f2ffa5ab
DD
2225 help
2226 Include support for flattened device tree machine descriptions.
2227
5e83d430
RB
2228endmenu
2229
1df0f0ff
AN
2230config LOCKDEP_SUPPORT
2231 bool
2232 default y
2233
2234config STACKTRACE_SUPPORT
2235 bool
2236 default y
2237
b6c3539b
RB
2238source "init/Kconfig"
2239
dc52ddc0
MH
2240source "kernel/Kconfig.freezer"
2241
1da177e4
LT
2242menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
2243
5e83d430
RB
2244config HW_HAS_EISA
2245 bool
1da177e4
LT
2246config HW_HAS_PCI
2247 bool
2248
2249config PCI
2250 bool "Support for PCI controller"
2251 depends on HW_HAS_PCI
abb4ae46 2252 select PCI_DOMAINS
1da177e4
LT
2253 help
2254 Find out whether you have a PCI motherboard. PCI is the name of a
2255 bus system, i.e. the way the CPU talks to the other stuff inside
2256 your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
2257 say Y, otherwise N.
2258
1da177e4
LT
2259config PCI_DOMAINS
2260 bool
1da177e4
LT
2261
2262source "drivers/pci/Kconfig"
2263
2264#
2265# ISA support is now enabled via select. Too many systems still have the one
2266# or other ISA chip on the board that users don't know about so don't expect
2267# users to choose the right thing ...
2268#
2269config ISA
2270 bool
2271
2272config EISA
2273 bool "EISA support"
5e83d430 2274 depends on HW_HAS_EISA
1da177e4 2275 select ISA
aa414dff 2276 select GENERIC_ISA_DMA
1da177e4
LT
2277 ---help---
2278 The Extended Industry Standard Architecture (EISA) bus was
2279 developed as an open alternative to the IBM MicroChannel bus.
2280
2281 The EISA bus provided some of the features of the IBM MicroChannel
2282 bus while maintaining backward compatibility with cards made for
2283 the older ISA bus. The EISA bus saw limited use between 1988 and
2284 1995 when it was made obsolete by the PCI bus.
2285
2286 Say Y here if you are building a kernel for an EISA-based machine.
2287
2288 Otherwise, say N.
2289
2290source "drivers/eisa/Kconfig"
2291
2292config TC
2293 bool "TURBOchannel support"
2294 depends on MACH_DECSTATION
2295 help
50a23e6e
JM
2296 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
2297 processors. TURBOchannel programming specifications are available
2298 at:
2299 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
2300 and:
2301 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
2302 Linux driver support status is documented at:
2303 <http://www.linux-mips.org/wiki/DECstation>
1da177e4
LT
2304
2305#config ACCESSBUS
2306# bool "Access.Bus support"
2307# depends on TC
2308
2309config MMU
2310 bool
2311 default y
2312
d865bea4
RB
2313config I8253
2314 bool
9726b43a 2315 select MIPS_EXTERNAL_TIMER
d865bea4 2316
cce335ae
RB
2317config ZONE_DMA32
2318 bool
2319
1da177e4
LT
2320source "drivers/pcmcia/Kconfig"
2321
2322source "drivers/pci/hotplug/Kconfig"
2323
2324endmenu
2325
2326menu "Executable file formats"
2327
2328source "fs/Kconfig.binfmt"
2329
2330config TRAD_SIGNALS
2331 bool
1da177e4 2332
1da177e4
LT
2333config MIPS32_COMPAT
2334 bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
875d43e7 2335 depends on 64BIT
1da177e4
LT
2336 help
2337 Select this option if you want Linux/MIPS 32-bit binary
2338 compatibility. Since all software available for Linux/MIPS is
2339 currently 32-bit you should say Y here.
2340
2341config COMPAT
2342 bool
2343 depends on MIPS32_COMPAT
2344 default y
2345
05e43966
AN
2346config SYSVIPC_COMPAT
2347 bool
2348 depends on COMPAT && SYSVIPC
2349 default y
2350
1da177e4
LT
2351config MIPS32_O32
2352 bool "Kernel support for o32 binaries"
2353 depends on MIPS32_COMPAT
2354 help
2355 Select this option if you want to run o32 binaries. These are pure
2356 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
2357 existing binaries are in this format.
2358
2359 If unsure, say Y.
2360
2361config MIPS32_N32
2362 bool "Kernel support for n32 binaries"
2363 depends on MIPS32_COMPAT
2364 help
2365 Select this option if you want to run n32 binaries. These are
2366 64-bit binaries using 32-bit quantities for addressing and certain
2367 data that would normally be 64-bit. They are used in special
2368 cases.
2369
2370 If unsure, say N.
2371
2372config BINFMT_ELF32
2373 bool
2374 default y if MIPS32_O32 || MIPS32_N32
2375
2116245e
RB
2376endmenu
2377
2378menu "Power management options"
2379
363c55ca
WZ
2380config ARCH_HIBERNATION_POSSIBLE
2381 def_bool y
3f5b3e17 2382 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
363c55ca 2383
f4cb5700
JB
2384config ARCH_SUSPEND_POSSIBLE
2385 def_bool y
3f5b3e17 2386 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
f4cb5700 2387
2116245e 2388source "kernel/power/Kconfig"
952fa954 2389
1da177e4
LT
2390endmenu
2391
9726b43a
WZ
2392source "arch/mips/kernel/cpufreq/Kconfig"
2393
d5950b43
SR
2394source "net/Kconfig"
2395
1da177e4
LT
2396source "drivers/Kconfig"
2397
2398source "fs/Kconfig"
2399
2400source "arch/mips/Kconfig.debug"
2401
2402source "security/Kconfig"
2403
2404source "crypto/Kconfig"
2405
2406source "lib/Kconfig"