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Commit | Line | Data |
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b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
1da177e4 LT |
2 | config MIPS |
3 | bool | |
4 | default y | |
942fa985 | 5 | select ARCH_32BIT_OFF_T if !64BIT |
ea6a3737 | 6 | select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT |
12597988 | 7 | select ARCH_CLOCKSOURCE_DATA |
12597988 | 8 | select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST |
1e35918a | 9 | select ARCH_HAS_UBSAN_SANITIZE_ALL |
12597988 | 10 | select ARCH_SUPPORTS_UPROBES |
1ee3630a | 11 | select ARCH_USE_BUILTIN_BSWAP |
12597988 | 12 | select ARCH_USE_CMPXCHG_LOCKREF if 64BIT |
25da4e9d | 13 | select ARCH_USE_QUEUED_RWLOCKS |
0b17c967 | 14 | select ARCH_USE_QUEUED_SPINLOCKS |
9035bd29 | 15 | select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU |
12597988 MR |
16 | select ARCH_WANT_IPC_PARSE_VERSION |
17 | select BUILDTIME_EXTABLE_SORT | |
18 | select CLONE_BACKWARDS | |
57eeaced | 19 | select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1) |
12597988 MR |
20 | select CPU_PM if CPU_IDLE |
21 | select GENERIC_ATOMIC64 if !64BIT | |
22 | select GENERIC_CLOCKEVENTS | |
23 | select GENERIC_CMOS_UPDATE | |
24 | select GENERIC_CPU_AUTOPROBE | |
24640f23 | 25 | select GENERIC_GETTIMEOFDAY |
b962aeb0 | 26 | select GENERIC_IOMAP |
12597988 MR |
27 | select GENERIC_IRQ_PROBE |
28 | select GENERIC_IRQ_SHOW | |
6630a8e5 | 29 | select GENERIC_ISA_DMA if EISA |
740129b3 AP |
30 | select GENERIC_LIB_ASHLDI3 |
31 | select GENERIC_LIB_ASHRDI3 | |
32 | select GENERIC_LIB_CMPDI2 | |
33 | select GENERIC_LIB_LSHRDI3 | |
34 | select GENERIC_LIB_UCMPDI2 | |
12597988 MR |
35 | select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC |
36 | select GENERIC_SMP_IDLE_THREAD | |
37 | select GENERIC_TIME_VSYSCALL | |
446f062b | 38 | select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT |
12597988 | 39 | select HANDLE_DOMAIN_IRQ |
906d441f | 40 | select HAVE_ARCH_COMPILER_H |
12597988 | 41 | select HAVE_ARCH_JUMP_LABEL |
88547001 | 42 | select HAVE_ARCH_KGDB |
109c32ff MR |
43 | select HAVE_ARCH_MMAP_RND_BITS if MMU |
44 | select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT | |
490b004f | 45 | select HAVE_ARCH_SECCOMP_FILTER |
c0ff3c53 | 46 | select HAVE_ARCH_TRACEHOOK |
45e03e62 | 47 | select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES |
2ff2b7ec | 48 | select HAVE_ASM_MODVERSIONS |
101ae36f | 49 | select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS |
a90a5a62 | 50 | select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2 |
12597988 MR |
51 | select HAVE_CONTEXT_TRACKING |
52 | select HAVE_COPY_THREAD_TLS | |
53 | select HAVE_C_RECORDMCOUNT | |
54 | select HAVE_DEBUG_KMEMLEAK | |
55 | select HAVE_DEBUG_STACKOVERFLOW | |
12597988 | 56 | select HAVE_DMA_CONTIGUOUS |
538f1952 | 57 | select HAVE_DYNAMIC_FTRACE |
12597988 | 58 | select HAVE_EXIT_THREAD |
67a929e0 | 59 | select HAVE_FAST_GUP |
538f1952 | 60 | select HAVE_FTRACE_MCOUNT_RECORD |
29c5d346 | 61 | select HAVE_FUNCTION_GRAPH_TRACER |
12597988 | 62 | select HAVE_FUNCTION_TRACER |
12597988 | 63 | select HAVE_IDE |
b3a428b4 | 64 | select HAVE_IOREMAP_PROT |
12597988 MR |
65 | select HAVE_IRQ_EXIT_ON_IRQ_STACK |
66 | select HAVE_IRQ_TIME_ACCOUNTING | |
c1bf207d DD |
67 | select HAVE_KPROBES |
68 | select HAVE_KRETPROBES | |
c0436b50 | 69 | select HAVE_LD_DEAD_CODE_DATA_ELIMINATION |
9d15ffc8 | 70 | select HAVE_MEMBLOCK_NODE_MAP |
786d35d4 | 71 | select HAVE_MOD_ARCH_SPECIFIC |
42a0bb3f | 72 | select HAVE_NMI |
12597988 MR |
73 | select HAVE_OPROFILE |
74 | select HAVE_PERF_EVENTS | |
75 | select HAVE_REGS_AND_STACK_ACCESS_API | |
9ea141ad | 76 | select HAVE_RSEQ |
d148eac0 | 77 | select HAVE_STACKPROTECTOR |
12597988 | 78 | select HAVE_SYSCALL_TRACEPOINTS |
a3f14310 | 79 | select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP |
24640f23 | 80 | select HAVE_GENERIC_VDSO |
12597988 | 81 | select IRQ_FORCED_THREADING |
6630a8e5 | 82 | select ISA if EISA |
2f12fb20 | 83 | select MODULES_USE_ELF_RELA if MODULES && 64BIT |
12597988 MR |
84 | select MODULES_USE_ELF_REL if MODULES |
85 | select PERF_USE_VMALLOC | |
05a0a344 | 86 | select RTC_LIB |
d79d853d | 87 | select SYSCTL_EXCEPTION_TRACE |
12597988 | 88 | select VIRT_TO_BUS |
d1af2ab3 | 89 | select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI) |
1da177e4 | 90 | |
1da177e4 LT |
91 | menu "Machine selection" |
92 | ||
5e83d430 RB |
93 | choice |
94 | prompt "System type" | |
d41e6858 | 95 | default MIPS_GENERIC |
1da177e4 | 96 | |
eed0eabd PB |
97 | config MIPS_GENERIC |
98 | bool "Generic board-agnostic MIPS kernel" | |
99 | select BOOT_RAW | |
100 | select BUILTIN_DTB | |
101 | select CEVT_R4K | |
102 | select CLKSRC_MIPS_GIC | |
103 | select COMMON_CLK | |
104 | select CPU_MIPSR2_IRQ_VI | |
105 | select CPU_MIPSR2_IRQ_EI | |
106 | select CSRC_R4K | |
107 | select DMA_PERDEV_COHERENT | |
eb01d42a | 108 | select HAVE_PCI |
eed0eabd PB |
109 | select IRQ_MIPS_CPU |
110 | select LIBFDT | |
0211d49e | 111 | select MIPS_AUTO_PFN_OFFSET |
eed0eabd PB |
112 | select MIPS_CPU_SCACHE |
113 | select MIPS_GIC | |
114 | select MIPS_L1_CACHE_SHIFT_7 | |
115 | select NO_EXCEPT_FILL | |
116 | select PCI_DRIVERS_GENERIC | |
117 | select PINCTRL | |
118 | select SMP_UP if SMP | |
a3078e59 | 119 | select SWAP_IO_SPACE |
eed0eabd PB |
120 | select SYS_HAS_CPU_MIPS32_R1 |
121 | select SYS_HAS_CPU_MIPS32_R2 | |
122 | select SYS_HAS_CPU_MIPS32_R6 | |
123 | select SYS_HAS_CPU_MIPS64_R1 | |
124 | select SYS_HAS_CPU_MIPS64_R2 | |
125 | select SYS_HAS_CPU_MIPS64_R6 | |
126 | select SYS_SUPPORTS_32BIT_KERNEL | |
127 | select SYS_SUPPORTS_64BIT_KERNEL | |
128 | select SYS_SUPPORTS_BIG_ENDIAN | |
129 | select SYS_SUPPORTS_HIGHMEM | |
130 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
131 | select SYS_SUPPORTS_MICROMIPS | |
132 | select SYS_SUPPORTS_MIPS_CPS | |
133 | select SYS_SUPPORTS_MIPS16 | |
134 | select SYS_SUPPORTS_MULTITHREADING | |
135 | select SYS_SUPPORTS_RELOCATABLE | |
136 | select SYS_SUPPORTS_SMARTMIPS | |
2e6522c5 CL |
137 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
138 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
139 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
140 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
141 | select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
142 | select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
eed0eabd | 143 | select USE_OF |
2fe8ea39 | 144 | select UHI_BOOT |
eed0eabd PB |
145 | help |
146 | Select this to build a kernel which aims to support multiple boards, | |
147 | generally using a flattened device tree passed from the bootloader | |
148 | using the boot protocol defined in the UHI (Unified Hosting | |
149 | Interface) specification. | |
150 | ||
42a4f17d | 151 | config MIPS_ALCHEMY |
c3543e25 | 152 | bool "Alchemy processor based machines" |
d4a451d5 | 153 | select PHYS_ADDR_T_64BIT |
f772cdb2 | 154 | select CEVT_R4K |
d7ea335c | 155 | select CSRC_R4K |
67e38cf2 | 156 | select IRQ_MIPS_CPU |
88e9a93c | 157 | select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is |
42a4f17d ML |
158 | select SYS_HAS_CPU_MIPS32_R1 |
159 | select SYS_SUPPORTS_32BIT_KERNEL | |
160 | select SYS_SUPPORTS_APM_EMULATION | |
d30a2b47 | 161 | select GPIOLIB |
1b93b3c3 | 162 | select SYS_SUPPORTS_ZBOOT |
47440229 | 163 | select COMMON_CLK |
1da177e4 | 164 | |
7ca5dc14 FF |
165 | config AR7 |
166 | bool "Texas Instruments AR7" | |
167 | select BOOT_ELF32 | |
168 | select DMA_NONCOHERENT | |
169 | select CEVT_R4K | |
170 | select CSRC_R4K | |
67e38cf2 | 171 | select IRQ_MIPS_CPU |
7ca5dc14 FF |
172 | select NO_EXCEPT_FILL |
173 | select SWAP_IO_SPACE | |
174 | select SYS_HAS_CPU_MIPS32_R1 | |
175 | select SYS_HAS_EARLY_PRINTK | |
176 | select SYS_SUPPORTS_32BIT_KERNEL | |
177 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 178 | select SYS_SUPPORTS_MIPS16 |
1b93b3c3 | 179 | select SYS_SUPPORTS_ZBOOT_UART16550 |
d30a2b47 | 180 | select GPIOLIB |
7ca5dc14 | 181 | select VLYNQ |
8551fb64 | 182 | select HAVE_CLK |
7ca5dc14 FF |
183 | help |
184 | Support for the Texas Instruments AR7 System-on-a-Chip | |
185 | family: TNETD7100, 7200 and 7300. | |
186 | ||
43cc739f SR |
187 | config ATH25 |
188 | bool "Atheros AR231x/AR531x SoC support" | |
189 | select CEVT_R4K | |
190 | select CSRC_R4K | |
191 | select DMA_NONCOHERENT | |
67e38cf2 | 192 | select IRQ_MIPS_CPU |
1753e74e | 193 | select IRQ_DOMAIN |
43cc739f SR |
194 | select SYS_HAS_CPU_MIPS32_R1 |
195 | select SYS_SUPPORTS_BIG_ENDIAN | |
196 | select SYS_SUPPORTS_32BIT_KERNEL | |
8aaa7278 | 197 | select SYS_HAS_EARLY_PRINTK |
43cc739f SR |
198 | help |
199 | Support for Atheros AR231x and Atheros AR531x based boards | |
200 | ||
d4a67d9d GJ |
201 | config ATH79 |
202 | bool "Atheros AR71XX/AR724X/AR913X based boards" | |
ff591a91 | 203 | select ARCH_HAS_RESET_CONTROLLER |
d4a67d9d GJ |
204 | select BOOT_RAW |
205 | select CEVT_R4K | |
206 | select CSRC_R4K | |
207 | select DMA_NONCOHERENT | |
d30a2b47 | 208 | select GPIOLIB |
a08227a2 | 209 | select PINCTRL |
94638067 | 210 | select HAVE_CLK |
411520af | 211 | select COMMON_CLK |
2c4f1ac5 | 212 | select CLKDEV_LOOKUP |
67e38cf2 | 213 | select IRQ_MIPS_CPU |
d4a67d9d GJ |
214 | select SYS_HAS_CPU_MIPS32_R2 |
215 | select SYS_HAS_EARLY_PRINTK | |
216 | select SYS_SUPPORTS_32BIT_KERNEL | |
217 | select SYS_SUPPORTS_BIG_ENDIAN | |
377cb1b6 | 218 | select SYS_SUPPORTS_MIPS16 |
b3f0a250 | 219 | select SYS_SUPPORTS_ZBOOT_UART_PROM |
03c8c407 | 220 | select USE_OF |
53d473fc | 221 | select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM |
d4a67d9d GJ |
222 | help |
223 | Support for the Atheros AR71XX/AR724X/AR913X SoCs. | |
224 | ||
5f2d4459 KC |
225 | config BMIPS_GENERIC |
226 | bool "Broadcom Generic BMIPS kernel" | |
d59098a0 CH |
227 | select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL |
228 | select ARCH_HAS_PHYS_TO_DMA | |
d666cd02 KC |
229 | select BOOT_RAW |
230 | select NO_EXCEPT_FILL | |
231 | select USE_OF | |
232 | select CEVT_R4K | |
233 | select CSRC_R4K | |
234 | select SYNC_R4K | |
235 | select COMMON_CLK | |
c7c42ec2 | 236 | select BCM6345_L1_IRQ |
60b858f2 KC |
237 | select BCM7038_L1_IRQ |
238 | select BCM7120_L2_IRQ | |
239 | select BRCMSTB_L2_IRQ | |
67e38cf2 | 240 | select IRQ_MIPS_CPU |
60b858f2 | 241 | select DMA_NONCOHERENT |
d666cd02 | 242 | select SYS_SUPPORTS_32BIT_KERNEL |
60b858f2 | 243 | select SYS_SUPPORTS_LITTLE_ENDIAN |
d666cd02 KC |
244 | select SYS_SUPPORTS_BIG_ENDIAN |
245 | select SYS_SUPPORTS_HIGHMEM | |
60b858f2 KC |
246 | select SYS_HAS_CPU_BMIPS32_3300 |
247 | select SYS_HAS_CPU_BMIPS4350 | |
248 | select SYS_HAS_CPU_BMIPS4380 | |
d666cd02 KC |
249 | select SYS_HAS_CPU_BMIPS5000 |
250 | select SWAP_IO_SPACE | |
60b858f2 KC |
251 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
252 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
253 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN | |
254 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
4dc4704c | 255 | select HARDIRQS_SW_RESEND |
d666cd02 | 256 | help |
5f2d4459 KC |
257 | Build a generic DT-based kernel image that boots on select |
258 | BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top | |
259 | box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN | |
260 | must be set appropriately for your board. | |
d666cd02 | 261 | |
1c0c13eb | 262 | config BCM47XX |
c619366e | 263 | bool "Broadcom BCM47XX based boards" |
fe08f8c2 | 264 | select BOOT_RAW |
42f77542 | 265 | select CEVT_R4K |
940f6b48 | 266 | select CSRC_R4K |
1c0c13eb | 267 | select DMA_NONCOHERENT |
eb01d42a | 268 | select HAVE_PCI |
67e38cf2 | 269 | select IRQ_MIPS_CPU |
314878d2 | 270 | select SYS_HAS_CPU_MIPS32_R1 |
dd54dedd | 271 | select NO_EXCEPT_FILL |
1c0c13eb AJ |
272 | select SYS_SUPPORTS_32BIT_KERNEL |
273 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 274 | select SYS_SUPPORTS_MIPS16 |
6507831f | 275 | select SYS_SUPPORTS_ZBOOT |
25e5fb97 | 276 | select SYS_HAS_EARLY_PRINTK |
e6086557 | 277 | select USE_GENERIC_EARLY_PRINTK_8250 |
c949c0bc RM |
278 | select GPIOLIB |
279 | select LEDS_GPIO_REGISTER | |
f6e734a8 | 280 | select BCM47XX_NVRAM |
2ab71a02 | 281 | select BCM47XX_SPROM |
dfe00495 | 282 | select BCM47XX_SSB if !BCM47XX_BCMA |
1c0c13eb | 283 | help |
371a4151 | 284 | Support for BCM47XX based boards |
1c0c13eb | 285 | |
e7300d04 MB |
286 | config BCM63XX |
287 | bool "Broadcom BCM63XX based boards" | |
ae8de61c | 288 | select BOOT_RAW |
e7300d04 MB |
289 | select CEVT_R4K |
290 | select CSRC_R4K | |
fc264022 | 291 | select SYNC_R4K |
e7300d04 | 292 | select DMA_NONCOHERENT |
67e38cf2 | 293 | select IRQ_MIPS_CPU |
e7300d04 MB |
294 | select SYS_SUPPORTS_32BIT_KERNEL |
295 | select SYS_SUPPORTS_BIG_ENDIAN | |
296 | select SYS_HAS_EARLY_PRINTK | |
2280430e RD |
297 | select SYS_HAS_CPU_BMIPS32_3300 |
298 | select SYS_HAS_CPU_BMIPS4350 | |
299 | select SYS_HAS_CPU_BMIPS4380 | |
e7300d04 | 300 | select SWAP_IO_SPACE |
d30a2b47 | 301 | select GPIOLIB |
3e82eeeb | 302 | select HAVE_CLK |
af2418be | 303 | select MIPS_L1_CACHE_SHIFT_4 |
c5af3c2d | 304 | select CLKDEV_LOOKUP |
e7300d04 | 305 | help |
371a4151 | 306 | Support for BCM63XX based boards |
e7300d04 | 307 | |
1da177e4 | 308 | config MIPS_COBALT |
3fa986fa | 309 | bool "Cobalt Server" |
42f77542 | 310 | select CEVT_R4K |
940f6b48 | 311 | select CSRC_R4K |
1097c6ac | 312 | select CEVT_GT641XX |
1da177e4 | 313 | select DMA_NONCOHERENT |
eb01d42a | 314 | select FORCE_PCI |
d865bea4 | 315 | select I8253 |
1da177e4 | 316 | select I8259 |
67e38cf2 | 317 | select IRQ_MIPS_CPU |
d5ab1a69 | 318 | select IRQ_GT641XX |
252161ec | 319 | select PCI_GT64XXX_PCI0 |
7cf8053b | 320 | select SYS_HAS_CPU_NEVADA |
0a22e0d4 | 321 | select SYS_HAS_EARLY_PRINTK |
ed5ba2fb | 322 | select SYS_SUPPORTS_32BIT_KERNEL |
0e8774b6 | 323 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 324 | select SYS_SUPPORTS_LITTLE_ENDIAN |
e6086557 | 325 | select USE_GENERIC_EARLY_PRINTK_8250 |
1da177e4 LT |
326 | |
327 | config MACH_DECSTATION | |
3fa986fa | 328 | bool "DECstations" |
1da177e4 | 329 | select BOOT_ELF32 |
6457d9fc | 330 | select CEVT_DS1287 |
81d10bad | 331 | select CEVT_R4K if CPU_R4X00 |
4247417d | 332 | select CSRC_IOASIC |
81d10bad | 333 | select CSRC_R4K if CPU_R4X00 |
20d60d99 MR |
334 | select CPU_DADDI_WORKAROUNDS if 64BIT |
335 | select CPU_R4000_WORKAROUNDS if 64BIT | |
336 | select CPU_R4400_WORKAROUNDS if 64BIT | |
1da177e4 | 337 | select DMA_NONCOHERENT |
ce816fa8 | 338 | select NO_IOPORT_MAP |
67e38cf2 | 339 | select IRQ_MIPS_CPU |
7cf8053b RB |
340 | select SYS_HAS_CPU_R3000 |
341 | select SYS_HAS_CPU_R4X00 | |
ed5ba2fb | 342 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 343 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 344 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1723b4a3 AN |
345 | select SYS_SUPPORTS_128HZ |
346 | select SYS_SUPPORTS_256HZ | |
347 | select SYS_SUPPORTS_1024HZ | |
930beb5a | 348 | select MIPS_L1_CACHE_SHIFT_4 |
5e83d430 | 349 | help |
1da177e4 LT |
350 | This enables support for DEC's MIPS based workstations. For details |
351 | see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the | |
352 | DECstation porting pages on <http://decstation.unix-ag.org/>. | |
353 | ||
354 | If you have one of the following DECstation Models you definitely | |
355 | want to choose R4xx0 for the CPU Type: | |
356 | ||
9308816c RB |
357 | DECstation 5000/50 |
358 | DECstation 5000/150 | |
359 | DECstation 5000/260 | |
360 | DECsystem 5900/260 | |
1da177e4 LT |
361 | |
362 | otherwise choose R3000. | |
363 | ||
5e83d430 | 364 | config MACH_JAZZ |
3fa986fa | 365 | bool "Jazz family of machines" |
a211a082 | 366 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 367 | select ARCH_MIGHT_HAVE_PC_SERIO |
0e2794b0 RB |
368 | select FW_ARC |
369 | select FW_ARC32 | |
5e83d430 | 370 | select ARCH_MAY_HAVE_PC_FDC |
42f77542 | 371 | select CEVT_R4K |
940f6b48 | 372 | select CSRC_R4K |
e2defae5 | 373 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
5e83d430 | 374 | select GENERIC_ISA_DMA |
8a118c38 | 375 | select HAVE_PCSPKR_PLATFORM |
67e38cf2 | 376 | select IRQ_MIPS_CPU |
d865bea4 | 377 | select I8253 |
5e83d430 RB |
378 | select I8259 |
379 | select ISA | |
7cf8053b | 380 | select SYS_HAS_CPU_R4X00 |
5e83d430 | 381 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 382 | select SYS_SUPPORTS_64BIT_KERNEL |
1723b4a3 | 383 | select SYS_SUPPORTS_100HZ |
1da177e4 | 384 | help |
371a4151 EWI |
385 | This a family of machines based on the MIPS R4030 chipset which was |
386 | used by several vendors to build RISC/os and Windows NT workstations. | |
387 | Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and | |
388 | Olivetti M700-10 workstations. | |
5e83d430 | 389 | |
de361e8b PB |
390 | config MACH_INGENIC |
391 | bool "Ingenic SoC based machines" | |
5ebabe59 LPC |
392 | select SYS_SUPPORTS_32BIT_KERNEL |
393 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
f9c9affc | 394 | select SYS_SUPPORTS_ZBOOT_UART16550 |
b35d2653 | 395 | select CPU_SUPPORTS_HUGEPAGES |
5ebabe59 | 396 | select DMA_NONCOHERENT |
67e38cf2 | 397 | select IRQ_MIPS_CPU |
37b4c3ca | 398 | select PINCTRL |
d30a2b47 | 399 | select GPIOLIB |
ff1930c6 | 400 | select COMMON_CLK |
83bc7692 | 401 | select GENERIC_IRQ_CHIP |
15205fc0 | 402 | select BUILTIN_DTB if MIPS_NO_APPENDED_DTB |
ffb1843d | 403 | select USE_OF |
6ec127fb | 404 | select LIBFDT |
5ebabe59 | 405 | |
171bb2f1 JC |
406 | config LANTIQ |
407 | bool "Lantiq based platforms" | |
408 | select DMA_NONCOHERENT | |
67e38cf2 | 409 | select IRQ_MIPS_CPU |
171bb2f1 JC |
410 | select CEVT_R4K |
411 | select CSRC_R4K | |
412 | select SYS_HAS_CPU_MIPS32_R1 | |
413 | select SYS_HAS_CPU_MIPS32_R2 | |
414 | select SYS_SUPPORTS_BIG_ENDIAN | |
415 | select SYS_SUPPORTS_32BIT_KERNEL | |
377cb1b6 | 416 | select SYS_SUPPORTS_MIPS16 |
171bb2f1 | 417 | select SYS_SUPPORTS_MULTITHREADING |
f35764e7 | 418 | select SYS_SUPPORTS_VPE_LOADER |
171bb2f1 | 419 | select SYS_HAS_EARLY_PRINTK |
d30a2b47 | 420 | select GPIOLIB |
171bb2f1 JC |
421 | select SWAP_IO_SPACE |
422 | select BOOT_RAW | |
287e3f3f | 423 | select CLKDEV_LOOKUP |
a0392222 | 424 | select USE_OF |
3f8c50c9 JC |
425 | select PINCTRL |
426 | select PINCTRL_LANTIQ | |
c530781c JC |
427 | select ARCH_HAS_RESET_CONTROLLER |
428 | select RESET_CONTROLLER | |
171bb2f1 | 429 | |
1f21d2bd BM |
430 | config LASAT |
431 | bool "LASAT Networks platforms" | |
42f77542 | 432 | select CEVT_R4K |
16f0bbbc | 433 | select CRC32 |
940f6b48 | 434 | select CSRC_R4K |
1f21d2bd BM |
435 | select DMA_NONCOHERENT |
436 | select SYS_HAS_EARLY_PRINTK | |
eb01d42a | 437 | select HAVE_PCI |
67e38cf2 | 438 | select IRQ_MIPS_CPU |
1f21d2bd BM |
439 | select PCI_GT64XXX_PCI0 |
440 | select MIPS_NILE4 | |
441 | select R5000_CPU_SCACHE | |
442 | select SYS_HAS_CPU_R5000 | |
443 | select SYS_SUPPORTS_32BIT_KERNEL | |
444 | select SYS_SUPPORTS_64BIT_KERNEL if BROKEN | |
445 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1f21d2bd | 446 | |
30ad29bb HC |
447 | config MACH_LOONGSON32 |
448 | bool "Loongson-1 family of machines" | |
c7e8c668 | 449 | select SYS_SUPPORTS_ZBOOT |
ade299d8 | 450 | help |
30ad29bb | 451 | This enables support for the Loongson-1 family of machines. |
85749d24 | 452 | |
30ad29bb HC |
453 | Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by |
454 | the Institute of Computing Technology (ICT), Chinese Academy of | |
455 | Sciences (CAS). | |
ade299d8 | 456 | |
30ad29bb HC |
457 | config MACH_LOONGSON64 |
458 | bool "Loongson-2/3 family of machines" | |
ca585cf9 KC |
459 | select SYS_SUPPORTS_ZBOOT |
460 | help | |
30ad29bb | 461 | This enables the support of Loongson-2/3 family of machines. |
ca585cf9 | 462 | |
30ad29bb HC |
463 | Loongson-2 is a family of single-core CPUs and Loongson-3 is a |
464 | family of multi-core CPUs. They are both 64-bit general-purpose | |
465 | MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute | |
466 | of Computing Technology (ICT), Chinese Academy of Sciences (CAS) | |
467 | in the People's Republic of China. The chief architect is Professor | |
468 | Weiwu Hu. | |
ca585cf9 | 469 | |
6a438309 AB |
470 | config MACH_PISTACHIO |
471 | bool "IMG Pistachio SoC based boards" | |
6a438309 AB |
472 | select BOOT_ELF32 |
473 | select BOOT_RAW | |
474 | select CEVT_R4K | |
475 | select CLKSRC_MIPS_GIC | |
476 | select COMMON_CLK | |
477 | select CSRC_R4K | |
645c7827 | 478 | select DMA_NONCOHERENT |
d30a2b47 | 479 | select GPIOLIB |
67e38cf2 | 480 | select IRQ_MIPS_CPU |
6a438309 AB |
481 | select LIBFDT |
482 | select MFD_SYSCON | |
483 | select MIPS_CPU_SCACHE | |
484 | select MIPS_GIC | |
485 | select PINCTRL | |
486 | select REGULATOR | |
487 | select SYS_HAS_CPU_MIPS32_R2 | |
488 | select SYS_SUPPORTS_32BIT_KERNEL | |
489 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
490 | select SYS_SUPPORTS_MIPS_CPS | |
491 | select SYS_SUPPORTS_MULTITHREADING | |
41cc07be | 492 | select SYS_SUPPORTS_RELOCATABLE |
6a438309 | 493 | select SYS_SUPPORTS_ZBOOT |
018f62ee EG |
494 | select SYS_HAS_EARLY_PRINTK |
495 | select USE_GENERIC_EARLY_PRINTK_8250 | |
6a438309 AB |
496 | select USE_OF |
497 | help | |
498 | This enables support for the IMG Pistachio SoC platform. | |
499 | ||
1da177e4 | 500 | config MIPS_MALTA |
3fa986fa | 501 | bool "MIPS Malta board" |
61ed242d | 502 | select ARCH_MAY_HAVE_PC_FDC |
a211a082 | 503 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 504 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 505 | select BOOT_ELF32 |
fa71c960 | 506 | select BOOT_RAW |
e8823d26 | 507 | select BUILTIN_DTB |
42f77542 | 508 | select CEVT_R4K |
fa5635a2 | 509 | select CLKSRC_MIPS_GIC |
42b002ab | 510 | select COMMON_CLK |
47bf2b03 | 511 | select CSRC_R4K |
885014bc | 512 | select DMA_MAYBE_COHERENT |
1da177e4 | 513 | select GENERIC_ISA_DMA |
8a118c38 | 514 | select HAVE_PCSPKR_PLATFORM |
eb01d42a | 515 | select HAVE_PCI |
d865bea4 | 516 | select I8253 |
1da177e4 | 517 | select I8259 |
47bf2b03 MK |
518 | select IRQ_MIPS_CPU |
519 | select LIBFDT | |
5e83d430 | 520 | select MIPS_BONITO64 |
9318c51a | 521 | select MIPS_CPU_SCACHE |
47bf2b03 | 522 | select MIPS_GIC |
a7ef1ead | 523 | select MIPS_L1_CACHE_SHIFT_6 |
5e83d430 | 524 | select MIPS_MSC |
47bf2b03 | 525 | select PCI_GT64XXX_PCI0 |
ecafe3e9 | 526 | select SMP_UP if SMP |
1da177e4 | 527 | select SWAP_IO_SPACE |
7cf8053b RB |
528 | select SYS_HAS_CPU_MIPS32_R1 |
529 | select SYS_HAS_CPU_MIPS32_R2 | |
bfc3c5a6 | 530 | select SYS_HAS_CPU_MIPS32_R3_5 |
c5b36783 | 531 | select SYS_HAS_CPU_MIPS32_R5 |
575509b6 | 532 | select SYS_HAS_CPU_MIPS32_R6 |
7cf8053b | 533 | select SYS_HAS_CPU_MIPS64_R1 |
5d9fbed1 | 534 | select SYS_HAS_CPU_MIPS64_R2 |
575509b6 | 535 | select SYS_HAS_CPU_MIPS64_R6 |
7cf8053b RB |
536 | select SYS_HAS_CPU_NEVADA |
537 | select SYS_HAS_CPU_RM7000 | |
ed5ba2fb YY |
538 | select SYS_SUPPORTS_32BIT_KERNEL |
539 | select SYS_SUPPORTS_64BIT_KERNEL | |
5e83d430 | 540 | select SYS_SUPPORTS_BIG_ENDIAN |
c5b36783 | 541 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 542 | select SYS_SUPPORTS_LITTLE_ENDIAN |
424ebcdf | 543 | select SYS_SUPPORTS_MICROMIPS |
47bf2b03 | 544 | select SYS_SUPPORTS_MIPS16 |
0365070f | 545 | select SYS_SUPPORTS_MIPS_CMP |
e56b6aa6 | 546 | select SYS_SUPPORTS_MIPS_CPS |
f41ae0b2 | 547 | select SYS_SUPPORTS_MULTITHREADING |
47bf2b03 | 548 | select SYS_SUPPORTS_RELOCATABLE |
9693a853 | 549 | select SYS_SUPPORTS_SMARTMIPS |
f35764e7 | 550 | select SYS_SUPPORTS_VPE_LOADER |
1b93b3c3 | 551 | select SYS_SUPPORTS_ZBOOT |
e8823d26 | 552 | select USE_OF |
abcc82b1 | 553 | select ZONE_DMA32 if 64BIT |
1da177e4 | 554 | help |
f638d197 | 555 | This enables support for the MIPS Technologies Malta evaluation |
1da177e4 LT |
556 | board. |
557 | ||
2572f00d JH |
558 | config MACH_PIC32 |
559 | bool "Microchip PIC32 Family" | |
560 | help | |
561 | This enables support for the Microchip PIC32 family of platforms. | |
562 | ||
563 | Microchip PIC32 is a family of general-purpose 32 bit MIPS core | |
564 | microcontrollers. | |
565 | ||
a83860c2 RB |
566 | config NEC_MARKEINS |
567 | bool "NEC EMMA2RH Mark-eins board" | |
568 | select SOC_EMMA2RH | |
eb01d42a | 569 | select HAVE_PCI |
a83860c2 RB |
570 | help |
571 | This enables support for the NEC Electronics Mark-eins boards. | |
ade299d8 | 572 | |
5e83d430 | 573 | config MACH_VR41XX |
74142d65 | 574 | bool "NEC VR4100 series based machines" |
42f77542 | 575 | select CEVT_R4K |
940f6b48 | 576 | select CSRC_R4K |
7cf8053b | 577 | select SYS_HAS_CPU_VR41XX |
377cb1b6 | 578 | select SYS_SUPPORTS_MIPS16 |
d30a2b47 | 579 | select GPIOLIB |
5e83d430 | 580 | |
edb6310a DL |
581 | config NXP_STB220 |
582 | bool "NXP STB220 board" | |
583 | select SOC_PNX833X | |
584 | help | |
371a4151 | 585 | Support for NXP Semiconductors STB220 Development Board. |
edb6310a DL |
586 | |
587 | config NXP_STB225 | |
588 | bool "NXP 225 board" | |
589 | select SOC_PNX833X | |
590 | select SOC_PNX8335 | |
591 | help | |
371a4151 | 592 | Support for NXP Semiconductors STB225 Development Board. |
edb6310a | 593 | |
9267a30d MSJ |
594 | config PMC_MSP |
595 | bool "PMC-Sierra MSP chipsets" | |
39d30c13 A |
596 | select CEVT_R4K |
597 | select CSRC_R4K | |
9267a30d MSJ |
598 | select DMA_NONCOHERENT |
599 | select SWAP_IO_SPACE | |
600 | select NO_EXCEPT_FILL | |
601 | select BOOT_RAW | |
602 | select SYS_HAS_CPU_MIPS32_R1 | |
603 | select SYS_HAS_CPU_MIPS32_R2 | |
604 | select SYS_SUPPORTS_32BIT_KERNEL | |
605 | select SYS_SUPPORTS_BIG_ENDIAN | |
377cb1b6 | 606 | select SYS_SUPPORTS_MIPS16 |
67e38cf2 | 607 | select IRQ_MIPS_CPU |
9267a30d MSJ |
608 | select SERIAL_8250 |
609 | select SERIAL_8250_CONSOLE | |
9296d94d FF |
610 | select USB_EHCI_BIG_ENDIAN_MMIO |
611 | select USB_EHCI_BIG_ENDIAN_DESC | |
9267a30d MSJ |
612 | help |
613 | This adds support for the PMC-Sierra family of Multi-Service | |
614 | Processor System-On-A-Chips. These parts include a number | |
615 | of integrated peripherals, interfaces and DSPs in addition to | |
616 | a variety of MIPS cores. | |
617 | ||
ae2b5bb6 JC |
618 | config RALINK |
619 | bool "Ralink based machines" | |
620 | select CEVT_R4K | |
621 | select CSRC_R4K | |
622 | select BOOT_RAW | |
623 | select DMA_NONCOHERENT | |
67e38cf2 | 624 | select IRQ_MIPS_CPU |
ae2b5bb6 JC |
625 | select USE_OF |
626 | select SYS_HAS_CPU_MIPS32_R1 | |
627 | select SYS_HAS_CPU_MIPS32_R2 | |
628 | select SYS_SUPPORTS_32BIT_KERNEL | |
629 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
377cb1b6 | 630 | select SYS_SUPPORTS_MIPS16 |
ae2b5bb6 | 631 | select SYS_HAS_EARLY_PRINTK |
ae2b5bb6 | 632 | select CLKDEV_LOOKUP |
2a153f1c JC |
633 | select ARCH_HAS_RESET_CONTROLLER |
634 | select RESET_CONTROLLER | |
ae2b5bb6 | 635 | |
1da177e4 | 636 | config SGI_IP22 |
3fa986fa | 637 | bool "SGI IP22 (Indy/Indigo2)" |
0e2794b0 RB |
638 | select FW_ARC |
639 | select FW_ARC32 | |
7a407aa5 | 640 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 641 | select BOOT_ELF32 |
42f77542 | 642 | select CEVT_R4K |
940f6b48 | 643 | select CSRC_R4K |
e2defae5 | 644 | select DEFAULT_SGI_PARTITION |
1da177e4 | 645 | select DMA_NONCOHERENT |
6630a8e5 | 646 | select HAVE_EISA |
d865bea4 | 647 | select I8253 |
68de4803 | 648 | select I8259 |
1da177e4 | 649 | select IP22_CPU_SCACHE |
67e38cf2 | 650 | select IRQ_MIPS_CPU |
aa414dff | 651 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
e2defae5 TB |
652 | select SGI_HAS_I8042 |
653 | select SGI_HAS_INDYDOG | |
36e5c21d | 654 | select SGI_HAS_HAL2 |
e2defae5 TB |
655 | select SGI_HAS_SEEQ |
656 | select SGI_HAS_WD93 | |
657 | select SGI_HAS_ZILOG | |
1da177e4 | 658 | select SWAP_IO_SPACE |
7cf8053b RB |
659 | select SYS_HAS_CPU_R4X00 |
660 | select SYS_HAS_CPU_R5000 | |
2b5e63f6 MM |
661 | # |
662 | # Disable EARLY_PRINTK for now since it leads to overwritten prom | |
663 | # memory during early boot on some machines. | |
664 | # | |
665 | # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com | |
666 | # for a more details discussion | |
667 | # | |
668 | # select SYS_HAS_EARLY_PRINTK | |
ed5ba2fb YY |
669 | select SYS_SUPPORTS_32BIT_KERNEL |
670 | select SYS_SUPPORTS_64BIT_KERNEL | |
5e83d430 | 671 | select SYS_SUPPORTS_BIG_ENDIAN |
930beb5a | 672 | select MIPS_L1_CACHE_SHIFT_7 |
1da177e4 LT |
673 | help |
674 | This are the SGI Indy, Challenge S and Indigo2, as well as certain | |
675 | OEM variants like the Tandem CMN B006S. To compile a Linux kernel | |
676 | that runs on these, say Y here. | |
677 | ||
678 | config SGI_IP27 | |
3fa986fa | 679 | bool "SGI IP27 (Origin200/2000)" |
54aed4dd | 680 | select ARCH_HAS_PHYS_TO_DMA |
0e2794b0 RB |
681 | select FW_ARC |
682 | select FW_ARC64 | |
5e83d430 | 683 | select BOOT_ELF64 |
e2defae5 | 684 | select DEFAULT_SGI_PARTITION |
36a88530 | 685 | select SYS_HAS_EARLY_PRINTK |
eb01d42a | 686 | select HAVE_PCI |
69a07a41 | 687 | select IRQ_MIPS_CPU |
e6308b6d | 688 | select IRQ_DOMAIN_HIERARCHY |
130e2fb7 | 689 | select NR_CPUS_DEFAULT_64 |
a57140e9 TB |
690 | select PCI_DRIVERS_GENERIC |
691 | select PCI_XTALK_BRIDGE | |
7cf8053b | 692 | select SYS_HAS_CPU_R10000 |
ed5ba2fb | 693 | select SYS_SUPPORTS_64BIT_KERNEL |
5e83d430 | 694 | select SYS_SUPPORTS_BIG_ENDIAN |
d8cb4e11 | 695 | select SYS_SUPPORTS_NUMA |
1a5c5de1 | 696 | select SYS_SUPPORTS_SMP |
930beb5a | 697 | select MIPS_L1_CACHE_SHIFT_7 |
1da177e4 LT |
698 | help |
699 | This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics | |
700 | workstations. To compile a Linux kernel that runs on these, say Y | |
701 | here. | |
702 | ||
e2defae5 | 703 | config SGI_IP28 |
7d60717e | 704 | bool "SGI IP28 (Indigo2 R10k)" |
0e2794b0 RB |
705 | select FW_ARC |
706 | select FW_ARC64 | |
7a407aa5 | 707 | select ARCH_MIGHT_HAVE_PC_SERIO |
e2defae5 TB |
708 | select BOOT_ELF64 |
709 | select CEVT_R4K | |
710 | select CSRC_R4K | |
711 | select DEFAULT_SGI_PARTITION | |
712 | select DMA_NONCOHERENT | |
713 | select GENERIC_ISA_DMA_SUPPORT_BROKEN | |
67e38cf2 | 714 | select IRQ_MIPS_CPU |
6630a8e5 | 715 | select HAVE_EISA |
e2defae5 TB |
716 | select I8253 |
717 | select I8259 | |
e2defae5 TB |
718 | select SGI_HAS_I8042 |
719 | select SGI_HAS_INDYDOG | |
5b438c44 | 720 | select SGI_HAS_HAL2 |
e2defae5 TB |
721 | select SGI_HAS_SEEQ |
722 | select SGI_HAS_WD93 | |
723 | select SGI_HAS_ZILOG | |
724 | select SWAP_IO_SPACE | |
725 | select SYS_HAS_CPU_R10000 | |
2b5e63f6 MM |
726 | # |
727 | # Disable EARLY_PRINTK for now since it leads to overwritten prom | |
728 | # memory during early boot on some machines. | |
729 | # | |
730 | # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com | |
731 | # for a more details discussion | |
732 | # | |
733 | # select SYS_HAS_EARLY_PRINTK | |
e2defae5 TB |
734 | select SYS_SUPPORTS_64BIT_KERNEL |
735 | select SYS_SUPPORTS_BIG_ENDIAN | |
dc24d68d | 736 | select MIPS_L1_CACHE_SHIFT_7 |
371a4151 EWI |
737 | help |
738 | This is the SGI Indigo2 with R10000 processor. To compile a Linux | |
739 | kernel that runs on these, say Y here. | |
e2defae5 | 740 | |
1da177e4 | 741 | config SGI_IP32 |
cfd2afc0 | 742 | bool "SGI IP32 (O2)" |
03df8229 | 743 | select ARCH_HAS_PHYS_TO_DMA |
0e2794b0 RB |
744 | select FW_ARC |
745 | select FW_ARC32 | |
1da177e4 | 746 | select BOOT_ELF32 |
42f77542 | 747 | select CEVT_R4K |
940f6b48 | 748 | select CSRC_R4K |
1da177e4 | 749 | select DMA_NONCOHERENT |
eb01d42a | 750 | select HAVE_PCI |
67e38cf2 | 751 | select IRQ_MIPS_CPU |
1da177e4 LT |
752 | select R5000_CPU_SCACHE |
753 | select RM7000_CPU_SCACHE | |
7cf8053b RB |
754 | select SYS_HAS_CPU_R5000 |
755 | select SYS_HAS_CPU_R10000 if BROKEN | |
756 | select SYS_HAS_CPU_RM7000 | |
dd2f18fe | 757 | select SYS_HAS_CPU_NEVADA |
ed5ba2fb | 758 | select SYS_SUPPORTS_64BIT_KERNEL |
23fbee9d | 759 | select SYS_SUPPORTS_BIG_ENDIAN |
23fbee9d | 760 | help |
5e83d430 | 761 | If you want this kernel to run on SGI O2 workstation, say Y here. |
1da177e4 | 762 | |
ade299d8 YY |
763 | config SIBYTE_CRHINE |
764 | bool "Sibyte BCM91120C-CRhine" | |
9a6dcea1 | 765 | select BOOT_ELF32 |
ade299d8 | 766 | select SIBYTE_BCM1120 |
9a6dcea1 | 767 | select SWAP_IO_SPACE |
7cf8053b | 768 | select SYS_HAS_CPU_SB1 |
9a6dcea1 AI |
769 | select SYS_SUPPORTS_BIG_ENDIAN |
770 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
771 | ||
ade299d8 YY |
772 | config SIBYTE_CARMEL |
773 | bool "Sibyte BCM91120x-Carmel" | |
5e83d430 | 774 | select BOOT_ELF32 |
ade299d8 | 775 | select SIBYTE_BCM1120 |
5e83d430 | 776 | select SWAP_IO_SPACE |
7cf8053b | 777 | select SYS_HAS_CPU_SB1 |
81731f79 | 778 | select SYS_SUPPORTS_BIG_ENDIAN |
5e83d430 | 779 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 780 | |
ade299d8 YY |
781 | config SIBYTE_CRHONE |
782 | bool "Sibyte BCM91125C-CRhone" | |
5e83d430 | 783 | select BOOT_ELF32 |
ade299d8 | 784 | select SIBYTE_BCM1125 |
5e83d430 | 785 | select SWAP_IO_SPACE |
7cf8053b | 786 | select SYS_HAS_CPU_SB1 |
5e83d430 | 787 | select SYS_SUPPORTS_BIG_ENDIAN |
ade299d8 | 788 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 789 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 790 | |
5e83d430 | 791 | config SIBYTE_RHONE |
3fa986fa | 792 | bool "Sibyte BCM91125E-Rhone" |
5e83d430 | 793 | select BOOT_ELF32 |
5e83d430 RB |
794 | select SIBYTE_BCM1125H |
795 | select SWAP_IO_SPACE | |
7cf8053b | 796 | select SYS_HAS_CPU_SB1 |
5e83d430 RB |
797 | select SYS_SUPPORTS_BIG_ENDIAN |
798 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1da177e4 | 799 | |
ade299d8 YY |
800 | config SIBYTE_SWARM |
801 | bool "Sibyte BCM91250A-SWARM" | |
5e83d430 | 802 | select BOOT_ELF32 |
fcf3ca4c | 803 | select HAVE_PATA_PLATFORM |
ade299d8 | 804 | select SIBYTE_SB1250 |
5e83d430 | 805 | select SWAP_IO_SPACE |
7cf8053b | 806 | select SYS_HAS_CPU_SB1 |
5e83d430 | 807 | select SYS_SUPPORTS_BIG_ENDIAN |
ade299d8 | 808 | select SYS_SUPPORTS_HIGHMEM |
e3ad1c23 | 809 | select SYS_SUPPORTS_LITTLE_ENDIAN |
cce335ae | 810 | select ZONE_DMA32 if 64BIT |
e4849aff | 811 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
e3ad1c23 | 812 | |
ade299d8 YY |
813 | config SIBYTE_LITTLESUR |
814 | bool "Sibyte BCM91250C2-LittleSur" | |
5e83d430 | 815 | select BOOT_ELF32 |
fcf3ca4c | 816 | select HAVE_PATA_PLATFORM |
5e83d430 RB |
817 | select SIBYTE_SB1250 |
818 | select SWAP_IO_SPACE | |
7cf8053b | 819 | select SYS_HAS_CPU_SB1 |
5e83d430 RB |
820 | select SYS_SUPPORTS_BIG_ENDIAN |
821 | select SYS_SUPPORTS_HIGHMEM | |
822 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
756d6d83 | 823 | select ZONE_DMA32 if 64BIT |
1da177e4 | 824 | |
ade299d8 YY |
825 | config SIBYTE_SENTOSA |
826 | bool "Sibyte BCM91250E-Sentosa" | |
5e83d430 | 827 | select BOOT_ELF32 |
5e83d430 RB |
828 | select SIBYTE_SB1250 |
829 | select SWAP_IO_SPACE | |
7cf8053b | 830 | select SYS_HAS_CPU_SB1 |
5e83d430 | 831 | select SYS_SUPPORTS_BIG_ENDIAN |
5e83d430 | 832 | select SYS_SUPPORTS_LITTLE_ENDIAN |
e4849aff | 833 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
1da177e4 | 834 | |
ade299d8 YY |
835 | config SIBYTE_BIGSUR |
836 | bool "Sibyte BCM91480B-BigSur" | |
5e83d430 | 837 | select BOOT_ELF32 |
ade299d8 | 838 | select NR_CPUS_DEFAULT_4 |
ade299d8 | 839 | select SIBYTE_BCM1x80 |
5e83d430 | 840 | select SWAP_IO_SPACE |
7cf8053b | 841 | select SYS_HAS_CPU_SB1 |
5e83d430 | 842 | select SYS_SUPPORTS_BIG_ENDIAN |
651194f8 | 843 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 844 | select SYS_SUPPORTS_LITTLE_ENDIAN |
cce335ae | 845 | select ZONE_DMA32 if 64BIT |
e4849aff | 846 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
1da177e4 | 847 | |
14b36af4 TB |
848 | config SNI_RM |
849 | bool "SNI RM200/300/400" | |
0e2794b0 RB |
850 | select FW_ARC if CPU_LITTLE_ENDIAN |
851 | select FW_ARC32 if CPU_LITTLE_ENDIAN | |
aaa9fad3 | 852 | select FW_SNIPROM if CPU_BIG_ENDIAN |
61ed242d | 853 | select ARCH_MAY_HAVE_PC_FDC |
a211a082 | 854 | select ARCH_MIGHT_HAVE_PC_PARPORT |
7a407aa5 | 855 | select ARCH_MIGHT_HAVE_PC_SERIO |
1da177e4 | 856 | select BOOT_ELF32 |
42f77542 | 857 | select CEVT_R4K |
940f6b48 | 858 | select CSRC_R4K |
e2defae5 | 859 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
1da177e4 LT |
860 | select DMA_NONCOHERENT |
861 | select GENERIC_ISA_DMA | |
6630a8e5 | 862 | select HAVE_EISA |
8a118c38 | 863 | select HAVE_PCSPKR_PLATFORM |
eb01d42a | 864 | select HAVE_PCI |
67e38cf2 | 865 | select IRQ_MIPS_CPU |
d865bea4 | 866 | select I8253 |
1da177e4 LT |
867 | select I8259 |
868 | select ISA | |
eb8d40bb | 869 | select MIPS_L1_CACHE_SHIFT_6 |
4a0312fc | 870 | select SWAP_IO_SPACE if CPU_BIG_ENDIAN |
7cf8053b | 871 | select SYS_HAS_CPU_R4X00 |
4a0312fc | 872 | select SYS_HAS_CPU_R5000 |
c066a32a | 873 | select SYS_HAS_CPU_R10000 |
4a0312fc | 874 | select R5000_CPU_SCACHE |
36a88530 | 875 | select SYS_HAS_EARLY_PRINTK |
ed5ba2fb | 876 | select SYS_SUPPORTS_32BIT_KERNEL |
7d60717e | 877 | select SYS_SUPPORTS_64BIT_KERNEL |
4a0312fc | 878 | select SYS_SUPPORTS_BIG_ENDIAN |
797798c1 | 879 | select SYS_SUPPORTS_HIGHMEM |
5e83d430 | 880 | select SYS_SUPPORTS_LITTLE_ENDIAN |
1da177e4 | 881 | help |
14b36af4 TB |
882 | The SNI RM200/300/400 are MIPS-based machines manufactured by |
883 | Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid | |
1da177e4 LT |
884 | Technology and now in turn merged with Fujitsu. Say Y here to |
885 | support this machine type. | |
886 | ||
edcaf1a6 AN |
887 | config MACH_TX39XX |
888 | bool "Toshiba TX39 series based machines" | |
5e83d430 | 889 | |
edcaf1a6 AN |
890 | config MACH_TX49XX |
891 | bool "Toshiba TX49 series based machines" | |
5e83d430 | 892 | |
73b4390f RB |
893 | config MIKROTIK_RB532 |
894 | bool "Mikrotik RB532 boards" | |
895 | select CEVT_R4K | |
896 | select CSRC_R4K | |
897 | select DMA_NONCOHERENT | |
eb01d42a | 898 | select HAVE_PCI |
67e38cf2 | 899 | select IRQ_MIPS_CPU |
73b4390f RB |
900 | select SYS_HAS_CPU_MIPS32_R1 |
901 | select SYS_SUPPORTS_32BIT_KERNEL | |
902 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
903 | select SWAP_IO_SPACE | |
904 | select BOOT_RAW | |
d30a2b47 | 905 | select GPIOLIB |
930beb5a | 906 | select MIPS_L1_CACHE_SHIFT_4 |
73b4390f RB |
907 | help |
908 | Support the Mikrotik(tm) RouterBoard 532 series, | |
909 | based on the IDT RC32434 SoC. | |
910 | ||
9ddebc46 DD |
911 | config CAVIUM_OCTEON_SOC |
912 | bool "Cavium Networks Octeon SoC based boards" | |
a86c7f72 | 913 | select CEVT_R4K |
ea8c64ac | 914 | select ARCH_HAS_PHYS_TO_DMA |
1753d50c | 915 | select HAVE_RAPIDIO |
d4a451d5 | 916 | select PHYS_ADDR_T_64BIT |
a86c7f72 DD |
917 | select SYS_SUPPORTS_64BIT_KERNEL |
918 | select SYS_SUPPORTS_BIG_ENDIAN | |
f65aad41 | 919 | select EDAC_SUPPORT |
b01aec9b | 920 | select EDAC_ATOMIC_SCRUB |
73569d87 DD |
921 | select SYS_SUPPORTS_LITTLE_ENDIAN |
922 | select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN | |
a86c7f72 | 923 | select SYS_HAS_EARLY_PRINTK |
5e683389 | 924 | select SYS_HAS_CPU_CAVIUM_OCTEON |
eb01d42a | 925 | select HAVE_PCI |
f00e001e | 926 | select ZONE_DMA32 |
465aaed0 | 927 | select HOLES_IN_ZONE |
d30a2b47 | 928 | select GPIOLIB |
6e511163 DD |
929 | select LIBFDT |
930 | select USE_OF | |
931 | select ARCH_SPARSEMEM_ENABLE | |
932 | select SYS_SUPPORTS_SMP | |
7820b84b DD |
933 | select NR_CPUS_DEFAULT_64 |
934 | select MIPS_NR_CPU_NR_MAP_1024 | |
e326479f | 935 | select BUILTIN_DTB |
8c1e6b14 | 936 | select MTD_COMPLEX_MAPPINGS |
09230cbc | 937 | select SWIOTLB |
3ff72be4 | 938 | select SYS_SUPPORTS_RELOCATABLE |
a86c7f72 DD |
939 | help |
940 | This option supports all of the Octeon reference boards from Cavium | |
941 | Networks. It builds a kernel that dynamically determines the Octeon | |
942 | CPU type and supports all known board reference implementations. | |
943 | Some of the supported boards are: | |
944 | EBT3000 | |
945 | EBH3000 | |
946 | EBH3100 | |
947 | Thunder | |
948 | Kodama | |
949 | Hikari | |
950 | Say Y here for most Octeon reference boards. | |
951 | ||
7f058e85 J |
952 | config NLM_XLR_BOARD |
953 | bool "Netlogic XLR/XLS based systems" | |
7f058e85 J |
954 | select BOOT_ELF32 |
955 | select NLM_COMMON | |
7f058e85 J |
956 | select SYS_HAS_CPU_XLR |
957 | select SYS_SUPPORTS_SMP | |
eb01d42a | 958 | select HAVE_PCI |
7f058e85 J |
959 | select SWAP_IO_SPACE |
960 | select SYS_SUPPORTS_32BIT_KERNEL | |
961 | select SYS_SUPPORTS_64BIT_KERNEL | |
d4a451d5 | 962 | select PHYS_ADDR_T_64BIT |
7f058e85 J |
963 | select SYS_SUPPORTS_BIG_ENDIAN |
964 | select SYS_SUPPORTS_HIGHMEM | |
7f058e85 J |
965 | select NR_CPUS_DEFAULT_32 |
966 | select CEVT_R4K | |
967 | select CSRC_R4K | |
67e38cf2 | 968 | select IRQ_MIPS_CPU |
b97215fd | 969 | select ZONE_DMA32 if 64BIT |
7f058e85 J |
970 | select SYNC_R4K |
971 | select SYS_HAS_EARLY_PRINTK | |
8f0b0430 J |
972 | select SYS_SUPPORTS_ZBOOT |
973 | select SYS_SUPPORTS_ZBOOT_UART16550 | |
7f058e85 J |
974 | help |
975 | Support for systems based on Netlogic XLR and XLS processors. | |
976 | Say Y here if you have a XLR or XLS based board. | |
977 | ||
1c773ea4 J |
978 | config NLM_XLP_BOARD |
979 | bool "Netlogic XLP based systems" | |
1c773ea4 J |
980 | select BOOT_ELF32 |
981 | select NLM_COMMON | |
982 | select SYS_HAS_CPU_XLP | |
983 | select SYS_SUPPORTS_SMP | |
eb01d42a | 984 | select HAVE_PCI |
1c773ea4 J |
985 | select SYS_SUPPORTS_32BIT_KERNEL |
986 | select SYS_SUPPORTS_64BIT_KERNEL | |
d4a451d5 | 987 | select PHYS_ADDR_T_64BIT |
d30a2b47 | 988 | select GPIOLIB |
1c773ea4 J |
989 | select SYS_SUPPORTS_BIG_ENDIAN |
990 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
991 | select SYS_SUPPORTS_HIGHMEM | |
1c773ea4 J |
992 | select NR_CPUS_DEFAULT_32 |
993 | select CEVT_R4K | |
994 | select CSRC_R4K | |
67e38cf2 | 995 | select IRQ_MIPS_CPU |
b97215fd | 996 | select ZONE_DMA32 if 64BIT |
1c773ea4 J |
997 | select SYNC_R4K |
998 | select SYS_HAS_EARLY_PRINTK | |
2f6528e1 | 999 | select USE_OF |
8f0b0430 J |
1000 | select SYS_SUPPORTS_ZBOOT |
1001 | select SYS_SUPPORTS_ZBOOT_UART16550 | |
1c773ea4 J |
1002 | help |
1003 | This board is based on Netlogic XLP Processor. | |
1004 | Say Y here if you have a XLP based board. | |
1005 | ||
9bc463be DD |
1006 | config MIPS_PARAVIRT |
1007 | bool "Para-Virtualized guest system" | |
1008 | select CEVT_R4K | |
1009 | select CSRC_R4K | |
9bc463be DD |
1010 | select SYS_SUPPORTS_64BIT_KERNEL |
1011 | select SYS_SUPPORTS_32BIT_KERNEL | |
1012 | select SYS_SUPPORTS_BIG_ENDIAN | |
1013 | select SYS_SUPPORTS_SMP | |
1014 | select NR_CPUS_DEFAULT_4 | |
1015 | select SYS_HAS_EARLY_PRINTK | |
1016 | select SYS_HAS_CPU_MIPS32_R2 | |
1017 | select SYS_HAS_CPU_MIPS64_R2 | |
1018 | select SYS_HAS_CPU_CAVIUM_OCTEON | |
eb01d42a | 1019 | select HAVE_PCI |
9bc463be DD |
1020 | select SWAP_IO_SPACE |
1021 | help | |
1022 | This option supports guest running under ???? | |
1023 | ||
5e83d430 | 1024 | endchoice |
1da177e4 | 1025 | |
e8c7c482 | 1026 | source "arch/mips/alchemy/Kconfig" |
3b12308f | 1027 | source "arch/mips/ath25/Kconfig" |
d4a67d9d | 1028 | source "arch/mips/ath79/Kconfig" |
a656ffcb | 1029 | source "arch/mips/bcm47xx/Kconfig" |
e7300d04 | 1030 | source "arch/mips/bcm63xx/Kconfig" |
8945e37e | 1031 | source "arch/mips/bmips/Kconfig" |
eed0eabd | 1032 | source "arch/mips/generic/Kconfig" |
5e83d430 | 1033 | source "arch/mips/jazz/Kconfig" |
5ebabe59 | 1034 | source "arch/mips/jz4740/Kconfig" |
8ec6d935 | 1035 | source "arch/mips/lantiq/Kconfig" |
1f21d2bd | 1036 | source "arch/mips/lasat/Kconfig" |
2572f00d | 1037 | source "arch/mips/pic32/Kconfig" |
af0cfb2c | 1038 | source "arch/mips/pistachio/Kconfig" |
0f3a05cb | 1039 | source "arch/mips/pmcs-msp71xx/Kconfig" |
ae2b5bb6 | 1040 | source "arch/mips/ralink/Kconfig" |
29c48699 | 1041 | source "arch/mips/sgi-ip27/Kconfig" |
38b18f72 | 1042 | source "arch/mips/sibyte/Kconfig" |
22b1d707 | 1043 | source "arch/mips/txx9/Kconfig" |
5e83d430 | 1044 | source "arch/mips/vr41xx/Kconfig" |
a86c7f72 | 1045 | source "arch/mips/cavium-octeon/Kconfig" |
30ad29bb HC |
1046 | source "arch/mips/loongson32/Kconfig" |
1047 | source "arch/mips/loongson64/Kconfig" | |
7f058e85 | 1048 | source "arch/mips/netlogic/Kconfig" |
ae6e7e63 | 1049 | source "arch/mips/paravirt/Kconfig" |
38b18f72 | 1050 | |
5e83d430 RB |
1051 | endmenu |
1052 | ||
3c9ee7ef AM |
1053 | config GENERIC_HWEIGHT |
1054 | bool | |
1055 | default y | |
1056 | ||
1da177e4 LT |
1057 | config GENERIC_CALIBRATE_DELAY |
1058 | bool | |
1059 | default y | |
1060 | ||
ae1e9130 | 1061 | config SCHED_OMIT_FRAME_POINTER |
1cc89038 AN |
1062 | bool |
1063 | default y | |
1064 | ||
1da177e4 LT |
1065 | # |
1066 | # Select some configuration options automatically based on user selections. | |
1067 | # | |
0e2794b0 | 1068 | config FW_ARC |
1da177e4 | 1069 | bool |
1da177e4 | 1070 | |
61ed242d RB |
1071 | config ARCH_MAY_HAVE_PC_FDC |
1072 | bool | |
1073 | ||
9267a30d MSJ |
1074 | config BOOT_RAW |
1075 | bool | |
1076 | ||
217dd11e RB |
1077 | config CEVT_BCM1480 |
1078 | bool | |
1079 | ||
6457d9fc YY |
1080 | config CEVT_DS1287 |
1081 | bool | |
1082 | ||
1097c6ac YY |
1083 | config CEVT_GT641XX |
1084 | bool | |
1085 | ||
42f77542 RB |
1086 | config CEVT_R4K |
1087 | bool | |
1088 | ||
217dd11e RB |
1089 | config CEVT_SB1250 |
1090 | bool | |
1091 | ||
229f773e AN |
1092 | config CEVT_TXX9 |
1093 | bool | |
1094 | ||
217dd11e RB |
1095 | config CSRC_BCM1480 |
1096 | bool | |
1097 | ||
4247417d YY |
1098 | config CSRC_IOASIC |
1099 | bool | |
1100 | ||
940f6b48 RB |
1101 | config CSRC_R4K |
1102 | bool | |
1103 | ||
217dd11e RB |
1104 | config CSRC_SB1250 |
1105 | bool | |
1106 | ||
a7f4df4e AS |
1107 | config MIPS_CLOCK_VSYSCALL |
1108 | def_bool CSRC_R4K || CLKSRC_MIPS_GIC | |
1109 | ||
a9aec7fe | 1110 | config GPIO_TXX9 |
d30a2b47 | 1111 | select GPIOLIB |
a9aec7fe AN |
1112 | bool |
1113 | ||
0e2794b0 | 1114 | config FW_CFE |
df78b5c8 AJ |
1115 | bool |
1116 | ||
40e084a5 RB |
1117 | config ARCH_SUPPORTS_UPROBES |
1118 | bool | |
1119 | ||
885014bc | 1120 | config DMA_MAYBE_COHERENT |
f3ecc0ff | 1121 | select ARCH_HAS_DMA_COHERENCE_H |
885014bc FF |
1122 | select DMA_NONCOHERENT |
1123 | bool | |
1124 | ||
20d33064 PB |
1125 | config DMA_PERDEV_COHERENT |
1126 | bool | |
347cb6af | 1127 | select ARCH_HAS_SETUP_DMA_OPS |
5748e1b3 | 1128 | select DMA_NONCOHERENT |
20d33064 | 1129 | |
4ce588cd RB |
1130 | config DMA_NONCOHERENT |
1131 | bool | |
db91427b CH |
1132 | # |
1133 | # MIPS allows mixing "slightly different" Cacheability and Coherency | |
1134 | # Attribute bits. It is believed that the uncached access through | |
1135 | # KSEG1 and the implementation specific "uncached accelerated" used | |
1136 | # by pgprot_writcombine can be mixed, and the latter sometimes provides | |
1137 | # significant advantages. | |
1138 | # | |
419e2f18 | 1139 | select ARCH_HAS_DMA_WRITE_COMBINE |
f8c55dc6 | 1140 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE |
2ee7a4ef | 1141 | select ARCH_HAS_UNCACHED_SEGMENT |
e1e02b32 | 1142 | select NEED_DMA_MAP_STATE |
58b04406 | 1143 | select ARCH_HAS_DMA_COHERENT_TO_PFN |
f8c55dc6 | 1144 | select DMA_NONCOHERENT_CACHE_SYNC |
4ce588cd | 1145 | |
36a88530 | 1146 | config SYS_HAS_EARLY_PRINTK |
1da177e4 | 1147 | bool |
1da177e4 | 1148 | |
1b2bc75c | 1149 | config SYS_SUPPORTS_HOTPLUG_CPU |
dbb74540 | 1150 | bool |
dbb74540 | 1151 | |
1da177e4 LT |
1152 | config MIPS_BONITO64 |
1153 | bool | |
1da177e4 LT |
1154 | |
1155 | config MIPS_MSC | |
1156 | bool | |
1da177e4 | 1157 | |
1f21d2bd BM |
1158 | config MIPS_NILE4 |
1159 | bool | |
1160 | ||
39b8d525 RB |
1161 | config SYNC_R4K |
1162 | bool | |
1163 | ||
487d70d0 GJ |
1164 | config MIPS_MACHINE |
1165 | def_bool n | |
1166 | ||
ce816fa8 | 1167 | config NO_IOPORT_MAP |
d388d685 MR |
1168 | def_bool n |
1169 | ||
4e0748f5 MC |
1170 | config GENERIC_CSUM |
1171 | bool | |
932afdee | 1172 | default y if !CPU_HAS_LOAD_STORE_LR |
4e0748f5 | 1173 | |
8313da30 RB |
1174 | config GENERIC_ISA_DMA |
1175 | bool | |
1176 | select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n | |
a35bee8a | 1177 | select ISA_DMA_API |
8313da30 | 1178 | |
aa414dff RB |
1179 | config GENERIC_ISA_DMA_SUPPORT_BROKEN |
1180 | bool | |
8313da30 | 1181 | select GENERIC_ISA_DMA |
aa414dff | 1182 | |
a35bee8a NK |
1183 | config ISA_DMA_API |
1184 | bool | |
1185 | ||
465aaed0 DD |
1186 | config HOLES_IN_ZONE |
1187 | bool | |
1188 | ||
8c530ea3 MR |
1189 | config SYS_SUPPORTS_RELOCATABLE |
1190 | bool | |
1191 | help | |
371a4151 EWI |
1192 | Selected if the platform supports relocating the kernel. |
1193 | The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF | |
1194 | to allow access to command line and entropy sources. | |
8c530ea3 | 1195 | |
f381bf6d DD |
1196 | config MIPS_CBPF_JIT |
1197 | def_bool y | |
1198 | depends on BPF_JIT && HAVE_CBPF_JIT | |
1199 | ||
1200 | config MIPS_EBPF_JIT | |
1201 | def_bool y | |
1202 | depends on BPF_JIT && HAVE_EBPF_JIT | |
1203 | ||
1204 | ||
5e83d430 | 1205 | # |
6b2aac42 | 1206 | # Endianness selection. Sufficiently obscure so many users don't know what to |
5e83d430 RB |
1207 | # answer,so we try hard to limit the available choices. Also the use of a |
1208 | # choice statement should be more obvious to the user. | |
1209 | # | |
1210 | choice | |
6b2aac42 | 1211 | prompt "Endianness selection" |
1da177e4 LT |
1212 | help |
1213 | Some MIPS machines can be configured for either little or big endian | |
5e83d430 | 1214 | byte order. These modes require different kernels and a different |
3cb2fccc | 1215 | Linux distribution. In general there is one preferred byteorder for a |
5e83d430 | 1216 | particular system but some systems are just as commonly used in the |
3dde6ad8 | 1217 | one or the other endianness. |
5e83d430 RB |
1218 | |
1219 | config CPU_BIG_ENDIAN | |
1220 | bool "Big endian" | |
1221 | depends on SYS_SUPPORTS_BIG_ENDIAN | |
1222 | ||
1223 | config CPU_LITTLE_ENDIAN | |
1224 | bool "Little endian" | |
1225 | depends on SYS_SUPPORTS_LITTLE_ENDIAN | |
5e83d430 RB |
1226 | |
1227 | endchoice | |
1228 | ||
22b0763a DD |
1229 | config EXPORT_UASM |
1230 | bool | |
1231 | ||
2116245e RB |
1232 | config SYS_SUPPORTS_APM_EMULATION |
1233 | bool | |
1234 | ||
5e83d430 RB |
1235 | config SYS_SUPPORTS_BIG_ENDIAN |
1236 | bool | |
1237 | ||
1238 | config SYS_SUPPORTS_LITTLE_ENDIAN | |
1239 | bool | |
1da177e4 | 1240 | |
9cffd154 DD |
1241 | config SYS_SUPPORTS_HUGETLBFS |
1242 | bool | |
45e03e62 | 1243 | depends on CPU_SUPPORTS_HUGEPAGES |
9cffd154 DD |
1244 | default y |
1245 | ||
aa1762f4 DD |
1246 | config MIPS_HUGE_TLB_SUPPORT |
1247 | def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE | |
1248 | ||
1da177e4 LT |
1249 | config IRQ_CPU_RM7K |
1250 | bool | |
1251 | ||
9267a30d MSJ |
1252 | config IRQ_MSP_SLP |
1253 | bool | |
1254 | ||
1255 | config IRQ_MSP_CIC | |
1256 | bool | |
1257 | ||
8420fd00 AN |
1258 | config IRQ_TXX9 |
1259 | bool | |
1260 | ||
d5ab1a69 YY |
1261 | config IRQ_GT641XX |
1262 | bool | |
1263 | ||
252161ec | 1264 | config PCI_GT64XXX_PCI0 |
1da177e4 | 1265 | bool |
1da177e4 | 1266 | |
a57140e9 TB |
1267 | config PCI_XTALK_BRIDGE |
1268 | bool | |
1269 | ||
9267a30d MSJ |
1270 | config NO_EXCEPT_FILL |
1271 | bool | |
1272 | ||
a83860c2 RB |
1273 | config SOC_EMMA2RH |
1274 | bool | |
1275 | select CEVT_R4K | |
1276 | select CSRC_R4K | |
1277 | select DMA_NONCOHERENT | |
67e38cf2 | 1278 | select IRQ_MIPS_CPU |
a83860c2 RB |
1279 | select SWAP_IO_SPACE |
1280 | select SYS_HAS_CPU_R5500 | |
1281 | select SYS_SUPPORTS_32BIT_KERNEL | |
1282 | select SYS_SUPPORTS_64BIT_KERNEL | |
1283 | select SYS_SUPPORTS_BIG_ENDIAN | |
1284 | ||
edb6310a DL |
1285 | config SOC_PNX833X |
1286 | bool | |
1287 | select CEVT_R4K | |
1288 | select CSRC_R4K | |
67e38cf2 | 1289 | select IRQ_MIPS_CPU |
edb6310a DL |
1290 | select DMA_NONCOHERENT |
1291 | select SYS_HAS_CPU_MIPS32_R2 | |
1292 | select SYS_SUPPORTS_32BIT_KERNEL | |
1293 | select SYS_SUPPORTS_LITTLE_ENDIAN | |
1294 | select SYS_SUPPORTS_BIG_ENDIAN | |
377cb1b6 | 1295 | select SYS_SUPPORTS_MIPS16 |
edb6310a DL |
1296 | select CPU_MIPSR2_IRQ_VI |
1297 | ||
1298 | config SOC_PNX8335 | |
1299 | bool | |
1300 | select SOC_PNX833X | |
1301 | ||
a7e07b1a MC |
1302 | config MIPS_SPRAM |
1303 | bool | |
1304 | ||
1da177e4 LT |
1305 | config SWAP_IO_SPACE |
1306 | bool | |
1307 | ||
e2defae5 TB |
1308 | config SGI_HAS_INDYDOG |
1309 | bool | |
1310 | ||
5b438c44 TB |
1311 | config SGI_HAS_HAL2 |
1312 | bool | |
1313 | ||
e2defae5 TB |
1314 | config SGI_HAS_SEEQ |
1315 | bool | |
1316 | ||
1317 | config SGI_HAS_WD93 | |
1318 | bool | |
1319 | ||
1320 | config SGI_HAS_ZILOG | |
1321 | bool | |
1322 | ||
1323 | config SGI_HAS_I8042 | |
1324 | bool | |
1325 | ||
1326 | config DEFAULT_SGI_PARTITION | |
1327 | bool | |
1328 | ||
0e2794b0 | 1329 | config FW_ARC32 |
5e83d430 RB |
1330 | bool |
1331 | ||
aaa9fad3 | 1332 | config FW_SNIPROM |
231a35d3 TB |
1333 | bool |
1334 | ||
1da177e4 LT |
1335 | config BOOT_ELF32 |
1336 | bool | |
1da177e4 | 1337 | |
930beb5a FF |
1338 | config MIPS_L1_CACHE_SHIFT_4 |
1339 | bool | |
1340 | ||
1341 | config MIPS_L1_CACHE_SHIFT_5 | |
1342 | bool | |
1343 | ||
1344 | config MIPS_L1_CACHE_SHIFT_6 | |
1345 | bool | |
1346 | ||
1347 | config MIPS_L1_CACHE_SHIFT_7 | |
1348 | bool | |
1349 | ||
1da177e4 LT |
1350 | config MIPS_L1_CACHE_SHIFT |
1351 | int | |
a4c0201e | 1352 | default "7" if MIPS_L1_CACHE_SHIFT_7 |
5432eeb6 KC |
1353 | default "6" if MIPS_L1_CACHE_SHIFT_6 |
1354 | default "5" if MIPS_L1_CACHE_SHIFT_5 | |
1355 | default "4" if MIPS_L1_CACHE_SHIFT_4 | |
1da177e4 LT |
1356 | default "5" |
1357 | ||
1da177e4 LT |
1358 | config HAVE_STD_PC_SERIAL_PORT |
1359 | bool | |
1360 | ||
1da177e4 LT |
1361 | config ARC_CONSOLE |
1362 | bool "ARC console support" | |
e2defae5 | 1363 | depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) |
1da177e4 LT |
1364 | |
1365 | config ARC_MEMORY | |
1366 | bool | |
14b36af4 | 1367 | depends on MACH_JAZZ || SNI_RM || SGI_IP32 |
1da177e4 LT |
1368 | default y |
1369 | ||
1370 | config ARC_PROMLIB | |
1371 | bool | |
e2defae5 | 1372 | depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 |
1da177e4 LT |
1373 | default y |
1374 | ||
0e2794b0 | 1375 | config FW_ARC64 |
1da177e4 | 1376 | bool |
1da177e4 LT |
1377 | |
1378 | config BOOT_ELF64 | |
1379 | bool | |
1da177e4 | 1380 | |
1da177e4 LT |
1381 | menu "CPU selection" |
1382 | ||
1383 | choice | |
1384 | prompt "CPU type" | |
1385 | default CPU_R4X00 | |
1386 | ||
0e476d91 HC |
1387 | config CPU_LOONGSON3 |
1388 | bool "Loongson 3 CPU" | |
1389 | depends on SYS_HAS_CPU_LOONGSON3 | |
d3bc81be | 1390 | select ARCH_HAS_PHYS_TO_DMA |
0e476d91 HC |
1391 | select CPU_SUPPORTS_64BIT_KERNEL |
1392 | select CPU_SUPPORTS_HIGHMEM | |
1393 | select CPU_SUPPORTS_HUGEPAGES | |
932afdee | 1394 | select CPU_HAS_LOAD_STORE_LR |
0e476d91 HC |
1395 | select WEAK_ORDERING |
1396 | select WEAK_REORDERING_BEYOND_LLSC | |
b2edcfc8 | 1397 | select MIPS_PGD_C0_CONTEXT |
17c99d94 | 1398 | select MIPS_L1_CACHE_SHIFT_6 |
c42594b5 | 1399 | select MIPS_FP_SUPPORT |
d30a2b47 | 1400 | select GPIOLIB |
09230cbc | 1401 | select SWIOTLB |
0e476d91 HC |
1402 | help |
1403 | The Loongson 3 processor implements the MIPS64R2 instruction | |
1404 | set with many extensions. | |
1405 | ||
1e820da3 HC |
1406 | config LOONGSON3_ENHANCEMENT |
1407 | bool "New Loongson 3 CPU Enhancements" | |
1408 | default n | |
1409 | select CPU_MIPSR2 | |
1410 | select CPU_HAS_PREFETCH | |
1411 | depends on CPU_LOONGSON3 | |
1412 | help | |
1413 | New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A | |
1414 | R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as | |
1415 | FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User | |
1416 | Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), | |
1417 | Fast TLB refill support, etc. | |
1418 | ||
1419 | This option enable those enhancements which are not probed at run | |
1420 | time. If you want a generic kernel to run on all Loongson 3 machines, | |
1421 | please say 'N' here. If you want a high-performance kernel to run on | |
1422 | new Loongson 3 machines only, please say 'Y' here. | |
1423 | ||
e02e07e3 HC |
1424 | config CPU_LOONGSON3_WORKAROUNDS |
1425 | bool "Old Loongson 3 LLSC Workarounds" | |
1426 | default y if SMP | |
1427 | depends on CPU_LOONGSON3 | |
1428 | help | |
1429 | Loongson 3 processors have the llsc issues which require workarounds. | |
1430 | Without workarounds the system may hang unexpectedly. | |
1431 | ||
1432 | Newer Loongson 3 will fix these issues and no workarounds are needed. | |
1433 | The workarounds have no significant side effect on them but may | |
1434 | decrease the performance of the system so this option should be | |
1435 | disabled unless the kernel is intended to be run on old systems. | |
1436 | ||
1437 | If unsure, please say Y. | |
1438 | ||
3702bba5 WZ |
1439 | config CPU_LOONGSON2E |
1440 | bool "Loongson 2E" | |
1441 | depends on SYS_HAS_CPU_LOONGSON2E | |
1442 | select CPU_LOONGSON2 | |
2a21c730 FZ |
1443 | help |
1444 | The Loongson 2E processor implements the MIPS III instruction set | |
1445 | with many extensions. | |
1446 | ||
25985edc | 1447 | It has an internal FPGA northbridge, which is compatible to |
6f7a251a WZ |
1448 | bonito64. |
1449 | ||
1450 | config CPU_LOONGSON2F | |
1451 | bool "Loongson 2F" | |
1452 | depends on SYS_HAS_CPU_LOONGSON2F | |
1453 | select CPU_LOONGSON2 | |
d30a2b47 | 1454 | select GPIOLIB |
6f7a251a WZ |
1455 | help |
1456 | The Loongson 2F processor implements the MIPS III instruction set | |
1457 | with many extensions. | |
1458 | ||
1459 | Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller | |
1460 | have a similar programming interface with FPGA northbridge used in | |
1461 | Loongson2E. | |
1462 | ||
ca585cf9 KC |
1463 | config CPU_LOONGSON1B |
1464 | bool "Loongson 1B" | |
1465 | depends on SYS_HAS_CPU_LOONGSON1B | |
1466 | select CPU_LOONGSON1 | |
9ec88b60 | 1467 | select LEDS_GPIO_REGISTER |
ca585cf9 KC |
1468 | help |
1469 | The Loongson 1B is a 32-bit SoC, which implements the MIPS32 | |
968dc5a0 XZ |
1470 | Release 1 instruction set and part of the MIPS32 Release 2 |
1471 | instruction set. | |
ca585cf9 | 1472 | |
12e3280b YL |
1473 | config CPU_LOONGSON1C |
1474 | bool "Loongson 1C" | |
1475 | depends on SYS_HAS_CPU_LOONGSON1C | |
1476 | select CPU_LOONGSON1 | |
12e3280b YL |
1477 | select LEDS_GPIO_REGISTER |
1478 | help | |
1479 | The Loongson 1C is a 32-bit SoC, which implements the MIPS32 | |
968dc5a0 XZ |
1480 | Release 1 instruction set and part of the MIPS32 Release 2 |
1481 | instruction set. | |
12e3280b | 1482 | |
6e760c8d RB |
1483 | config CPU_MIPS32_R1 |
1484 | bool "MIPS32 Release 1" | |
7cf8053b | 1485 | depends on SYS_HAS_CPU_MIPS32_R1 |
6e760c8d | 1486 | select CPU_HAS_PREFETCH |
932afdee | 1487 | select CPU_HAS_LOAD_STORE_LR |
797798c1 | 1488 | select CPU_SUPPORTS_32BIT_KERNEL |
ec28f306 | 1489 | select CPU_SUPPORTS_HIGHMEM |
1e5f1caa | 1490 | help |
5e83d430 | 1491 | Choose this option to build a kernel for release 1 or later of the |
1e5f1caa RB |
1492 | MIPS32 architecture. Most modern embedded systems with a 32-bit |
1493 | MIPS processor are based on a MIPS32 processor. If you know the | |
1494 | specific type of processor in your system, choose those that one | |
1495 | otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. | |
1496 | Release 2 of the MIPS32 architecture is available since several | |
1497 | years so chances are you even have a MIPS32 Release 2 processor | |
1498 | in which case you should choose CPU_MIPS32_R2 instead for better | |
1499 | performance. | |
1500 | ||
1501 | config CPU_MIPS32_R2 | |
1502 | bool "MIPS32 Release 2" | |
7cf8053b | 1503 | depends on SYS_HAS_CPU_MIPS32_R2 |
1e5f1caa | 1504 | select CPU_HAS_PREFETCH |
932afdee | 1505 | select CPU_HAS_LOAD_STORE_LR |
797798c1 | 1506 | select CPU_SUPPORTS_32BIT_KERNEL |
ec28f306 | 1507 | select CPU_SUPPORTS_HIGHMEM |
a5e9a69e | 1508 | select CPU_SUPPORTS_MSA |
2235a54d | 1509 | select HAVE_KVM |
6e760c8d | 1510 | help |
5e83d430 | 1511 | Choose this option to build a kernel for release 2 or later of the |
6e760c8d RB |
1512 | MIPS32 architecture. Most modern embedded systems with a 32-bit |
1513 | MIPS processor are based on a MIPS32 processor. If you know the | |
1514 | specific type of processor in your system, choose those that one | |
1515 | otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. | |
1516 | ||
7fd08ca5 | 1517 | config CPU_MIPS32_R6 |
674d10e2 | 1518 | bool "MIPS32 Release 6" |
7fd08ca5 LY |
1519 | depends on SYS_HAS_CPU_MIPS32_R6 |
1520 | select CPU_HAS_PREFETCH | |
1521 | select CPU_SUPPORTS_32BIT_KERNEL | |
1522 | select CPU_SUPPORTS_HIGHMEM | |
1523 | select CPU_SUPPORTS_MSA | |
1524 | select HAVE_KVM | |
1525 | select MIPS_O32_FP64_SUPPORT | |
1526 | help | |
1527 | Choose this option to build a kernel for release 6 or later of the | |
1528 | MIPS32 architecture. New MIPS processors, starting with the Warrior | |
1529 | family, are based on a MIPS32r6 processor. If you own an older | |
1530 | processor, you probably need to select MIPS32r1 or MIPS32r2 instead. | |
1531 | ||
6e760c8d RB |
1532 | config CPU_MIPS64_R1 |
1533 | bool "MIPS64 Release 1" | |
7cf8053b | 1534 | depends on SYS_HAS_CPU_MIPS64_R1 |
797798c1 | 1535 | select CPU_HAS_PREFETCH |
932afdee | 1536 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1537 | select CPU_SUPPORTS_32BIT_KERNEL |
1538 | select CPU_SUPPORTS_64BIT_KERNEL | |
ec28f306 | 1539 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1540 | select CPU_SUPPORTS_HUGEPAGES |
6e760c8d RB |
1541 | help |
1542 | Choose this option to build a kernel for release 1 or later of the | |
1543 | MIPS64 architecture. Many modern embedded systems with a 64-bit | |
1544 | MIPS processor are based on a MIPS64 processor. If you know the | |
1545 | specific type of processor in your system, choose those that one | |
1546 | otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. | |
1e5f1caa RB |
1547 | Release 2 of the MIPS64 architecture is available since several |
1548 | years so chances are you even have a MIPS64 Release 2 processor | |
1549 | in which case you should choose CPU_MIPS64_R2 instead for better | |
1550 | performance. | |
1551 | ||
1552 | config CPU_MIPS64_R2 | |
1553 | bool "MIPS64 Release 2" | |
7cf8053b | 1554 | depends on SYS_HAS_CPU_MIPS64_R2 |
797798c1 | 1555 | select CPU_HAS_PREFETCH |
932afdee | 1556 | select CPU_HAS_LOAD_STORE_LR |
1e5f1caa RB |
1557 | select CPU_SUPPORTS_32BIT_KERNEL |
1558 | select CPU_SUPPORTS_64BIT_KERNEL | |
ec28f306 | 1559 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1560 | select CPU_SUPPORTS_HUGEPAGES |
a5e9a69e | 1561 | select CPU_SUPPORTS_MSA |
40a2df49 | 1562 | select HAVE_KVM |
1e5f1caa RB |
1563 | help |
1564 | Choose this option to build a kernel for release 2 or later of the | |
1565 | MIPS64 architecture. Many modern embedded systems with a 64-bit | |
1566 | MIPS processor are based on a MIPS64 processor. If you know the | |
1567 | specific type of processor in your system, choose those that one | |
1568 | otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. | |
1da177e4 | 1569 | |
7fd08ca5 | 1570 | config CPU_MIPS64_R6 |
674d10e2 | 1571 | bool "MIPS64 Release 6" |
7fd08ca5 LY |
1572 | depends on SYS_HAS_CPU_MIPS64_R6 |
1573 | select CPU_HAS_PREFETCH | |
1574 | select CPU_SUPPORTS_32BIT_KERNEL | |
1575 | select CPU_SUPPORTS_64BIT_KERNEL | |
1576 | select CPU_SUPPORTS_HIGHMEM | |
afd375dc | 1577 | select CPU_SUPPORTS_HUGEPAGES |
7fd08ca5 | 1578 | select CPU_SUPPORTS_MSA |
2e6c7747 | 1579 | select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 |
40a2df49 | 1580 | select HAVE_KVM |
7fd08ca5 LY |
1581 | help |
1582 | Choose this option to build a kernel for release 6 or later of the | |
1583 | MIPS64 architecture. New MIPS processors, starting with the Warrior | |
1584 | family, are based on a MIPS64r6 processor. If you own an older | |
1585 | processor, you probably need to select MIPS64r1 or MIPS64r2 instead. | |
1586 | ||
1da177e4 LT |
1587 | config CPU_R3000 |
1588 | bool "R3000" | |
7cf8053b | 1589 | depends on SYS_HAS_CPU_R3000 |
f7062ddb | 1590 | select CPU_HAS_WB |
932afdee | 1591 | select CPU_HAS_LOAD_STORE_LR |
54746829 | 1592 | select CPU_R3K_TLB |
ed5ba2fb | 1593 | select CPU_SUPPORTS_32BIT_KERNEL |
797798c1 | 1594 | select CPU_SUPPORTS_HIGHMEM |
1da177e4 LT |
1595 | help |
1596 | Please make sure to pick the right CPU type. Linux/MIPS is not | |
1597 | designed to be generic, i.e. Kernels compiled for R3000 CPUs will | |
1598 | *not* work on R4000 machines and vice versa. However, since most | |
1599 | of the supported machines have an R4000 (or similar) CPU, R4x00 | |
1600 | might be a safe bet. If the resulting kernel does not work, | |
1601 | try to recompile with R3000. | |
1602 | ||
1603 | config CPU_TX39XX | |
1604 | bool "R39XX" | |
7cf8053b | 1605 | depends on SYS_HAS_CPU_TX39XX |
ed5ba2fb | 1606 | select CPU_SUPPORTS_32BIT_KERNEL |
932afdee | 1607 | select CPU_HAS_LOAD_STORE_LR |
54746829 | 1608 | select CPU_R3K_TLB |
1da177e4 LT |
1609 | |
1610 | config CPU_VR41XX | |
1611 | bool "R41xx" | |
7cf8053b | 1612 | depends on SYS_HAS_CPU_VR41XX |
ed5ba2fb YY |
1613 | select CPU_SUPPORTS_32BIT_KERNEL |
1614 | select CPU_SUPPORTS_64BIT_KERNEL | |
932afdee | 1615 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 | 1616 | help |
5e83d430 | 1617 | The options selects support for the NEC VR4100 series of processors. |
1da177e4 LT |
1618 | Only choose this option if you have one of these processors as a |
1619 | kernel built with this option will not run on any other type of | |
1620 | processor or vice versa. | |
1621 | ||
1da177e4 LT |
1622 | config CPU_R4X00 |
1623 | bool "R4x00" | |
7cf8053b | 1624 | depends on SYS_HAS_CPU_R4X00 |
ed5ba2fb YY |
1625 | select CPU_SUPPORTS_32BIT_KERNEL |
1626 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1627 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1628 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1629 | help |
1630 | MIPS Technologies R4000-series processors other than 4300, including | |
1631 | the R4000, R4400, R4600, and 4700. | |
1632 | ||
1633 | config CPU_TX49XX | |
1634 | bool "R49XX" | |
7cf8053b | 1635 | depends on SYS_HAS_CPU_TX49XX |
de862b48 | 1636 | select CPU_HAS_PREFETCH |
932afdee | 1637 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1638 | select CPU_SUPPORTS_32BIT_KERNEL |
1639 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1640 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1641 | |
1642 | config CPU_R5000 | |
1643 | bool "R5000" | |
7cf8053b | 1644 | depends on SYS_HAS_CPU_R5000 |
ed5ba2fb YY |
1645 | select CPU_SUPPORTS_32BIT_KERNEL |
1646 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1647 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1648 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1649 | help |
1650 | MIPS Technologies R5000-series processors other than the Nevada. | |
1651 | ||
542c1020 SK |
1652 | config CPU_R5500 |
1653 | bool "R5500" | |
1654 | depends on SYS_HAS_CPU_R5500 | |
542c1020 SK |
1655 | select CPU_SUPPORTS_32BIT_KERNEL |
1656 | select CPU_SUPPORTS_64BIT_KERNEL | |
9cffd154 | 1657 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1658 | select CPU_HAS_LOAD_STORE_LR |
542c1020 SK |
1659 | help |
1660 | NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV | |
1661 | instruction set. | |
1662 | ||
1da177e4 LT |
1663 | config CPU_NEVADA |
1664 | bool "RM52xx" | |
7cf8053b | 1665 | depends on SYS_HAS_CPU_NEVADA |
ed5ba2fb YY |
1666 | select CPU_SUPPORTS_32BIT_KERNEL |
1667 | select CPU_SUPPORTS_64BIT_KERNEL | |
970d032f | 1668 | select CPU_SUPPORTS_HUGEPAGES |
932afdee | 1669 | select CPU_HAS_LOAD_STORE_LR |
1da177e4 LT |
1670 | help |
1671 | QED / PMC-Sierra RM52xx-series ("Nevada") processors. | |
1672 | ||
1da177e4 LT |
1673 | config CPU_R10000 |
1674 | bool "R10000" | |
7cf8053b | 1675 | depends on SYS_HAS_CPU_R10000 |
5e83d430 | 1676 | select CPU_HAS_PREFETCH |
932afdee | 1677 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1678 | select CPU_SUPPORTS_32BIT_KERNEL |
1679 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1680 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1681 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1682 | help |
1683 | MIPS Technologies R10000-series processors. | |
1684 | ||
1685 | config CPU_RM7000 | |
1686 | bool "RM7000" | |
7cf8053b | 1687 | depends on SYS_HAS_CPU_RM7000 |
5e83d430 | 1688 | select CPU_HAS_PREFETCH |
932afdee | 1689 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1690 | select CPU_SUPPORTS_32BIT_KERNEL |
1691 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1692 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1693 | select CPU_SUPPORTS_HUGEPAGES |
1da177e4 LT |
1694 | |
1695 | config CPU_SB1 | |
1696 | bool "SB1" | |
7cf8053b | 1697 | depends on SYS_HAS_CPU_SB1 |
932afdee | 1698 | select CPU_HAS_LOAD_STORE_LR |
ed5ba2fb YY |
1699 | select CPU_SUPPORTS_32BIT_KERNEL |
1700 | select CPU_SUPPORTS_64BIT_KERNEL | |
797798c1 | 1701 | select CPU_SUPPORTS_HIGHMEM |
970d032f | 1702 | select CPU_SUPPORTS_HUGEPAGES |
0004a9df | 1703 | select WEAK_ORDERING |
1da177e4 | 1704 | |
a86c7f72 DD |
1705 | config CPU_CAVIUM_OCTEON |
1706 | bool "Cavium Octeon processor" | |
5e683389 | 1707 | depends on SYS_HAS_CPU_CAVIUM_OCTEON |
a86c7f72 | 1708 | select CPU_HAS_PREFETCH |
932afdee | 1709 | select CPU_HAS_LOAD_STORE_LR |
a86c7f72 | 1710 | select CPU_SUPPORTS_64BIT_KERNEL |
a86c7f72 | 1711 | select WEAK_ORDERING |
a86c7f72 | 1712 | select CPU_SUPPORTS_HIGHMEM |
9cffd154 | 1713 | select CPU_SUPPORTS_HUGEPAGES |
df115f3e BH |
1714 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
1715 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | |
930beb5a | 1716 | select MIPS_L1_CACHE_SHIFT_7 |
0ae3abcd | 1717 | select HAVE_KVM |
a86c7f72 DD |
1718 | help |
1719 | The Cavium Octeon processor is a highly integrated chip containing | |
1720 | many ethernet hardware widgets for networking tasks. The processor | |
1721 | can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. | |
1722 | Full details can be found at http://www.caviumnetworks.com. | |
1723 | ||
cd746249 JG |
1724 | config CPU_BMIPS |
1725 | bool "Broadcom BMIPS" | |
1726 | depends on SYS_HAS_CPU_BMIPS | |
1727 | select CPU_MIPS32 | |
fe7f62c0 | 1728 | select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 |
cd746249 JG |
1729 | select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 |
1730 | select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 | |
1731 | select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 | |
1732 | select CPU_SUPPORTS_32BIT_KERNEL | |
1733 | select DMA_NONCOHERENT | |
67e38cf2 | 1734 | select IRQ_MIPS_CPU |
cd746249 JG |
1735 | select SWAP_IO_SPACE |
1736 | select WEAK_ORDERING | |
c1c0c461 | 1737 | select CPU_SUPPORTS_HIGHMEM |
69aaf9c8 | 1738 | select CPU_HAS_PREFETCH |
932afdee | 1739 | select CPU_HAS_LOAD_STORE_LR |
a8d709b0 MM |
1740 | select CPU_SUPPORTS_CPUFREQ |
1741 | select MIPS_EXTERNAL_TIMER | |
c1c0c461 | 1742 | help |
fe7f62c0 | 1743 | Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. |
c1c0c461 | 1744 | |
7f058e85 J |
1745 | config CPU_XLR |
1746 | bool "Netlogic XLR SoC" | |
1747 | depends on SYS_HAS_CPU_XLR | |
932afdee | 1748 | select CPU_HAS_LOAD_STORE_LR |
7f058e85 J |
1749 | select CPU_SUPPORTS_32BIT_KERNEL |
1750 | select CPU_SUPPORTS_64BIT_KERNEL | |
1751 | select CPU_SUPPORTS_HIGHMEM | |
970d032f | 1752 | select CPU_SUPPORTS_HUGEPAGES |
7f058e85 J |
1753 | select WEAK_ORDERING |
1754 | select WEAK_REORDERING_BEYOND_LLSC | |
7f058e85 J |
1755 | help |
1756 | Netlogic Microsystems XLR/XLS processors. | |
1c773ea4 J |
1757 | |
1758 | config CPU_XLP | |
1759 | bool "Netlogic XLP SoC" | |
1760 | depends on SYS_HAS_CPU_XLP | |
1761 | select CPU_SUPPORTS_32BIT_KERNEL | |
1762 | select CPU_SUPPORTS_64BIT_KERNEL | |
1763 | select CPU_SUPPORTS_HIGHMEM | |
1c773ea4 J |
1764 | select WEAK_ORDERING |
1765 | select WEAK_REORDERING_BEYOND_LLSC | |
1766 | select CPU_HAS_PREFETCH | |
932afdee | 1767 | select CPU_HAS_LOAD_STORE_LR |
d6504846 | 1768 | select CPU_MIPSR2 |
ddba6833 | 1769 | select CPU_SUPPORTS_HUGEPAGES |
2db003a5 | 1770 | select MIPS_ASID_BITS_VARIABLE |
1c773ea4 J |
1771 | help |
1772 | Netlogic Microsystems XLP processors. | |
1da177e4 LT |
1773 | endchoice |
1774 | ||
a6e18781 LY |
1775 | config CPU_MIPS32_3_5_FEATURES |
1776 | bool "MIPS32 Release 3.5 Features" | |
1777 | depends on SYS_HAS_CPU_MIPS32_R3_5 | |
7fd08ca5 | 1778 | depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 |
a6e18781 LY |
1779 | help |
1780 | Choose this option to build a kernel for release 2 or later of the | |
1781 | MIPS32 architecture including features from the 3.5 release such as | |
1782 | support for Enhanced Virtual Addressing (EVA). | |
1783 | ||
1784 | config CPU_MIPS32_3_5_EVA | |
1785 | bool "Enhanced Virtual Addressing (EVA)" | |
1786 | depends on CPU_MIPS32_3_5_FEATURES | |
1787 | select EVA | |
1788 | default y | |
1789 | help | |
1790 | Choose this option if you want to enable the Enhanced Virtual | |
1791 | Addressing (EVA) on your MIPS32 core (such as proAptiv). | |
1792 | One of its primary benefits is an increase in the maximum size | |
1793 | of lowmem (up to 3GB). If unsure, say 'N' here. | |
1794 | ||
c5b36783 SH |
1795 | config CPU_MIPS32_R5_FEATURES |
1796 | bool "MIPS32 Release 5 Features" | |
1797 | depends on SYS_HAS_CPU_MIPS32_R5 | |
1798 | depends on CPU_MIPS32_R2 | |
1799 | help | |
1800 | Choose this option to build a kernel for release 2 or later of the | |
1801 | MIPS32 architecture including features from release 5 such as | |
1802 | support for Extended Physical Addressing (XPA). | |
1803 | ||
1804 | config CPU_MIPS32_R5_XPA | |
1805 | bool "Extended Physical Addressing (XPA)" | |
1806 | depends on CPU_MIPS32_R5_FEATURES | |
1807 | depends on !EVA | |
1808 | depends on !PAGE_SIZE_4KB | |
1809 | depends on SYS_SUPPORTS_HIGHMEM | |
1810 | select XPA | |
1811 | select HIGHMEM | |
d4a451d5 | 1812 | select PHYS_ADDR_T_64BIT |
c5b36783 SH |
1813 | default n |
1814 | help | |
1815 | Choose this option if you want to enable the Extended Physical | |
1816 | Addressing (XPA) on your MIPS32 core (such as P5600 series). The | |
1817 | benefit is to increase physical addressing equal to or greater | |
1818 | than 40 bits. Note that this has the side effect of turning on | |
1819 | 64-bit addressing which in turn makes the PTEs 64-bit in size. | |
1820 | If unsure, say 'N' here. | |
1821 | ||
622844bf WZ |
1822 | if CPU_LOONGSON2F |
1823 | config CPU_NOP_WORKAROUNDS | |
1824 | bool | |
1825 | ||
1826 | config CPU_JUMP_WORKAROUNDS | |
1827 | bool | |
1828 | ||
1829 | config CPU_LOONGSON2F_WORKAROUNDS | |
1830 | bool "Loongson 2F Workarounds" | |
1831 | default y | |
1832 | select CPU_NOP_WORKAROUNDS | |
1833 | select CPU_JUMP_WORKAROUNDS | |
1834 | help | |
1835 | Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which | |
1836 | require workarounds. Without workarounds the system may hang | |
1837 | unexpectedly. For more information please refer to the gas | |
1838 | -mfix-loongson2f-nop and -mfix-loongson2f-jump options. | |
1839 | ||
1840 | Loongson 2F03 and later have fixed these issues and no workarounds | |
1841 | are needed. The workarounds have no significant side effect on them | |
1842 | but may decrease the performance of the system so this option should | |
1843 | be disabled unless the kernel is intended to be run on 2F01 or 2F02 | |
1844 | systems. | |
1845 | ||
1846 | If unsure, please say Y. | |
1847 | endif # CPU_LOONGSON2F | |
1848 | ||
1b93b3c3 WZ |
1849 | config SYS_SUPPORTS_ZBOOT |
1850 | bool | |
1851 | select HAVE_KERNEL_GZIP | |
1852 | select HAVE_KERNEL_BZIP2 | |
31c4867d | 1853 | select HAVE_KERNEL_LZ4 |
1b93b3c3 | 1854 | select HAVE_KERNEL_LZMA |
fe1d45e0 | 1855 | select HAVE_KERNEL_LZO |
4e23eb63 | 1856 | select HAVE_KERNEL_XZ |
1b93b3c3 WZ |
1857 | |
1858 | config SYS_SUPPORTS_ZBOOT_UART16550 | |
1859 | bool | |
1860 | select SYS_SUPPORTS_ZBOOT | |
1861 | ||
dbb98314 AB |
1862 | config SYS_SUPPORTS_ZBOOT_UART_PROM |
1863 | bool | |
1864 | select SYS_SUPPORTS_ZBOOT | |
1865 | ||
3702bba5 WZ |
1866 | config CPU_LOONGSON2 |
1867 | bool | |
1868 | select CPU_SUPPORTS_32BIT_KERNEL | |
1869 | select CPU_SUPPORTS_64BIT_KERNEL | |
1870 | select CPU_SUPPORTS_HIGHMEM | |
970d032f | 1871 | select CPU_SUPPORTS_HUGEPAGES |
e905086e | 1872 | select ARCH_HAS_PHYS_TO_DMA |
932afdee | 1873 | select CPU_HAS_LOAD_STORE_LR |
3702bba5 | 1874 | |
ca585cf9 KC |
1875 | config CPU_LOONGSON1 |
1876 | bool | |
1877 | select CPU_MIPS32 | |
7e280f6b | 1878 | select CPU_MIPSR2 |
ca585cf9 | 1879 | select CPU_HAS_PREFETCH |
932afdee | 1880 | select CPU_HAS_LOAD_STORE_LR |
ca585cf9 KC |
1881 | select CPU_SUPPORTS_32BIT_KERNEL |
1882 | select CPU_SUPPORTS_HIGHMEM | |
f29ad10d | 1883 | select CPU_SUPPORTS_CPUFREQ |
ca585cf9 | 1884 | |
fe7f62c0 | 1885 | config CPU_BMIPS32_3300 |
04fa8bf7 | 1886 | select SMP_UP if SMP |
1bbb6c1b | 1887 | bool |
cd746249 JG |
1888 | |
1889 | config CPU_BMIPS4350 | |
1890 | bool | |
1891 | select SYS_SUPPORTS_SMP | |
1892 | select SYS_SUPPORTS_HOTPLUG_CPU | |
1893 | ||
1894 | config CPU_BMIPS4380 | |
1895 | bool | |
bbf2ba67 | 1896 | select MIPS_L1_CACHE_SHIFT_6 |
cd746249 JG |
1897 | select SYS_SUPPORTS_SMP |
1898 | select SYS_SUPPORTS_HOTPLUG_CPU | |
b4720809 | 1899 | select CPU_HAS_RIXI |
cd746249 JG |
1900 | |
1901 | config CPU_BMIPS5000 | |
1902 | bool | |
cd746249 | 1903 | select MIPS_CPU_SCACHE |
bbf2ba67 | 1904 | select MIPS_L1_CACHE_SHIFT_7 |
cd746249 JG |
1905 | select SYS_SUPPORTS_SMP |
1906 | select SYS_SUPPORTS_HOTPLUG_CPU | |
b4720809 | 1907 | select CPU_HAS_RIXI |
1bbb6c1b | 1908 | |
0e476d91 HC |
1909 | config SYS_HAS_CPU_LOONGSON3 |
1910 | bool | |
1911 | select CPU_SUPPORTS_CPUFREQ | |
b2edcfc8 | 1912 | select CPU_HAS_RIXI |
0e476d91 | 1913 | |
3702bba5 | 1914 | config SYS_HAS_CPU_LOONGSON2E |
2a21c730 FZ |
1915 | bool |
1916 | ||
6f7a251a WZ |
1917 | config SYS_HAS_CPU_LOONGSON2F |
1918 | bool | |
55045ff5 WZ |
1919 | select CPU_SUPPORTS_CPUFREQ |
1920 | select CPU_SUPPORTS_ADDRWINCFG if 64BIT | |
22f1fdfd | 1921 | select CPU_SUPPORTS_UNCACHED_ACCELERATED |
6f7a251a | 1922 | |
ca585cf9 KC |
1923 | config SYS_HAS_CPU_LOONGSON1B |
1924 | bool | |
1925 | ||
12e3280b YL |
1926 | config SYS_HAS_CPU_LOONGSON1C |
1927 | bool | |
1928 | ||
7cf8053b RB |
1929 | config SYS_HAS_CPU_MIPS32_R1 |
1930 | bool | |
1931 | ||
1932 | config SYS_HAS_CPU_MIPS32_R2 | |
1933 | bool | |
1934 | ||
a6e18781 LY |
1935 | config SYS_HAS_CPU_MIPS32_R3_5 |
1936 | bool | |
1937 | ||
c5b36783 SH |
1938 | config SYS_HAS_CPU_MIPS32_R5 |
1939 | bool | |
9ae1f262 | 1940 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
c5b36783 | 1941 | |
7fd08ca5 LY |
1942 | config SYS_HAS_CPU_MIPS32_R6 |
1943 | bool | |
9ae1f262 | 1944 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
7fd08ca5 | 1945 | |
7cf8053b RB |
1946 | config SYS_HAS_CPU_MIPS64_R1 |
1947 | bool | |
1948 | ||
1949 | config SYS_HAS_CPU_MIPS64_R2 | |
1950 | bool | |
1951 | ||
7fd08ca5 LY |
1952 | config SYS_HAS_CPU_MIPS64_R6 |
1953 | bool | |
9ae1f262 | 1954 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
7fd08ca5 | 1955 | |
7cf8053b RB |
1956 | config SYS_HAS_CPU_R3000 |
1957 | bool | |
1958 | ||
1959 | config SYS_HAS_CPU_TX39XX | |
1960 | bool | |
1961 | ||
1962 | config SYS_HAS_CPU_VR41XX | |
1963 | bool | |
1964 | ||
7cf8053b RB |
1965 | config SYS_HAS_CPU_R4X00 |
1966 | bool | |
1967 | ||
1968 | config SYS_HAS_CPU_TX49XX | |
1969 | bool | |
1970 | ||
1971 | config SYS_HAS_CPU_R5000 | |
1972 | bool | |
1973 | ||
542c1020 SK |
1974 | config SYS_HAS_CPU_R5500 |
1975 | bool | |
1976 | ||
7cf8053b RB |
1977 | config SYS_HAS_CPU_NEVADA |
1978 | bool | |
1979 | ||
7cf8053b RB |
1980 | config SYS_HAS_CPU_R10000 |
1981 | bool | |
9ae1f262 | 1982 | select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT |
7cf8053b RB |
1983 | |
1984 | config SYS_HAS_CPU_RM7000 | |
1985 | bool | |
1986 | ||
7cf8053b RB |
1987 | config SYS_HAS_CPU_SB1 |
1988 | bool | |
1989 | ||
5e683389 DD |
1990 | config SYS_HAS_CPU_CAVIUM_OCTEON |
1991 | bool | |
1992 | ||
cd746249 | 1993 | config SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
1994 | bool |
1995 | ||
fe7f62c0 | 1996 | config SYS_HAS_CPU_BMIPS32_3300 |
c1c0c461 | 1997 | bool |
cd746249 | 1998 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
1999 | |
2000 | config SYS_HAS_CPU_BMIPS4350 | |
2001 | bool | |
cd746249 | 2002 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
2003 | |
2004 | config SYS_HAS_CPU_BMIPS4380 | |
2005 | bool | |
cd746249 | 2006 | select SYS_HAS_CPU_BMIPS |
c1c0c461 KC |
2007 | |
2008 | config SYS_HAS_CPU_BMIPS5000 | |
2009 | bool | |
cd746249 | 2010 | select SYS_HAS_CPU_BMIPS |
f263f2a2 | 2011 | select ARCH_HAS_SYNC_DMA_FOR_CPU |
c1c0c461 | 2012 | |
7f058e85 J |
2013 | config SYS_HAS_CPU_XLR |
2014 | bool | |
2015 | ||
1c773ea4 J |
2016 | config SYS_HAS_CPU_XLP |
2017 | bool | |
2018 | ||
17099b11 RB |
2019 | # |
2020 | # CPU may reorder R->R, R->W, W->R, W->W | |
2021 | # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC | |
2022 | # | |
0004a9df RB |
2023 | config WEAK_ORDERING |
2024 | bool | |
17099b11 RB |
2025 | |
2026 | # | |
2027 | # CPU may reorder reads and writes beyond LL/SC | |
2028 | # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC | |
2029 | # | |
2030 | config WEAK_REORDERING_BEYOND_LLSC | |
2031 | bool | |
5e83d430 RB |
2032 | endmenu |
2033 | ||
2034 | # | |
c09b47d8 | 2035 | # These two indicate any level of the MIPS32 and MIPS64 architecture |
5e83d430 RB |
2036 | # |
2037 | config CPU_MIPS32 | |
2038 | bool | |
7fd08ca5 | 2039 | default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 |
5e83d430 RB |
2040 | |
2041 | config CPU_MIPS64 | |
2042 | bool | |
7fd08ca5 | 2043 | default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 |
5e83d430 RB |
2044 | |
2045 | # | |
57eeaced | 2046 | # These indicate the revision of the architecture |
5e83d430 RB |
2047 | # |
2048 | config CPU_MIPSR1 | |
2049 | bool | |
2050 | default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 | |
2051 | ||
2052 | config CPU_MIPSR2 | |
2053 | bool | |
a86c7f72 | 2054 | default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON |
8256b17e | 2055 | select CPU_HAS_RIXI |
a7e07b1a | 2056 | select MIPS_SPRAM |
5e83d430 | 2057 | |
7fd08ca5 LY |
2058 | config CPU_MIPSR6 |
2059 | bool | |
2060 | default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 | |
8256b17e | 2061 | select CPU_HAS_RIXI |
87321fdd | 2062 | select HAVE_ARCH_BITREVERSE |
2db003a5 | 2063 | select MIPS_ASID_BITS_VARIABLE |
4a5dc51e | 2064 | select MIPS_CRC_SUPPORT |
a7e07b1a | 2065 | select MIPS_SPRAM |
5e83d430 | 2066 | |
57eeaced PB |
2067 | config TARGET_ISA_REV |
2068 | int | |
2069 | default 1 if CPU_MIPSR1 | |
2070 | default 2 if CPU_MIPSR2 | |
2071 | default 6 if CPU_MIPSR6 | |
2072 | default 0 | |
2073 | help | |
2074 | Reflects the ISA revision being targeted by the kernel build. This | |
2075 | is effectively the Kconfig equivalent of MIPS_ISA_REV. | |
2076 | ||
a6e18781 LY |
2077 | config EVA |
2078 | bool | |
2079 | ||
c5b36783 SH |
2080 | config XPA |
2081 | bool | |
2082 | ||
5e83d430 RB |
2083 | config SYS_SUPPORTS_32BIT_KERNEL |
2084 | bool | |
2085 | config SYS_SUPPORTS_64BIT_KERNEL | |
2086 | bool | |
2087 | config CPU_SUPPORTS_32BIT_KERNEL | |
2088 | bool | |
2089 | config CPU_SUPPORTS_64BIT_KERNEL | |
2090 | bool | |
55045ff5 WZ |
2091 | config CPU_SUPPORTS_CPUFREQ |
2092 | bool | |
2093 | config CPU_SUPPORTS_ADDRWINCFG | |
2094 | bool | |
9cffd154 DD |
2095 | config CPU_SUPPORTS_HUGEPAGES |
2096 | bool | |
171543e7 | 2097 | depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA)) |
22f1fdfd WZ |
2098 | config CPU_SUPPORTS_UNCACHED_ACCELERATED |
2099 | bool | |
82622284 DD |
2100 | config MIPS_PGD_C0_CONTEXT |
2101 | bool | |
cebf8c0f | 2102 | default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP |
5e83d430 | 2103 | |
8192c9ea DD |
2104 | # |
2105 | # Set to y for ptrace access to watch registers. | |
2106 | # | |
2107 | config HARDWARE_WATCHPOINTS | |
371a4151 EWI |
2108 | bool |
2109 | default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 | |
8192c9ea | 2110 | |
5e83d430 RB |
2111 | menu "Kernel type" |
2112 | ||
2113 | choice | |
5e83d430 RB |
2114 | prompt "Kernel code model" |
2115 | help | |
2116 | You should only select this option if you have a workload that | |
2117 | actually benefits from 64-bit processing or if your machine has | |
2118 | large memory. You will only be presented a single option in this | |
2119 | menu if your system does not support both 32-bit and 64-bit kernels. | |
2120 | ||
2121 | config 32BIT | |
2122 | bool "32-bit kernel" | |
2123 | depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL | |
2124 | select TRAD_SIGNALS | |
2125 | help | |
2126 | Select this option if you want to build a 32-bit kernel. | |
f17c4ca3 | 2127 | |
5e83d430 RB |
2128 | config 64BIT |
2129 | bool "64-bit kernel" | |
2130 | depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL | |
2131 | help | |
2132 | Select this option if you want to build a 64-bit kernel. | |
2133 | ||
2134 | endchoice | |
2135 | ||
2235a54d SL |
2136 | config KVM_GUEST |
2137 | bool "KVM Guest Kernel" | |
f2a5b1d7 | 2138 | depends on BROKEN_ON_SMP |
2235a54d | 2139 | help |
caa1faa7 JH |
2140 | Select this option if building a guest kernel for KVM (Trap & Emulate) |
2141 | mode. | |
2235a54d | 2142 | |
eda3d33c JH |
2143 | config KVM_GUEST_TIMER_FREQ |
2144 | int "Count/Compare Timer Frequency (MHz)" | |
2235a54d | 2145 | depends on KVM_GUEST |
eda3d33c | 2146 | default 100 |
2235a54d | 2147 | help |
eda3d33c JH |
2148 | Set this to non-zero if building a guest kernel for KVM to skip RTC |
2149 | emulation when determining guest CPU Frequency. Instead, the guest's | |
2150 | timer frequency is specified directly. | |
2235a54d | 2151 | |
1e321fa9 LY |
2152 | config MIPS_VA_BITS_48 |
2153 | bool "48 bits virtual memory" | |
2154 | depends on 64BIT | |
2155 | help | |
3377e227 AB |
2156 | Support a maximum at least 48 bits of application virtual |
2157 | memory. Default is 40 bits or less, depending on the CPU. | |
2158 | For page sizes 16k and above, this option results in a small | |
2159 | memory overhead for page tables. For 4k page size, a fourth | |
2160 | level of page tables is added which imposes both a memory | |
2161 | overhead as well as slower TLB fault handling. | |
2162 | ||
1e321fa9 LY |
2163 | If unsure, say N. |
2164 | ||
1da177e4 LT |
2165 | choice |
2166 | prompt "Kernel page size" | |
2167 | default PAGE_SIZE_4KB | |
2168 | ||
2169 | config PAGE_SIZE_4KB | |
2170 | bool "4kB" | |
0e476d91 | 2171 | depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 |
1da177e4 | 2172 | help |
371a4151 EWI |
2173 | This option select the standard 4kB Linux page size. On some |
2174 | R3000-family processors this is the only available page size. Using | |
2175 | 4kB page size will minimize memory consumption and is therefore | |
2176 | recommended for low memory systems. | |
1da177e4 LT |
2177 | |
2178 | config PAGE_SIZE_8KB | |
2179 | bool "8kB" | |
c2aeaaea | 2180 | depends on CPU_CAVIUM_OCTEON |
1e321fa9 | 2181 | depends on !MIPS_VA_BITS_48 |
1da177e4 LT |
2182 | help |
2183 | Using 8kB page size will result in higher performance kernel at | |
2184 | the price of higher memory consumption. This option is available | |
c2aeaaea PB |
2185 | only on cnMIPS processors. Note that you will need a suitable Linux |
2186 | distribution to support this. | |
1da177e4 LT |
2187 | |
2188 | config PAGE_SIZE_16KB | |
2189 | bool "16kB" | |
714bfad6 | 2190 | depends on !CPU_R3000 && !CPU_TX39XX |
1da177e4 LT |
2191 | help |
2192 | Using 16kB page size will result in higher performance kernel at | |
2193 | the price of higher memory consumption. This option is available on | |
714bfad6 RB |
2194 | all non-R3000 family processors. Note that you will need a suitable |
2195 | Linux distribution to support this. | |
1da177e4 | 2196 | |
c52399be RB |
2197 | config PAGE_SIZE_32KB |
2198 | bool "32kB" | |
2199 | depends on CPU_CAVIUM_OCTEON | |
1e321fa9 | 2200 | depends on !MIPS_VA_BITS_48 |
c52399be RB |
2201 | help |
2202 | Using 32kB page size will result in higher performance kernel at | |
2203 | the price of higher memory consumption. This option is available | |
2204 | only on cnMIPS cores. Note that you will need a suitable Linux | |
2205 | distribution to support this. | |
2206 | ||
1da177e4 LT |
2207 | config PAGE_SIZE_64KB |
2208 | bool "64kB" | |
3b2db173 | 2209 | depends on !CPU_R3000 && !CPU_TX39XX |
1da177e4 LT |
2210 | help |
2211 | Using 64kB page size will result in higher performance kernel at | |
2212 | the price of higher memory consumption. This option is available on | |
2213 | all non-R3000 family processor. Not that at the time of this | |
714bfad6 | 2214 | writing this option is still high experimental. |
1da177e4 LT |
2215 | |
2216 | endchoice | |
2217 | ||
c9bace7c DD |
2218 | config FORCE_MAX_ZONEORDER |
2219 | int "Maximum zone order" | |
e4362d1e AS |
2220 | range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB |
2221 | default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB | |
2222 | range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB | |
2223 | default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB | |
2224 | range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB | |
2225 | default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB | |
c9bace7c DD |
2226 | range 11 64 |
2227 | default "11" | |
2228 | help | |
2229 | The kernel memory allocator divides physically contiguous memory | |
2230 | blocks into "zones", where each zone is a power of two number of | |
2231 | pages. This option selects the largest power of two that the kernel | |
2232 | keeps in the memory allocator. If you need to allocate very large | |
2233 | blocks of physically contiguous memory, then you may need to | |
2234 | increase this value. | |
2235 | ||
2236 | This config option is actually maximum order plus one. For example, | |
2237 | a value of 11 means that the largest free memory block is 2^10 pages. | |
2238 | ||
2239 | The page size is not necessarily 4KB. Keep this in mind | |
2240 | when choosing a value for this option. | |
2241 | ||
1da177e4 LT |
2242 | config BOARD_SCACHE |
2243 | bool | |
2244 | ||
2245 | config IP22_CPU_SCACHE | |
2246 | bool | |
2247 | select BOARD_SCACHE | |
2248 | ||
9318c51a CD |
2249 | # |
2250 | # Support for a MIPS32 / MIPS64 style S-caches | |
2251 | # | |
2252 | config MIPS_CPU_SCACHE | |
2253 | bool | |
2254 | select BOARD_SCACHE | |
2255 | ||
1da177e4 LT |
2256 | config R5000_CPU_SCACHE |
2257 | bool | |
2258 | select BOARD_SCACHE | |
2259 | ||
2260 | config RM7000_CPU_SCACHE | |
2261 | bool | |
2262 | select BOARD_SCACHE | |
2263 | ||
2264 | config SIBYTE_DMA_PAGEOPS | |
2265 | bool "Use DMA to clear/copy pages" | |
2266 | depends on CPU_SB1 | |
2267 | help | |
2268 | Instead of using the CPU to zero and copy pages, use a Data Mover | |
2269 | channel. These DMA channels are otherwise unused by the standard | |
2270 | SiByte Linux port. Seems to give a small performance benefit. | |
2271 | ||
2272 | config CPU_HAS_PREFETCH | |
c8094b53 | 2273 | bool |
1da177e4 | 2274 | |
3165c846 FF |
2275 | config CPU_GENERIC_DUMP_TLB |
2276 | bool | |
c2aeaaea | 2277 | default y if !(CPU_R3000 || CPU_TX39XX) |
3165c846 | 2278 | |
c92e47e5 | 2279 | config MIPS_FP_SUPPORT |
183b40f9 PB |
2280 | bool "Floating Point support" if EXPERT |
2281 | default y | |
2282 | help | |
2283 | Select y to include support for floating point in the kernel | |
2284 | including initialization of FPU hardware, FP context save & restore | |
2285 | and emulation of an FPU where necessary. Without this support any | |
2286 | userland program attempting to use floating point instructions will | |
2287 | receive a SIGILL. | |
2288 | ||
2289 | If you know that your userland will not attempt to use floating point | |
2290 | instructions then you can say n here to shrink the kernel a little. | |
2291 | ||
2292 | If unsure, say y. | |
c92e47e5 | 2293 | |
97f7dcbf PB |
2294 | config CPU_R2300_FPU |
2295 | bool | |
c92e47e5 | 2296 | depends on MIPS_FP_SUPPORT |
97f7dcbf PB |
2297 | default y if CPU_R3000 || CPU_TX39XX |
2298 | ||
54746829 PB |
2299 | config CPU_R3K_TLB |
2300 | bool | |
2301 | ||
91405eb6 FF |
2302 | config CPU_R4K_FPU |
2303 | bool | |
c92e47e5 | 2304 | depends on MIPS_FP_SUPPORT |
97f7dcbf | 2305 | default y if !CPU_R2300_FPU |
91405eb6 | 2306 | |
62cedc4f FF |
2307 | config CPU_R4K_CACHE_TLB |
2308 | bool | |
54746829 | 2309 | default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON) |
62cedc4f | 2310 | |
59d6ab86 | 2311 | config MIPS_MT_SMP |
a92b7f87 | 2312 | bool "MIPS MT SMP support (1 TC on each available VPE)" |
5cbf9688 | 2313 | default y |
527f1028 | 2314 | depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS |
f7062ddb | 2315 | select CPU_MIPSR2_IRQ_VI |
d725cf38 | 2316 | select CPU_MIPSR2_IRQ_EI |
c080faa5 | 2317 | select SYNC_R4K |
f41ae0b2 | 2318 | select MIPS_MT |
41c594ab | 2319 | select SMP |
87353d8a | 2320 | select SMP_UP |
c080faa5 SH |
2321 | select SYS_SUPPORTS_SMP |
2322 | select SYS_SUPPORTS_SCHED_SMT | |
399aaa25 | 2323 | select MIPS_PERF_SHARED_TC_COUNTERS |
f41ae0b2 | 2324 | help |
c080faa5 SH |
2325 | This is a kernel model which is known as SMVP. This is supported |
2326 | on cores with the MT ASE and uses the available VPEs to implement | |
2327 | virtual processors which supports SMP. This is equivalent to the | |
2328 | Intel Hyperthreading feature. For further information go to | |
2329 | <http://www.imgtec.com/mips/mips-multithreading.asp>. | |
41c594ab | 2330 | |
f41ae0b2 RB |
2331 | config MIPS_MT |
2332 | bool | |
2333 | ||
0ab7aefc RB |
2334 | config SCHED_SMT |
2335 | bool "SMT (multithreading) scheduler support" | |
2336 | depends on SYS_SUPPORTS_SCHED_SMT | |
2337 | default n | |
2338 | help | |
2339 | SMT scheduler support improves the CPU scheduler's decision making | |
2340 | when dealing with MIPS MT enabled cores at a cost of slightly | |
2341 | increased overhead in some places. If unsure say N here. | |
2342 | ||
2343 | config SYS_SUPPORTS_SCHED_SMT | |
2344 | bool | |
2345 | ||
f41ae0b2 RB |
2346 | config SYS_SUPPORTS_MULTITHREADING |
2347 | bool | |
2348 | ||
f088fc84 RB |
2349 | config MIPS_MT_FPAFF |
2350 | bool "Dynamic FPU affinity for FP-intensive threads" | |
f088fc84 | 2351 | default y |
b633648c | 2352 | depends on MIPS_MT_SMP |
07cc0c9e | 2353 | |
b0a668fb LY |
2354 | config MIPSR2_TO_R6_EMULATOR |
2355 | bool "MIPS R2-to-R6 emulator" | |
9eaa9a82 | 2356 | depends on CPU_MIPSR6 |
c92e47e5 | 2357 | depends on MIPS_FP_SUPPORT |
b0a668fb LY |
2358 | default y |
2359 | help | |
2360 | Choose this option if you want to run non-R6 MIPS userland code. | |
2361 | Even if you say 'Y' here, the emulator will still be disabled by | |
07edf0d4 | 2362 | default. You can enable it using the 'mipsr2emu' kernel option. |
b0a668fb LY |
2363 | The only reason this is a build-time option is to save ~14K from the |
2364 | final kernel image. | |
b0a668fb | 2365 | |
f35764e7 JH |
2366 | config SYS_SUPPORTS_VPE_LOADER |
2367 | bool | |
2368 | depends on SYS_SUPPORTS_MULTITHREADING | |
2369 | help | |
2370 | Indicates that the platform supports the VPE loader, and provides | |
2371 | physical_memsize. | |
2372 | ||
07cc0c9e RB |
2373 | config MIPS_VPE_LOADER |
2374 | bool "VPE loader support." | |
f35764e7 | 2375 | depends on SYS_SUPPORTS_VPE_LOADER && MODULES |
07cc0c9e RB |
2376 | select CPU_MIPSR2_IRQ_VI |
2377 | select CPU_MIPSR2_IRQ_EI | |
07cc0c9e RB |
2378 | select MIPS_MT |
2379 | help | |
2380 | Includes a loader for loading an elf relocatable object | |
2381 | onto another VPE and running it. | |
f088fc84 | 2382 | |
17a1d523 DZ |
2383 | config MIPS_VPE_LOADER_CMP |
2384 | bool | |
2385 | default "y" | |
2386 | depends on MIPS_VPE_LOADER && MIPS_CMP | |
2387 | ||
1a2a6d7e DZ |
2388 | config MIPS_VPE_LOADER_MT |
2389 | bool | |
2390 | default "y" | |
2391 | depends on MIPS_VPE_LOADER && !MIPS_CMP | |
2392 | ||
e01402b1 RB |
2393 | config MIPS_VPE_LOADER_TOM |
2394 | bool "Load VPE program into memory hidden from linux" | |
2395 | depends on MIPS_VPE_LOADER | |
2396 | default y | |
2397 | help | |
2398 | The loader can use memory that is present but has been hidden from | |
2399 | Linux using the kernel command line option "mem=xxMB". It's up to | |
2400 | you to ensure the amount you put in the option and the space your | |
2401 | program requires is less or equal to the amount physically present. | |
2402 | ||
e01402b1 | 2403 | config MIPS_VPE_APSP_API |
5e83d430 RB |
2404 | bool "Enable support for AP/SP API (RTLX)" |
2405 | depends on MIPS_VPE_LOADER | |
e01402b1 | 2406 | |
da615cf6 DZ |
2407 | config MIPS_VPE_APSP_API_CMP |
2408 | bool | |
2409 | default "y" | |
2410 | depends on MIPS_VPE_APSP_API && MIPS_CMP | |
2411 | ||
2c973ef0 DZ |
2412 | config MIPS_VPE_APSP_API_MT |
2413 | bool | |
2414 | default "y" | |
2415 | depends on MIPS_VPE_APSP_API && !MIPS_CMP | |
2416 | ||
4a16ff4c | 2417 | config MIPS_CMP |
5cac93b3 | 2418 | bool "MIPS CMP framework support (DEPRECATED)" |
5676319c | 2419 | depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 |
b10b43ba | 2420 | select SMP |
eb9b5141 | 2421 | select SYNC_R4K |
b10b43ba | 2422 | select SYS_SUPPORTS_SMP |
4a16ff4c RB |
2423 | select WEAK_ORDERING |
2424 | default n | |
2425 | help | |
044505c7 PB |
2426 | Select this if you are using a bootloader which implements the "CMP |
2427 | framework" protocol (ie. YAMON) and want your kernel to make use of | |
2428 | its ability to start secondary CPUs. | |
4a16ff4c | 2429 | |
5cac93b3 PB |
2430 | Unless you have a specific need, you should use CONFIG_MIPS_CPS |
2431 | instead of this. | |
2432 | ||
0ee958e1 PB |
2433 | config MIPS_CPS |
2434 | bool "MIPS Coherent Processing System support" | |
5a3e7c02 | 2435 | depends on SYS_SUPPORTS_MIPS_CPS |
0ee958e1 | 2436 | select MIPS_CM |
1d8f1f5a | 2437 | select MIPS_CPS_PM if HOTPLUG_CPU |
0ee958e1 PB |
2438 | select SMP |
2439 | select SYNC_R4K if (CEVT_R4K || CSRC_R4K) | |
1d8f1f5a | 2440 | select SYS_SUPPORTS_HOTPLUG_CPU |
c8b7712c | 2441 | select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 |
0ee958e1 PB |
2442 | select SYS_SUPPORTS_SMP |
2443 | select WEAK_ORDERING | |
2444 | help | |
2445 | Select this if you wish to run an SMP kernel across multiple cores | |
2446 | within a MIPS Coherent Processing System. When this option is | |
2447 | enabled the kernel will probe for other cores and boot them with | |
2448 | no external assistance. It is safe to enable this when hardware | |
2449 | support is unavailable. | |
2450 | ||
3179d37e | 2451 | config MIPS_CPS_PM |
39a59593 | 2452 | depends on MIPS_CPS |
3179d37e PB |
2453 | bool |
2454 | ||
9f98f3dd PB |
2455 | config MIPS_CM |
2456 | bool | |
3c9b4166 | 2457 | select MIPS_CPC |
9f98f3dd | 2458 | |
9c38cf44 PB |
2459 | config MIPS_CPC |
2460 | bool | |
4a16ff4c | 2461 | |
1da177e4 LT |
2462 | config SB1_PASS_2_WORKAROUNDS |
2463 | bool | |
2464 | depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) | |
2465 | default y | |
2466 | ||
2467 | config SB1_PASS_2_1_WORKAROUNDS | |
2468 | bool | |
2469 | depends on CPU_SB1 && CPU_SB1_PASS_2 | |
2470 | default y | |
2471 | ||
9e2b5372 MC |
2472 | choice |
2473 | prompt "SmartMIPS or microMIPS ASE support" | |
2474 | ||
2475 | config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS | |
2476 | bool "None" | |
2477 | help | |
2478 | Select this if you want neither microMIPS nor SmartMIPS support | |
2479 | ||
9693a853 FBH |
2480 | config CPU_HAS_SMARTMIPS |
2481 | depends on SYS_SUPPORTS_SMARTMIPS | |
9e2b5372 | 2482 | bool "SmartMIPS" |
9693a853 FBH |
2483 | help |
2484 | SmartMIPS is a extension of the MIPS32 architecture aimed at | |
2485 | increased security at both hardware and software level for | |
2486 | smartcards. Enabling this option will allow proper use of the | |
2487 | SmartMIPS instructions by Linux applications. However a kernel with | |
2488 | this option will not work on a MIPS core without SmartMIPS core. If | |
2489 | you don't know you probably don't have SmartMIPS and should say N | |
2490 | here. | |
2491 | ||
bce86083 | 2492 | config CPU_MICROMIPS |
7fd08ca5 | 2493 | depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 |
9e2b5372 | 2494 | bool "microMIPS" |
bce86083 SH |
2495 | help |
2496 | When this option is enabled the kernel will be built using the | |
2497 | microMIPS ISA | |
2498 | ||
9e2b5372 MC |
2499 | endchoice |
2500 | ||
a5e9a69e | 2501 | config CPU_HAS_MSA |
0ce3417e | 2502 | bool "Support for the MIPS SIMD Architecture" |
a5e9a69e | 2503 | depends on CPU_SUPPORTS_MSA |
c92e47e5 | 2504 | depends on MIPS_FP_SUPPORT |
2a6cb669 | 2505 | depends on 64BIT || MIPS_O32_FP64_SUPPORT |
a5e9a69e PB |
2506 | help |
2507 | MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers | |
2508 | and a set of SIMD instructions to operate on them. When this option | |
1db1af84 PB |
2509 | is enabled the kernel will support allocating & switching MSA |
2510 | vector register contexts. If you know that your kernel will only be | |
2511 | running on CPUs which do not support MSA or that your userland will | |
2512 | not be making use of it then you may wish to say N here to reduce | |
2513 | the size & complexity of your kernel. | |
a5e9a69e PB |
2514 | |
2515 | If unsure, say Y. | |
2516 | ||
1da177e4 | 2517 | config CPU_HAS_WB |
f7062ddb | 2518 | bool |
e01402b1 | 2519 | |
df0ac8a4 KC |
2520 | config XKS01 |
2521 | bool | |
2522 | ||
8256b17e FF |
2523 | config CPU_HAS_RIXI |
2524 | bool | |
2525 | ||
932afdee YC |
2526 | config CPU_HAS_LOAD_STORE_LR |
2527 | bool | |
2528 | help | |
2529 | CPU has support for unaligned load and store instructions: | |
2530 | LWL, LWR, SWL, SWR (Load/store word left/right). | |
2531 | LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit systems). | |
2532 | ||
f41ae0b2 RB |
2533 | # |
2534 | # Vectored interrupt mode is an R2 feature | |
2535 | # | |
e01402b1 | 2536 | config CPU_MIPSR2_IRQ_VI |
f41ae0b2 | 2537 | bool |
e01402b1 | 2538 | |
f41ae0b2 RB |
2539 | # |
2540 | # Extended interrupt mode is an R2 feature | |
2541 | # | |
e01402b1 | 2542 | config CPU_MIPSR2_IRQ_EI |
f41ae0b2 | 2543 | bool |
e01402b1 | 2544 | |
1da177e4 LT |
2545 | config CPU_HAS_SYNC |
2546 | bool | |
2547 | depends on !CPU_R3000 | |
2548 | default y | |
2549 | ||
20d60d99 MR |
2550 | # |
2551 | # CPU non-features | |
2552 | # | |
2553 | config CPU_DADDI_WORKAROUNDS | |
2554 | bool | |
2555 | ||
2556 | config CPU_R4000_WORKAROUNDS | |
2557 | bool | |
2558 | select CPU_R4400_WORKAROUNDS | |
2559 | ||
2560 | config CPU_R4400_WORKAROUNDS | |
2561 | bool | |
2562 | ||
4edf00a4 PB |
2563 | config MIPS_ASID_SHIFT |
2564 | int | |
2565 | default 6 if CPU_R3000 || CPU_TX39XX | |
4edf00a4 PB |
2566 | default 0 |
2567 | ||
2568 | config MIPS_ASID_BITS | |
2569 | int | |
2db003a5 | 2570 | default 0 if MIPS_ASID_BITS_VARIABLE |
4edf00a4 PB |
2571 | default 6 if CPU_R3000 || CPU_TX39XX |
2572 | default 8 | |
2573 | ||
2db003a5 PB |
2574 | config MIPS_ASID_BITS_VARIABLE |
2575 | bool | |
2576 | ||
4a5dc51e MN |
2577 | config MIPS_CRC_SUPPORT |
2578 | bool | |
2579 | ||
1da177e4 LT |
2580 | # |
2581 | # - Highmem only makes sense for the 32-bit kernel. | |
2582 | # - The current highmem code will only work properly on physically indexed | |
2583 | # caches such as R3000, SB1, R7000 or those that look like they're virtually | |
2584 | # indexed such as R4000/R4400 SC and MC versions or R10000. So for the | |
2585 | # moment we protect the user and offer the highmem option only on machines | |
2586 | # where it's known to be safe. This will not offer highmem on a few systems | |
2587 | # such as MIPS32 and MIPS64 CPUs which may have virtual and physically | |
2588 | # indexed CPUs but we're playing safe. | |
797798c1 RB |
2589 | # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we |
2590 | # know they might have memory configurations that could make use of highmem | |
2591 | # support. | |
1da177e4 LT |
2592 | # |
2593 | config HIGHMEM | |
2594 | bool "High Memory Support" | |
a6e18781 | 2595 | depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA |
797798c1 RB |
2596 | |
2597 | config CPU_SUPPORTS_HIGHMEM | |
2598 | bool | |
2599 | ||
2600 | config SYS_SUPPORTS_HIGHMEM | |
2601 | bool | |
1da177e4 | 2602 | |
9693a853 FBH |
2603 | config SYS_SUPPORTS_SMARTMIPS |
2604 | bool | |
2605 | ||
a6a4834c SH |
2606 | config SYS_SUPPORTS_MICROMIPS |
2607 | bool | |
2608 | ||
377cb1b6 RB |
2609 | config SYS_SUPPORTS_MIPS16 |
2610 | bool | |
2611 | help | |
2612 | This option must be set if a kernel might be executed on a MIPS16- | |
2613 | enabled CPU even if MIPS16 is not actually being used. In other | |
2614 | words, it makes the kernel MIPS16-tolerant. | |
2615 | ||
a5e9a69e PB |
2616 | config CPU_SUPPORTS_MSA |
2617 | bool | |
2618 | ||
b4819b59 YY |
2619 | config ARCH_FLATMEM_ENABLE |
2620 | def_bool y | |
f133f22d | 2621 | depends on !NUMA && !CPU_LOONGSON2 |
b4819b59 | 2622 | |
d8cb4e11 RB |
2623 | config ARCH_DISCONTIGMEM_ENABLE |
2624 | bool | |
2625 | default y if SGI_IP27 | |
2626 | help | |
3dde6ad8 | 2627 | Say Y to support efficient handling of discontiguous physical memory, |
d8cb4e11 RB |
2628 | for architectures which are either NUMA (Non-Uniform Memory Access) |
2629 | or have huge holes in the physical address space for other reasons. | |
ad56b738 | 2630 | See <file:Documentation/vm/numa.rst> for more. |
d8cb4e11 | 2631 | |
31473747 AN |
2632 | config ARCH_SPARSEMEM_ENABLE |
2633 | bool | |
7de58fab | 2634 | select SPARSEMEM_STATIC |
31473747 | 2635 | |
d8cb4e11 RB |
2636 | config NUMA |
2637 | bool "NUMA Support" | |
2638 | depends on SYS_SUPPORTS_NUMA | |
2639 | help | |
2640 | Say Y to compile the kernel to support NUMA (Non-Uniform Memory | |
2641 | Access). This option improves performance on systems with more | |
2642 | than two nodes; on two node systems it is generally better to | |
2643 | leave it disabled; on single node systems disable this option | |
2644 | disabled. | |
2645 | ||
2646 | config SYS_SUPPORTS_NUMA | |
2647 | bool | |
2648 | ||
8c530ea3 MR |
2649 | config RELOCATABLE |
2650 | bool "Relocatable kernel" | |
3ff72be4 | 2651 | depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC) |
8c530ea3 MR |
2652 | help |
2653 | This builds a kernel image that retains relocation information | |
2654 | so it can be loaded someplace besides the default 1MB. | |
2655 | The relocations make the kernel binary about 15% larger, | |
2656 | but are discarded at runtime | |
2657 | ||
069fd766 MR |
2658 | config RELOCATION_TABLE_SIZE |
2659 | hex "Relocation table size" | |
2660 | depends on RELOCATABLE | |
2661 | range 0x0 0x01000000 | |
2662 | default "0x00100000" | |
2663 | ---help--- | |
2664 | A table of relocation data will be appended to the kernel binary | |
2665 | and parsed at boot to fix up the relocated kernel. | |
2666 | ||
2667 | This option allows the amount of space reserved for the table to be | |
2668 | adjusted, although the default of 1Mb should be ok in most cases. | |
2669 | ||
2670 | The build will fail and a valid size suggested if this is too small. | |
2671 | ||
2672 | If unsure, leave at the default value. | |
2673 | ||
405bc8fd MR |
2674 | config RANDOMIZE_BASE |
2675 | bool "Randomize the address of the kernel image" | |
2676 | depends on RELOCATABLE | |
2677 | ---help--- | |
371a4151 EWI |
2678 | Randomizes the physical and virtual address at which the |
2679 | kernel image is loaded, as a security feature that | |
2680 | deters exploit attempts relying on knowledge of the location | |
2681 | of kernel internals. | |
405bc8fd | 2682 | |
371a4151 | 2683 | Entropy is generated using any coprocessor 0 registers available. |
405bc8fd | 2684 | |
371a4151 | 2685 | The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. |
405bc8fd | 2686 | |
371a4151 | 2687 | If unsure, say N. |
405bc8fd MR |
2688 | |
2689 | config RANDOMIZE_BASE_MAX_OFFSET | |
2690 | hex "Maximum kASLR offset" if EXPERT | |
2691 | depends on RANDOMIZE_BASE | |
2692 | range 0x0 0x40000000 if EVA || 64BIT | |
2693 | range 0x0 0x08000000 | |
2694 | default "0x01000000" | |
2695 | ---help--- | |
2696 | When kASLR is active, this provides the maximum offset that will | |
2697 | be applied to the kernel image. It should be set according to the | |
2698 | amount of physical RAM available in the target system minus | |
2699 | PHYSICAL_START and must be a power of 2. | |
2700 | ||
2701 | This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with | |
2702 | EVA or 64-bit. The default is 16Mb. | |
2703 | ||
c80d79d7 YG |
2704 | config NODES_SHIFT |
2705 | int | |
2706 | default "6" | |
2707 | depends on NEED_MULTIPLE_NODES | |
2708 | ||
14f70012 DZ |
2709 | config HW_PERF_EVENTS |
2710 | bool "Enable hardware performance counter support for perf events" | |
23021b2b | 2711 | depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) |
14f70012 DZ |
2712 | default y |
2713 | help | |
2714 | Enable hardware performance counter support for perf events. If | |
2715 | disabled, perf events will use software events only. | |
2716 | ||
1da177e4 LT |
2717 | config SMP |
2718 | bool "Multi-Processing support" | |
e73ea273 RB |
2719 | depends on SYS_SUPPORTS_SMP |
2720 | help | |
1da177e4 | 2721 | This enables support for systems with more than one CPU. If you have |
4a474157 RG |
2722 | a system with only one CPU, say N. If you have a system with more |
2723 | than one CPU, say Y. | |
1da177e4 | 2724 | |
4a474157 | 2725 | If you say N here, the kernel will run on uni- and multiprocessor |
1da177e4 LT |
2726 | machines, but will use only one CPU of a multiprocessor machine. If |
2727 | you say Y here, the kernel will run on many, but not all, | |
4a474157 | 2728 | uniprocessor machines. On a uniprocessor machine, the kernel |
1da177e4 LT |
2729 | will run faster if you say N here. |
2730 | ||
2731 | People using multiprocessor machines who say Y here should also say | |
2732 | Y to "Enhanced Real Time Clock Support", below. | |
2733 | ||
03502faa AB |
2734 | See also the SMP-HOWTO available at |
2735 | <http://www.tldp.org/docs.html#howto>. | |
1da177e4 LT |
2736 | |
2737 | If you don't know what to do here, say N. | |
2738 | ||
7840d618 MR |
2739 | config HOTPLUG_CPU |
2740 | bool "Support for hot-pluggable CPUs" | |
2741 | depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU | |
2742 | help | |
2743 | Say Y here to allow turning CPUs off and on. CPUs can be | |
2744 | controlled through /sys/devices/system/cpu. | |
2745 | (Note: power management support will enable this option | |
2746 | automatically on SMP systems. ) | |
2747 | Say N if you want to disable CPU hotplug. | |
2748 | ||
87353d8a RB |
2749 | config SMP_UP |
2750 | bool | |
2751 | ||
4a16ff4c RB |
2752 | config SYS_SUPPORTS_MIPS_CMP |
2753 | bool | |
2754 | ||
0ee958e1 PB |
2755 | config SYS_SUPPORTS_MIPS_CPS |
2756 | bool | |
2757 | ||
e73ea273 RB |
2758 | config SYS_SUPPORTS_SMP |
2759 | bool | |
2760 | ||
130e2fb7 RB |
2761 | config NR_CPUS_DEFAULT_4 |
2762 | bool | |
2763 | ||
2764 | config NR_CPUS_DEFAULT_8 | |
2765 | bool | |
2766 | ||
2767 | config NR_CPUS_DEFAULT_16 | |
2768 | bool | |
2769 | ||
2770 | config NR_CPUS_DEFAULT_32 | |
2771 | bool | |
2772 | ||
2773 | config NR_CPUS_DEFAULT_64 | |
2774 | bool | |
2775 | ||
1da177e4 | 2776 | config NR_CPUS |
a91796a9 J |
2777 | int "Maximum number of CPUs (2-256)" |
2778 | range 2 256 | |
1da177e4 | 2779 | depends on SMP |
130e2fb7 RB |
2780 | default "4" if NR_CPUS_DEFAULT_4 |
2781 | default "8" if NR_CPUS_DEFAULT_8 | |
2782 | default "16" if NR_CPUS_DEFAULT_16 | |
2783 | default "32" if NR_CPUS_DEFAULT_32 | |
2784 | default "64" if NR_CPUS_DEFAULT_64 | |
1da177e4 LT |
2785 | help |
2786 | This allows you to specify the maximum number of CPUs which this | |
2787 | kernel will support. The maximum supported value is 32 for 32-bit | |
2788 | kernel and 64 for 64-bit kernels; the minimum value which makes | |
72ede9b1 AN |
2789 | sense is 1 for Qemu (useful only for kernel debugging purposes) |
2790 | and 2 for all others. | |
1da177e4 LT |
2791 | |
2792 | This is purely to save memory - each supported CPU adds | |
72ede9b1 AN |
2793 | approximately eight kilobytes to the kernel image. For best |
2794 | performance should round up your number of processors to the next | |
2795 | power of two. | |
1da177e4 | 2796 | |
399aaa25 AC |
2797 | config MIPS_PERF_SHARED_TC_COUNTERS |
2798 | bool | |
7820b84b DD |
2799 | |
2800 | config MIPS_NR_CPU_NR_MAP_1024 | |
2801 | bool | |
2802 | ||
2803 | config MIPS_NR_CPU_NR_MAP | |
2804 | int | |
2805 | depends on SMP | |
2806 | default 1024 if MIPS_NR_CPU_NR_MAP_1024 | |
2807 | default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 | |
399aaa25 | 2808 | |
1723b4a3 AN |
2809 | # |
2810 | # Timer Interrupt Frequency Configuration | |
2811 | # | |
2812 | ||
2813 | choice | |
2814 | prompt "Timer frequency" | |
2815 | default HZ_250 | |
2816 | help | |
371a4151 | 2817 | Allows the configuration of the timer frequency. |
1723b4a3 | 2818 | |
67596573 PB |
2819 | config HZ_24 |
2820 | bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ | |
2821 | ||
1723b4a3 | 2822 | config HZ_48 |
0f873585 | 2823 | bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ |
1723b4a3 AN |
2824 | |
2825 | config HZ_100 | |
2826 | bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ | |
2827 | ||
2828 | config HZ_128 | |
2829 | bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ | |
2830 | ||
2831 | config HZ_250 | |
2832 | bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ | |
2833 | ||
2834 | config HZ_256 | |
2835 | bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ | |
2836 | ||
2837 | config HZ_1000 | |
2838 | bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ | |
2839 | ||
2840 | config HZ_1024 | |
2841 | bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ | |
2842 | ||
2843 | endchoice | |
2844 | ||
67596573 PB |
2845 | config SYS_SUPPORTS_24HZ |
2846 | bool | |
2847 | ||
1723b4a3 AN |
2848 | config SYS_SUPPORTS_48HZ |
2849 | bool | |
2850 | ||
2851 | config SYS_SUPPORTS_100HZ | |
2852 | bool | |
2853 | ||
2854 | config SYS_SUPPORTS_128HZ | |
2855 | bool | |
2856 | ||
2857 | config SYS_SUPPORTS_250HZ | |
2858 | bool | |
2859 | ||
2860 | config SYS_SUPPORTS_256HZ | |
2861 | bool | |
2862 | ||
2863 | config SYS_SUPPORTS_1000HZ | |
2864 | bool | |
2865 | ||
2866 | config SYS_SUPPORTS_1024HZ | |
2867 | bool | |
2868 | ||
2869 | config SYS_SUPPORTS_ARBIT_HZ | |
2870 | bool | |
67596573 PB |
2871 | default y if !SYS_SUPPORTS_24HZ && \ |
2872 | !SYS_SUPPORTS_48HZ && \ | |
2873 | !SYS_SUPPORTS_100HZ && \ | |
2874 | !SYS_SUPPORTS_128HZ && \ | |
2875 | !SYS_SUPPORTS_250HZ && \ | |
2876 | !SYS_SUPPORTS_256HZ && \ | |
2877 | !SYS_SUPPORTS_1000HZ && \ | |
1723b4a3 AN |
2878 | !SYS_SUPPORTS_1024HZ |
2879 | ||
2880 | config HZ | |
2881 | int | |
67596573 | 2882 | default 24 if HZ_24 |
1723b4a3 AN |
2883 | default 48 if HZ_48 |
2884 | default 100 if HZ_100 | |
2885 | default 128 if HZ_128 | |
2886 | default 250 if HZ_250 | |
2887 | default 256 if HZ_256 | |
2888 | default 1000 if HZ_1000 | |
2889 | default 1024 if HZ_1024 | |
2890 | ||
96685b17 DZ |
2891 | config SCHED_HRTICK |
2892 | def_bool HIGH_RES_TIMERS | |
2893 | ||
ea6e942b | 2894 | config KEXEC |
7d60717e | 2895 | bool "Kexec system call" |
2965faa5 | 2896 | select KEXEC_CORE |
ea6e942b AN |
2897 | help |
2898 | kexec is a system call that implements the ability to shutdown your | |
2899 | current kernel, and to start another kernel. It is like a reboot | |
3dde6ad8 | 2900 | but it is independent of the system firmware. And like a reboot |
ea6e942b AN |
2901 | you can start any kernel with it, not just Linux. |
2902 | ||
01dd2fbf | 2903 | The name comes from the similarity to the exec system call. |
ea6e942b AN |
2904 | |
2905 | It is an ongoing process to be certain the hardware in a machine | |
2906 | is properly shutdown, so do not be surprised if this code does not | |
bf220695 GU |
2907 | initially work for you. As of this writing the exact hardware |
2908 | interface is strongly in flux, so no good recommendation can be | |
2909 | made. | |
ea6e942b | 2910 | |
7aa1c8f4 | 2911 | config CRASH_DUMP |
bff323d5 MN |
2912 | bool "Kernel crash dumps" |
2913 | help | |
7aa1c8f4 RB |
2914 | Generate crash dump after being started by kexec. |
2915 | This should be normally only set in special crash dump kernels | |
2916 | which are loaded in the main kernel with kexec-tools into | |
2917 | a specially reserved region and then later executed after | |
2918 | a crash by kdump/kexec. The crash dump kernel must be compiled | |
2919 | to a memory address not used by the main kernel or firmware using | |
2920 | PHYSICAL_START. | |
2921 | ||
2922 | config PHYSICAL_START | |
bff323d5 | 2923 | hex "Physical address where the kernel is loaded" |
8bda3e26 | 2924 | default "0xffffffff84000000" |
bff323d5 MN |
2925 | depends on CRASH_DUMP |
2926 | help | |
7aa1c8f4 RB |
2927 | This gives the CKSEG0 or KSEG0 address where the kernel is loaded. |
2928 | If you plan to use kernel for capturing the crash dump change | |
2929 | this value to start of the reserved region (the "X" value as | |
2930 | specified in the "crashkernel=YM@XM" command line boot parameter | |
2931 | passed to the panic-ed kernel). | |
2932 | ||
ea6e942b AN |
2933 | config SECCOMP |
2934 | bool "Enable seccomp to safely compute untrusted bytecode" | |
293c5bd1 | 2935 | depends on PROC_FS |
ea6e942b AN |
2936 | default y |
2937 | help | |
2938 | This kernel feature is useful for number crunching applications | |
2939 | that may need to compute untrusted bytecode during their | |
2940 | execution. By using pipes or other transports made available to | |
2941 | the process as file descriptors supporting the read/write | |
2942 | syscalls, it's possible to isolate those applications in | |
2943 | their own address space using seccomp. Once seccomp is | |
2944 | enabled via /proc/<pid>/seccomp, it cannot be disabled | |
2945 | and the task is only allowed to execute a few safe syscalls | |
2946 | defined by each seccomp mode. | |
2947 | ||
2948 | If unsure, say Y. Only embedded should say N here. | |
2949 | ||
597ce172 | 2950 | config MIPS_O32_FP64_SUPPORT |
b7f1e273 | 2951 | bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6 |
597ce172 | 2952 | depends on 32BIT || MIPS32_O32 |
597ce172 PB |
2953 | help |
2954 | When this is enabled, the kernel will support use of 64-bit floating | |
2955 | point registers with binaries using the O32 ABI along with the | |
2956 | EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On | |
2957 | 32-bit MIPS systems this support is at the cost of increasing the | |
2958 | size and complexity of the compiled FPU emulator. Thus if you are | |
2959 | running a MIPS32 system and know that none of your userland binaries | |
2960 | will require 64-bit floating point, you may wish to reduce the size | |
2961 | of your kernel & potentially improve FP emulation performance by | |
2962 | saying N here. | |
2963 | ||
06e2e882 PB |
2964 | Although binutils currently supports use of this flag the details |
2965 | concerning its effect upon the O32 ABI in userland are still being | |
2966 | worked on. In order to avoid userland becoming dependant upon current | |
2967 | behaviour before the details have been finalised, this option should | |
2968 | be considered experimental and only enabled by those working upon | |
2969 | said details. | |
2970 | ||
2971 | If unsure, say N. | |
597ce172 | 2972 | |
f2ffa5ab | 2973 | config USE_OF |
0b3e06fd | 2974 | bool |
f2ffa5ab | 2975 | select OF |
e6ce1324 | 2976 | select OF_EARLY_FLATTREE |
abd2363f | 2977 | select IRQ_DOMAIN |
f2ffa5ab | 2978 | |
2fe8ea39 DZ |
2979 | config UHI_BOOT |
2980 | bool | |
2981 | ||
7fafb068 AB |
2982 | config BUILTIN_DTB |
2983 | bool | |
2984 | ||
1da8f179 | 2985 | choice |
5b24d52c | 2986 | prompt "Kernel appended dtb support" if USE_OF |
1da8f179 JG |
2987 | default MIPS_NO_APPENDED_DTB |
2988 | ||
2989 | config MIPS_NO_APPENDED_DTB | |
2990 | bool "None" | |
2991 | help | |
2992 | Do not enable appended dtb support. | |
2993 | ||
87db537d AK |
2994 | config MIPS_ELF_APPENDED_DTB |
2995 | bool "vmlinux" | |
2996 | help | |
2997 | With this option, the boot code will look for a device tree binary | |
2998 | DTB) included in the vmlinux ELF section .appended_dtb. By default | |
2999 | it is empty and the DTB can be appended using binutils command | |
3000 | objcopy: | |
3001 | ||
3002 | objcopy --update-section .appended_dtb=<filename>.dtb vmlinux | |
3003 | ||
3004 | This is meant as a backward compatiblity convenience for those | |
3005 | systems with a bootloader that can't be upgraded to accommodate | |
3006 | the documented boot protocol using a device tree. | |
3007 | ||
1da8f179 | 3008 | config MIPS_RAW_APPENDED_DTB |
b8f54f2c | 3009 | bool "vmlinux.bin or vmlinuz.bin" |
1da8f179 JG |
3010 | help |
3011 | With this option, the boot code will look for a device tree binary | |
b8f54f2c | 3012 | DTB) appended to raw vmlinux.bin or vmlinuz.bin. |
1da8f179 JG |
3013 | (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). |
3014 | ||
3015 | This is meant as a backward compatibility convenience for those | |
3016 | systems with a bootloader that can't be upgraded to accommodate | |
3017 | the documented boot protocol using a device tree. | |
3018 | ||
3019 | Beware that there is very little in terms of protection against | |
3020 | this option being confused by leftover garbage in memory that might | |
3021 | look like a DTB header after a reboot if no actual DTB is appended | |
3022 | to vmlinux.bin. Do not leave this option active in a production kernel | |
3023 | if you don't intend to always append a DTB. | |
3024 | endchoice | |
3025 | ||
2024972e JG |
3026 | choice |
3027 | prompt "Kernel command line type" if !CMDLINE_OVERRIDE | |
2bcef9b4 | 3028 | default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ |
3f5f0a44 | 3029 | !MIPS_MALTA && \ |
2bcef9b4 | 3030 | !CAVIUM_OCTEON_SOC |
2024972e JG |
3031 | default MIPS_CMDLINE_FROM_BOOTLOADER |
3032 | ||
3033 | config MIPS_CMDLINE_FROM_DTB | |
3034 | depends on USE_OF | |
3035 | bool "Dtb kernel arguments if available" | |
3036 | ||
3037 | config MIPS_CMDLINE_DTB_EXTEND | |
3038 | depends on USE_OF | |
3039 | bool "Extend dtb kernel arguments with bootloader arguments" | |
3040 | ||
3041 | config MIPS_CMDLINE_FROM_BOOTLOADER | |
3042 | bool "Bootloader kernel arguments if available" | |
ed47e153 RV |
3043 | |
3044 | config MIPS_CMDLINE_BUILTIN_EXTEND | |
3045 | depends on CMDLINE_BOOL | |
3046 | bool "Extend builtin kernel arguments with bootloader arguments" | |
2024972e JG |
3047 | endchoice |
3048 | ||
5e83d430 RB |
3049 | endmenu |
3050 | ||
1df0f0ff AN |
3051 | config LOCKDEP_SUPPORT |
3052 | bool | |
3053 | default y | |
3054 | ||
3055 | config STACKTRACE_SUPPORT | |
3056 | bool | |
3057 | default y | |
3058 | ||
a728ab52 KS |
3059 | config PGTABLE_LEVELS |
3060 | int | |
3377e227 | 3061 | default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 |
ebe8f5e8 | 3062 | default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48) |
a728ab52 KS |
3063 | default 2 |
3064 | ||
6c359eb1 PB |
3065 | config MIPS_AUTO_PFN_OFFSET |
3066 | bool | |
3067 | ||
1da177e4 LT |
3068 | menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" |
3069 | ||
c5611df9 | 3070 | config PCI_DRIVERS_GENERIC |
2eac9c2d | 3071 | select PCI_DOMAINS_GENERIC if PCI |
c5611df9 PB |
3072 | bool |
3073 | ||
3074 | config PCI_DRIVERS_LEGACY | |
3075 | def_bool !PCI_DRIVERS_GENERIC | |
3076 | select NO_GENERIC_PCI_IOPORT_MAP | |
2eac9c2d | 3077 | select PCI_DOMAINS if PCI |
1da177e4 LT |
3078 | |
3079 | # | |
3080 | # ISA support is now enabled via select. Too many systems still have the one | |
3081 | # or other ISA chip on the board that users don't know about so don't expect | |
3082 | # users to choose the right thing ... | |
3083 | # | |
3084 | config ISA | |
3085 | bool | |
3086 | ||
1da177e4 LT |
3087 | config TC |
3088 | bool "TURBOchannel support" | |
3089 | depends on MACH_DECSTATION | |
3090 | help | |
50a23e6e JM |
3091 | TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS |
3092 | processors. TURBOchannel programming specifications are available | |
3093 | at: | |
3094 | <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> | |
3095 | and: | |
3096 | <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> | |
3097 | Linux driver support status is documented at: | |
3098 | <http://www.linux-mips.org/wiki/DECstation> | |
1da177e4 | 3099 | |
1da177e4 LT |
3100 | config MMU |
3101 | bool | |
3102 | default y | |
3103 | ||
109c32ff MR |
3104 | config ARCH_MMAP_RND_BITS_MIN |
3105 | default 12 if 64BIT | |
3106 | default 8 | |
3107 | ||
3108 | config ARCH_MMAP_RND_BITS_MAX | |
3109 | default 18 if 64BIT | |
3110 | default 15 | |
3111 | ||
3112 | config ARCH_MMAP_RND_COMPAT_BITS_MIN | |
371a4151 | 3113 | default 8 |
109c32ff MR |
3114 | |
3115 | config ARCH_MMAP_RND_COMPAT_BITS_MAX | |
371a4151 | 3116 | default 15 |
109c32ff | 3117 | |
d865bea4 RB |
3118 | config I8253 |
3119 | bool | |
798778b8 | 3120 | select CLKSRC_I8253 |
2d02612f | 3121 | select CLKEVT_I8253 |
9726b43a | 3122 | select MIPS_EXTERNAL_TIMER |
d865bea4 | 3123 | |
e05eb3f8 RB |
3124 | config ZONE_DMA |
3125 | bool | |
3126 | ||
cce335ae RB |
3127 | config ZONE_DMA32 |
3128 | bool | |
3129 | ||
1da177e4 LT |
3130 | endmenu |
3131 | ||
1da177e4 LT |
3132 | config TRAD_SIGNALS |
3133 | bool | |
1da177e4 | 3134 | |
1da177e4 | 3135 | config MIPS32_COMPAT |
78aaf956 | 3136 | bool |
1da177e4 LT |
3137 | |
3138 | config COMPAT | |
3139 | bool | |
1da177e4 | 3140 | |
05e43966 AN |
3141 | config SYSVIPC_COMPAT |
3142 | bool | |
05e43966 | 3143 | |
1da177e4 LT |
3144 | config MIPS32_O32 |
3145 | bool "Kernel support for o32 binaries" | |
78aaf956 RB |
3146 | depends on 64BIT |
3147 | select ARCH_WANT_OLD_COMPAT_IPC | |
3148 | select COMPAT | |
3149 | select MIPS32_COMPAT | |
3150 | select SYSVIPC_COMPAT if SYSVIPC | |
1da177e4 LT |
3151 | help |
3152 | Select this option if you want to run o32 binaries. These are pure | |
3153 | 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of | |
3154 | existing binaries are in this format. | |
3155 | ||
3156 | If unsure, say Y. | |
3157 | ||
3158 | config MIPS32_N32 | |
3159 | bool "Kernel support for n32 binaries" | |
c22eacfe | 3160 | depends on 64BIT |
5a9372f7 | 3161 | select ARCH_WANT_COMPAT_IPC_PARSE_VERSION |
78aaf956 RB |
3162 | select COMPAT |
3163 | select MIPS32_COMPAT | |
3164 | select SYSVIPC_COMPAT if SYSVIPC | |
1da177e4 LT |
3165 | help |
3166 | Select this option if you want to run n32 binaries. These are | |
3167 | 64-bit binaries using 32-bit quantities for addressing and certain | |
3168 | data that would normally be 64-bit. They are used in special | |
3169 | cases. | |
3170 | ||
3171 | If unsure, say N. | |
3172 | ||
3173 | config BINFMT_ELF32 | |
3174 | bool | |
3175 | default y if MIPS32_O32 || MIPS32_N32 | |
f43edca7 | 3176 | select ELFCORE |
1da177e4 | 3177 | |
2116245e RB |
3178 | menu "Power management options" |
3179 | ||
363c55ca WZ |
3180 | config ARCH_HIBERNATION_POSSIBLE |
3181 | def_bool y | |
3f5b3e17 | 3182 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
363c55ca | 3183 | |
f4cb5700 JB |
3184 | config ARCH_SUSPEND_POSSIBLE |
3185 | def_bool y | |
3f5b3e17 | 3186 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
f4cb5700 | 3187 | |
2116245e | 3188 | source "kernel/power/Kconfig" |
952fa954 | 3189 | |
1da177e4 LT |
3190 | endmenu |
3191 | ||
7a998935 VK |
3192 | config MIPS_EXTERNAL_TIMER |
3193 | bool | |
3194 | ||
7a998935 | 3195 | menu "CPU Power Management" |
c095ebaf PB |
3196 | |
3197 | if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER | |
7a998935 | 3198 | source "drivers/cpufreq/Kconfig" |
7a998935 | 3199 | endif |
9726b43a | 3200 | |
c095ebaf PB |
3201 | source "drivers/cpuidle/Kconfig" |
3202 | ||
3203 | endmenu | |
3204 | ||
98cdee0e RB |
3205 | source "drivers/firmware/Kconfig" |
3206 | ||
2235a54d | 3207 | source "arch/mips/kvm/Kconfig" |