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[MIPS] Au1xxx: board specific irq code cleanup
[mirror_ubuntu-focal-kernel.git] / arch / mips / Makefile
CommitLineData
1da177e4
LT		 1#
2# This file is subject to the terms and conditions of the GNU General Public
3# License. See the file "COPYING" in the main directory of this archive
4# for more details.
5#
6# Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
7# DECStation modifications by Paul M. Antoine, 1996
8# Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
9#
10# This file is included by the global makefile so that you can add your own
11# architecture-specific flags and dependencies. Remember to do have actions
12# for "archclean" cleaning up for this architecture.
13#
14
1da177e4
LT		 15cflags-y :=
16
17#
18# Select the object file format to substitute into the linker script.
19#
20ifdef CONFIG_CPU_LITTLE_ENDIAN
2132bit-tool-prefix = mipsel-linux-
2264bit-tool-prefix = mips64el-linux-
2332bit-bfd = elf32-tradlittlemips
2464bit-bfd = elf64-tradlittlemips
2532bit-emul = elf32ltsmip
2664bit-emul = elf64ltsmip
27else
2832bit-tool-prefix = mips-linux-
2964bit-tool-prefix = mips64-linux-
3032bit-bfd = elf32-tradbigmips
3164bit-bfd = elf64-tradbigmips
3232bit-emul = elf32btsmip
3364bit-emul = elf64btsmip
34endif
35
875d43e7 36ifdef CONFIG_32BIT
1da177e4
LT		 37tool-prefix = $(32bit-tool-prefix)
38UTS_MACHINE := mips
39endif
875d43e7 40ifdef CONFIG_64BIT
1da177e4
LT		 41tool-prefix = $(64bit-tool-prefix)
42UTS_MACHINE := mips64
43endif
44
45ifdef CONFIG_CROSSCOMPILE
46CROSS_COMPILE := $(tool-prefix)
47endif
48
8145095c 49ifdef CONFIG_32BIT
1da177e4
LT		 50ld-emul = $(32bit-emul)
51vmlinux-32 = vmlinux
52vmlinux-64 = vmlinux.64
59b3e8e9
RB		 53
54cflags-y += -mabi=32
8145095c 55endif
1da177e4 56
8145095c 57ifdef CONFIG_64BIT
8145095c
RB		 58ld-emul = $(64bit-emul)
59vmlinux-32 = vmlinux.32
60vmlinux-64 = vmlinux
61
59b3e8e9
RB		 62cflags-y += -mabi=64
63ifdef CONFIG_BUILD_ELF64
8145095c 64cflags-y += $(call cc-option,-mno-explicit-relocs)
59b3e8e9
RB		 65else
66cflags-y += $(call cc-option,-msym32)
67endif
1da177e4
LT		 68endif
69
59b3e8e9 70
1da177e4
LT		 71#
72# GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
73# code since it only slows down the whole thing. At some point we might make
74# use of global pointer optimizations but their use of $28 conflicts with
75# the current pointer optimization.
76#
77# The DECStation requires an ECOFF kernel for remote booting, other MIPS
78# machines may also. Since BFD is incredibly buggy with respect to
79# crossformat linking we rely on the elf2ecoff tool for format conversion.
80#
1da177e4 81cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
6218cf44 82cflags-y += -msoft-float
9f83d839 83LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
1da177e4
LT		 84MODFLAGS += -mlong-calls
85
72fbfb26
RB		 86cflags-y += -ffreestanding
87
f425a6dc
TS		 88#
89# We explicitly add the endianness specifier if needed, this allows
90# to compile kernels with a toolchain for the other endianness. We
91# carefully avoid to add it redundantly because gcc 3.3/3.4 complains
92# when fed the toolchain default!
93#
59b3e8e9
RB		 94cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB -D__MIPSEB__)
95cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL -D__MIPSEL__)
f425a6dc 96
9007c9a2
RB		 97cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \
98 -fno-omit-frame-pointer
1da177e4 99
1da177e4
LT		 100#
101# CPU-dependent compiler/assembler options for optimization.
102#
59b3e8e9
RB		 103cflags-$(CONFIG_CPU_R3000) += -march=r3000
104cflags-$(CONFIG_CPU_TX39XX) += -march=r3900
105cflags-$(CONFIG_CPU_R6000) += -march=r6000 -Wa,--trap
106cflags-$(CONFIG_CPU_R4300) += -march=r4300 -Wa,--trap
107cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap
108cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap
109cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
9200c0b2 110cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
59b3e8e9 111 -Wa,-mips32 -Wa,--trap
9200c0b2 112cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
59b3e8e9 113 -Wa,-mips32r2 -Wa,--trap
9200c0b2 114cflags-$(CONFIG_CPU_MIPS64_R1) += $(call cc-option,-march=mips64,-mips64 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
59b3e8e9 115 -Wa,-mips64 -Wa,--trap
9200c0b2 116cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
59b3e8e9
RB		 117 -Wa,-mips64r2 -Wa,--trap
118cflags-$(CONFIG_CPU_R5000) += -march=r5000 -Wa,--trap
c9e321e0 119cflags-$(CONFIG_CPU_R5432) += $(call cc-option,-march=r5400,-march=r5000) \
1da177e4 120 -Wa,--trap
c9e321e0 121cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=r5000) \
1da177e4 122 -Wa,--trap
59b3e8e9 123cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=r5000) \
1da177e4 124 -Wa,--trap
59b3e8e9 125cflags-$(CONFIG_CPU_RM9000) += $(call cc-option,-march=rm9000,-march=r5000) \
1da177e4 126 -Wa,--trap
59b3e8e9 127cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1,-march=r5000) \
1da177e4 128 -Wa,--trap
59b3e8e9
RB		 129cflags-$(CONFIG_CPU_R8000) += -march=r8000 -Wa,--trap
130cflags-$(CONFIG_CPU_R10000) += $(call cc-option,-march=r10000,-march=r8000) \
1da177e4
LT		 131 -Wa,--trap
132
133ifdef CONFIG_CPU_SB1
134ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
135MODFLAGS += -msb1-pass1-workarounds
136endif
137endif
138
139#
140# Firmware support
141#
142libs-$(CONFIG_ARC) += arch/mips/arc/
143libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
144
145#
146# Board-dependent options and extra files
147#
148
149#
150# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
151#
152core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
153cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
154load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
155
156#
157# Common Alchemy Au1x00 stuff
158#
159core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
160cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00
161
162#
163# AMD Alchemy Pb1000 eval board
164#
165libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
166cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
167load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
168
169#
170# AMD Alchemy Pb1100 eval board
171#
172libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
173cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
174load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
175
176#
177# AMD Alchemy Pb1500 eval board
178#
179libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
180cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
181load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
182
183#
184# AMD Alchemy Pb1550 eval board
185#
186libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/
187cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
188load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
189
e3ad1c23
PP		 190#
191# AMD Alchemy Pb1200 eval board
192#
193libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/
194cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00
195load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
196
1da177e4
LT		 197#
198# AMD Alchemy Db1000 eval board
199#
200libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
201cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
202load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
203
204#
205# AMD Alchemy Db1100 eval board
206#
207libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
208cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
209load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
210
211#
212# AMD Alchemy Db1500 eval board
213#
214libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
215cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
216load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
217
218#
219# AMD Alchemy Db1550 eval board
220#
221libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/
222cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
223load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
224
e3ad1c23
PP		 225#
226# AMD Alchemy Db1200 eval board
227#
228libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/
229cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00
230load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
231
1da177e4
LT		 232#
233# AMD Alchemy Bosporus eval board
234#
235libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
236cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
237load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
238
239#
240# AMD Alchemy Mirage eval board
241#
242libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
243cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
244load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
245
246#
247# 4G-Systems eval board
248#
249libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
250load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
251
252#
253# MyCable eval board
254#
255libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
256load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
257
258#
259# Cobalt Server
260#
261core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
11ed6d5b 262cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt
1da177e4
LT		 263load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
264
265#
266# DECstation family
267#
268core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
269cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
270libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
271load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
272CLEAN_FILES += drivers/tc/lk201-map.c
273
274#
275# Galileo EV64120 Board
276#
277core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/
278core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/
279cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120
280load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000
281
282#
283# Galileo EV96100 Board
284#
285core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/ev96100/
286cflags-$(CONFIG_MIPS_EV96100) += -Iinclude/asm-mips/mach-ev96100
287load-$(CONFIG_MIPS_EV96100) += 0xffffffff80100000
288
289#
290# Globespan IVR eval board with QED 5231 CPU
291#
292core-$(CONFIG_ITE_BOARD_GEN) += arch/mips/ite-boards/generic/
293core-$(CONFIG_MIPS_IVR) += arch/mips/ite-boards/ivr/
294load-$(CONFIG_MIPS_IVR) += 0xffffffff80100000
295
296#
297# ITE 8172 eval board with QED 5231 CPU
298#
299core-$(CONFIG_MIPS_ITE8172) += arch/mips/ite-boards/qed-4n-s01b/
300load-$(CONFIG_MIPS_ITE8172) += 0xffffffff80100000
301
302#
303# For all MIPS, Inc. eval boards
304#
305core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
306
307#
308# MIPS Atlas board
309#
310core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
311cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
312cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
313load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
314
315#
316# MIPS Malta board
317#
318core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
319cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
320load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
321
322#
323# MIPS SEAD board
324#
325core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
326load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
327
c78cbf49
RB		 328#
329# MIPS SIM
330#
331core-$(CONFIG_MIPS_SIM) += arch/mips/mips-boards/sim/
332cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim
333load-$(CONFIG_MIPS_SIM) += 0x80100000
334
1da177e4
LT		 335#
336# Momentum Ocelot board
337#
338# The Ocelot setup.o must be linked early - it does the ioremap() for the
339# mips_io_port_base.
340#
341core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
342 arch/mips/gt64120/momenco_ocelot/
343cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
344load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
345
346#
347# Momentum Ocelot-G board
348#
349# The Ocelot-G setup.o must be linked early - it does the ioremap() for the
350# mips_io_port_base.
351#
352core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/
353load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000
354
355#
356# Momentum Ocelot-C and -CS boards
357#
358# The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
359# mips_io_port_base.
360core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/
361load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000
362
363#
364# PMC-Sierra Yosemite
365#
366core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
367cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
368load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
369
07119621
RB		 370# Qemu simulating MIPS32 4Kc
371#
372core-$(CONFIG_QEMU) += arch/mips/qemu/
373cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
374load-$(CONFIG_QEMU) += 0xffffffff80010000
375
1da177e4
LT		 376#
377# Momentum Ocelot-3
378#
379core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/
380cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3
381load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000
382
383#
384# Momentum Jaguar ATX
385#
386core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/
387cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja
388#ifdef CONFIG_JAGUAR_DMALOW
389#load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000
390#else
391load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000
392#endif
393
394#
395# NEC DDB
396#
397core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
398
399#
400# NEC DDB Vrc-5074
401#
402core-$(CONFIG_DDB5074) += arch/mips/ddb5xxx/ddb5074/
403load-$(CONFIG_DDB5074) += 0xffffffff80080000
404
405#
406# NEC DDB Vrc-5476
407#
408core-$(CONFIG_DDB5476) += arch/mips/ddb5xxx/ddb5476/
409load-$(CONFIG_DDB5476) += 0xffffffff80080000
410
411#
412# NEC DDB Vrc-5477
413#
414core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
415load-$(CONFIG_DDB5477) += 0xffffffff80100000
416
417core-$(CONFIG_LASAT) += arch/mips/lasat/
418cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
419load-$(CONFIG_LASAT) += 0xffffffff80000000
420
1da177e4
LT		 421#
422# Common VR41xx
423#
424core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
425cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
426
427#
428# NEC VR4133
429#
430core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
431load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
432
433#
434# ZAO Networks Capcella (VR4131)
435#
1da177e4
LT		 436load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
437
438#
439# Victor MP-C303/304 (VR4122)
440#
1da177e4
LT		 441load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
442
443#
444# IBM WorkPad z50 (VR4121)
445#
446core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/
447load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000
448
449#
450# CASIO CASSIPEIA E-55/65 (VR4111)
451#
452core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
453load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
454
455#
63b799f9 456# TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
1da177e4 457#
63b799f9 458load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
1da177e4 459
bdf21b18
PP		 460#
461# Common Philips PNX8550
462#
463core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/
464cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550
465
466#
467# Philips PNX8550 JBS board
468#
469libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/
470#cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
471load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
472
1da177e4
LT		 473#
474# SGI IP22 (Indy/Indigo2)
475#
476# Set the load address to >= 0xffffffff88069000 if you want to leave space for
477# symmon, 0xffffffff80002000 for production kernels. Note that the value must
478# be aligned to a multiple of the kernel stack size or the handling of the
479# current variable will break so for 64-bit kernels we have to raise the start
480# address by 8kb.
481#
482core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
483cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
875d43e7 484ifdef CONFIG_32BIT
1da177e4
LT		 485load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
486endif
875d43e7 487ifdef CONFIG_64BIT
1da177e4
LT		 488load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
489endif
490
491#
492# SGI-IP27 (Origin200/2000)
493#
494# Set the load address to >= 0xc000000000300000 if you want to leave space for
495# symmon, 0xc00000000001c000 for production kernels. Note that the value must
496# be 16kb aligned or the handling of the current variable will break.
497#
498ifdef CONFIG_SGI_IP27
499core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
500cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
1da177e4
LT		 501ifdef CONFIG_MAPPED_KERNEL
502load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
503OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
504dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
505else
506load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
507OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
508endif
1da177e4
LT		 509endif
510
511#
512# SGI-IP32 (O2)
513#
514# Set the load address to >= 80069000 if you want to leave space for symmon,
515# 0xffffffff80004000 for production kernels. Note that the value must be aligned to
516# a multiple of the kernel stack size or the handling of the current variable
517# will break.
518#
519core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
520cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
521load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
522
523#
524# Sibyte SB1250 SOC
525#
526# This is a LIB so that it links at the end, and initcalls are later
527# the sequence; but it is built as an object so that modules don't get
528# removed (as happens, even if they have __initcall/module_init)
529#
530core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
f137e463
AI		 531cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
532 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
1da177e4
LT		 533
534core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
f137e463
AI		 535cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
536 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
537
538core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
539cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
540 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
541
542core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
543cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
544 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
1da177e4
LT		 545
546#
547# Sibyte BCM91120x (Carmel) board
548# Sibyte BCM91120C (CRhine) board
549# Sibyte BCM91125C (CRhone) board
550# Sibyte BCM91125E (Rhone) board
551# Sibyte SWARM board
9a6dcea1 552# Sibyte BCM91x80 (BigSur) board
1da177e4
LT		 553#
554libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
555load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
556libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
557load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
558libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
559load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
560libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
561load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
562libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
563load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
564libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
565load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
9a6dcea1
AI		 566libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
567load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
1da177e4
LT		 568
569#
570# SNI RM200 PCI
571#
572core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/
573cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200
574load-$(CONFIG_SNI_RM200_PCI) += 0xffffffff80600000
575
576#
577# Toshiba JMR-TX3927 board
578#
579core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
580 arch/mips/jmr3927/common/
5135b0cd 581cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
1da177e4
LT		 582load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
583
584#
585# Toshiba RBTX4927 board or
586# Toshiba RBTX4937 board
587#
588core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
589core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
590load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
591
23fbee9d
RB		 592#
593# Toshiba RBTX4938 board
594#
595core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
596core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
597load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
598
1da177e4
LT		 599cflags-y += -Iinclude/asm-mips/mach-generic
600drivers-$(CONFIG_PCI) += arch/mips/pci/
601
875d43e7 602ifdef CONFIG_32BIT
1da177e4
LT		 603ifdef CONFIG_CPU_LITTLE_ENDIAN
604JIFFIES = jiffies_64
605else
606JIFFIES = jiffies_64 + 4
607endif
608else
609JIFFIES = jiffies_64
610endif
611
612AFLAGS += $(cflags-y)
613CFLAGS += $(cflags-y)
614
615LDFLAGS += -m $(ld-emul)
616
59b3e8e9
RB		 617ifdef CONFIG_MIPS
618CHECKFLAGS += $(shell $(CC) $(CFLAGS) -dM -E -xc /dev/null | \
619 egrep -vw '__GNUC_(MAJOR|MINOR|PATCHLEVEL)__' | \
2a2c3e45
AN		 620 sed -e 's/^\#define /-D/' -e "s/ /='/" -e "s/$$/'/")
621ifdef CONFIG_64BIT
622CHECKFLAGS += -m64
623endif
59b3e8e9
RB		 624endif
625
1da177e4
LT		 626OBJCOPYFLAGS += --remove-section=.reginfo
627
628#
629# Choosing incompatible machines durings configuration will result in
630# error messages during linking. Select a default linkscript if
631# none has been choosen above.
632#
633
634CPPFLAGS_vmlinux.lds := \
635 $(CFLAGS) \
636 -D"LOADADDR=$(load-y)" \
637 -D"JIFFIES=$(JIFFIES)" \
638 -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
639
640head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
641
642libs-y += arch/mips/lib/
875d43e7
RB		 643libs-$(CONFIG_32BIT) += arch/mips/lib-32/
644libs-$(CONFIG_64BIT) += arch/mips/lib-64/
1da177e4
LT		 645
646core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
647
648drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
649
650ifdef CONFIG_LASAT
651rom.bin rom.sw: vmlinux
7c6b155f 652 $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
1da177e4
LT		 653endif
654
655#
656# Some machines like the Indy need 32-bit ELF binaries for booting purposes.
657# Other need ECOFF, so we build a 32-bit ELF binary for them which we then
658# convert to ECOFF using elf2ecoff.
659#
660vmlinux.32: vmlinux
661 $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
662
663#
664# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
665# ELF files from 32-bit files by conversion.
666#
667vmlinux.64: vmlinux
668 $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
669
670makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
671
672ifdef CONFIG_BOOT_ELF32
673all: $(vmlinux-32)
674endif
675
676ifdef CONFIG_BOOT_ELF64
677all: $(vmlinux-64)
678endif
679
149f60b3
RB		 680ifdef CONFIG_MIPS_ATLAS
681all: vmlinux.srec
682endif
683
684ifdef CONFIG_MIPS_MALTA
685all: vmlinux.srec
686endif
687
688ifdef CONFIG_MIPS_SEAD
689all: vmlinux.srec
690endif
691
154b500b
RB		 692ifdef CONFIG_QEMU
693all: vmlinux.bin
694endif
695
1da177e4
LT		 696ifdef CONFIG_SNI_RM200_PCI
697all: vmlinux.ecoff
698endif
699
154b500b
RB		 700vmlinux.bin: $(vmlinux-32)
701 +@$(call makeboot,$@)
702
1da177e4
LT		 703vmlinux.ecoff vmlinux.rm200: $(vmlinux-32)
704 +@$(call makeboot,$@)
705
706vmlinux.srec: $(vmlinux-32)
707 +@$(call makeboot,$@)
708
709CLEAN_FILES += vmlinux.ecoff \
710 vmlinux.srec \
711 vmlinux.rm200.tmp \
712 vmlinux.rm200
713
714archclean:
715 @$(MAKE) $(clean)=arch/mips/boot
716 @$(MAKE) $(clean)=arch/mips/lasat
717
048eb582 718CLEAN_FILES += vmlinux.32 \
1da177e4
LT		 719 vmlinux.64 \
720 vmlinux.ecoff
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