[mirror_ubuntu-jammy-kernel.git] / arch / mips / alchemy / board-mtx1.c

/*
 * MTX-1 platform devices registration (Au1500)
 *
 * Copyright (C) 2007-2009, Florian Fainelli <florian@openwrt.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/leds.h>
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <mtd/mtd-abi.h>
#include <asm/bootinfo.h>
#include <asm/reboot.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-au1x00/au1xxx_eth.h>
#include <prom.h>

const char *get_system_type(void)
{
	return "MTX-1";
}

void __init prom_init(void)
{
	unsigned char *memsize_str;
	unsigned long memsize;

	prom_argc = fw_arg0;
	prom_argv = (char **)fw_arg1;
	prom_envp = (char **)fw_arg2;

	prom_init_cmdline();

	memsize_str = prom_getenv("memsize");
	if (!memsize_str || kstrtoul(memsize_str, 0, &memsize))
		memsize = 0x04000000;
	add_memory_region(0, memsize, BOOT_MEM_RAM);
}

void prom_putchar(unsigned char c)
{
	alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
}

static void mtx1_reset(char *c)
{
	/* Jump to the reset vector */
	__asm__ __volatile__("jr\t%0" : : "r"(0xbfc00000));
}

static void mtx1_power_off(void)
{
	while (1)
		asm volatile (
		"	.set	mips32					\n"
		"	wait						\n"
		"	.set	mips0					\n");
}

void __init board_setup(void)
{
#if IS_ENABLED(CONFIG_USB_OHCI_HCD)
	/* Enable USB power switch */
	alchemy_gpio_direction_output(204, 0);
#endif /* IS_ENABLED(CONFIG_USB_OHCI_HCD) */

	/* Initialize sys_pinfunc */
	au_writel(SYS_PF_NI2, SYS_PINFUNC);

	/* Initialize GPIO */
	au_writel(~0, KSEG1ADDR(AU1000_SYS_PHYS_ADDR) + SYS_TRIOUTCLR);
	alchemy_gpio_direction_output(0, 0);	/* Disable M66EN (PCI 66MHz) */
	alchemy_gpio_direction_output(3, 1);	/* Disable PCI CLKRUN# */
	alchemy_gpio_direction_output(1, 1);	/* Enable EXT_IO3 */
	alchemy_gpio_direction_output(5, 0);	/* Disable eth PHY TX_ER */

	/* Enable LED and set it to green */
	alchemy_gpio_direction_output(211, 1);	/* green on */
	alchemy_gpio_direction_output(212, 0);	/* red off */

	pm_power_off = mtx1_power_off;
	_machine_halt = mtx1_power_off;
	_machine_restart = mtx1_reset;

	printk(KERN_INFO "4G Systems MTX-1 Board\n");
}

/******************************************************************************/

static struct gpio_keys_button mtx1_gpio_button[] = {
	{
		.gpio = 207,
		.code = BTN_0,
		.desc = "System button",
	}
};

static struct gpio_keys_platform_data mtx1_buttons_data = {
	.buttons = mtx1_gpio_button,
	.nbuttons = ARRAY_SIZE(mtx1_gpio_button),
};

static struct platform_device mtx1_button = {
	.name = "gpio-keys",
	.id = -1,
	.dev = {
		.platform_data = &mtx1_buttons_data,
	}
};

static struct resource mtx1_wdt_res[] = {
	[0] = {
		.start	= 215,
		.end	= 215,
		.name	= "mtx1-wdt-gpio",
		.flags	= IORESOURCE_IRQ,
	}
};

static struct platform_device mtx1_wdt = {
	.name = "mtx1-wdt",
	.id = 0,
	.num_resources = ARRAY_SIZE(mtx1_wdt_res),
	.resource = mtx1_wdt_res,
};

static struct gpio_led default_leds[] = {
	{
		.name	= "mtx1:green",
		.gpio = 211,
	}, {
		.name = "mtx1:red",
		.gpio = 212,
	},
};

static struct gpio_led_platform_data mtx1_led_data = {
	.num_leds = ARRAY_SIZE(default_leds),
	.leds = default_leds,
};

static struct platform_device mtx1_gpio_leds = {
	.name = "leds-gpio",
	.id = -1,
	.dev = {
		.platform_data = &mtx1_led_data,
	}
};

static struct mtd_partition mtx1_mtd_partitions[] = {
	{
		.name	= "filesystem",
		.size	= 0x01C00000,
		.offset = 0,
	},
	{
		.name	= "yamon",
		.size	= 0x00100000,
		.offset = MTDPART_OFS_APPEND,
		.mask_flags = MTD_WRITEABLE,
	},
	{
		.name	= "kernel",
		.size	= 0x002c0000,
		.offset = MTDPART_OFS_APPEND,
	},
	{
		.name	= "yamon env",
		.size	= 0x00040000,
		.offset = MTDPART_OFS_APPEND,
	},
};

static struct physmap_flash_data mtx1_flash_data = {
	.width		= 4,
	.nr_parts	= 4,
	.parts		= mtx1_mtd_partitions,
};

static struct resource mtx1_mtd_resource = {
	.start	= 0x1e000000,
	.end	= 0x1fffffff,
	.flags	= IORESOURCE_MEM,
};

static struct platform_device mtx1_mtd = {
	.name		= "physmap-flash",
	.dev		= {
		.platform_data	= &mtx1_flash_data,
	},
	.num_resources	= 1,
	.resource	= &mtx1_mtd_resource,
};

static struct resource alchemy_pci_host_res[] = {
	[0] = {
		.start	= AU1500_PCI_PHYS_ADDR,
		.end	= AU1500_PCI_PHYS_ADDR + 0xfff,
		.flags	= IORESOURCE_MEM,
	},
};

static int mtx1_pci_idsel(unsigned int devsel, int assert)
{
	/* This function is only necessary to support a proprietary Cardbus
	 * adapter on the mtx-1 "singleboard" variant. It triggers a custom
	 * logic chip connected to EXT_IO3 (GPIO1) to suppress IDSEL signals.
	 */
	udelay(1);

	if (assert && devsel != 0)
		/* Suppress signal to Cardbus */
		alchemy_gpio_set_value(1, 0);	/* set EXT_IO3 OFF */
	else
		alchemy_gpio_set_value(1, 1);	/* set EXT_IO3 ON */

	udelay(1);
	return 1;
}

static const char mtx1_irqtab[][5] = {
	[0] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 00 - AdapterA-Slot0 (top) */
	[1] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 01 - AdapterA-Slot1 (bottom) */
	[2] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 02 - AdapterB-Slot0 (top) */
	[3] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 03 - AdapterB-Slot1 (bottom) */
	[4] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 04 - AdapterC-Slot0 (top) */
	[5] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 05 - AdapterC-Slot1 (bottom) */
	[6] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 06 - AdapterD-Slot0 (top) */
	[7] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 07 - AdapterD-Slot1 (bottom) */
};

static int mtx1_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
{
	return mtx1_irqtab[slot][pin];
}

static struct alchemy_pci_platdata mtx1_pci_pd = {
	.board_map_irq	 = mtx1_map_pci_irq,
	.board_pci_idsel = mtx1_pci_idsel,
	.pci_cfg_set	 = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H |
			   PCI_CONFIG_CH |
#if defined(__MIPSEB__)
			   PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM,
#else
			   0,
#endif
};

static struct platform_device mtx1_pci_host = {
	.dev.platform_data = &mtx1_pci_pd,
	.name		= "alchemy-pci",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(alchemy_pci_host_res),
	.resource	= alchemy_pci_host_res,
};

static struct platform_device *mtx1_devs[] __initdata = {
	&mtx1_pci_host,
	&mtx1_gpio_leds,
	&mtx1_wdt,
	&mtx1_button,
	&mtx1_mtd,
};

static struct au1000_eth_platform_data mtx1_au1000_eth0_pdata = {
	.phy_search_highest_addr	= 1,
	.phy1_search_mac0		= 1,
};

static int __init mtx1_register_devices(void)
{
	int rc;

	irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_HIGH);
	irq_set_irq_type(AU1500_GPIO201_INT, IRQ_TYPE_LEVEL_LOW);
	irq_set_irq_type(AU1500_GPIO202_INT, IRQ_TYPE_LEVEL_LOW);
	irq_set_irq_type(AU1500_GPIO203_INT, IRQ_TYPE_LEVEL_LOW);
	irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);

	au1xxx_override_eth_cfg(0, &mtx1_au1000_eth0_pdata);

	rc = gpio_request(mtx1_gpio_button[0].gpio,
					mtx1_gpio_button[0].desc);
	if (rc < 0) {
		printk(KERN_INFO "mtx1: failed to request %d\n",
					mtx1_gpio_button[0].gpio);
		goto out;
	}
	gpio_direction_input(mtx1_gpio_button[0].gpio);
out:
	return platform_add_devices(mtx1_devs, ARRAY_SIZE(mtx1_devs));
}
arch_initcall(mtx1_register_devices);
Commit	Line	Data
26c288f8	1	/*
8e026910	2	* MTX-1 platform devices registration (Au1500)
26c288f8	3	*
a1b021d3	4	* Copyright (C) 2007-2009, Florian Fainelli <florian@openwrt.org>
26c288f8 FF	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	19	*/
	20
	21	#include <linux/init.h>
8e026910 ML	22	#include <linux/interrupt.h>
8e026910 ML	23	#include <linux/kernel.h>
26c288f8 FF	24	#include <linux/platform_device.h>
26c288f8 FF	25	#include <linux/leds.h>
1ff1a78c	26	#include <linux/gpio.h>
f6ed10ab FF	27	#include <linux/gpio_keys.h>
f6ed10ab FF	28	#include <linux/input.h>
95283563 YY	29	#include <linux/mtd/partitions.h>
	30	#include <linux/mtd/physmap.h>
	31	#include <mtd/mtd-abi.h>
8e026910 ML	32	#include <asm/bootinfo.h>
	33	#include <asm/reboot.h>
	34	#include <asm/mach-au1x00/au1000.h>
bf3a1eb8	35	#include <asm/mach-au1x00/au1xxx_eth.h>
8e026910 ML	36	#include <prom.h>
	37
	38	const char *get_system_type(void)
	39	{
	40	return "MTX-1";
	41	}
	42
	43	void __init prom_init(void)
	44	{
	45	unsigned char *memsize_str;
	46	unsigned long memsize;
	47
	48	prom_argc = fw_arg0;
	49	prom_argv = (char **)fw_arg1;
	50	prom_envp = (char **)fw_arg2;
	51
	52	prom_init_cmdline();
	53
	54	memsize_str = prom_getenv("memsize");
d334c2b9	55	if (!memsize_str \|\| kstrtoul(memsize_str, 0, &memsize))
8e026910	56	memsize = 0x04000000;
8e026910 ML	57	add_memory_region(0, memsize, BOOT_MEM_RAM);
	58	}
	59
	60	void prom_putchar(unsigned char c)
	61	{
	62	alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
	63	}
	64
	65	static void mtx1_reset(char *c)
	66	{
	67	/* Jump to the reset vector */
	68	__asm__ __volatile__("jr\t%0" : : "r"(0xbfc00000));
	69	}
	70
	71	static void mtx1_power_off(void)
	72	{
	73	while (1)
	74	asm volatile (
	75	" .set mips32 \n"
	76	" wait \n"
	77	" .set mips0 \n");
	78	}
	79
	80	void __init board_setup(void)
	81	{
4bd5a574	82	#if IS_ENABLED(CONFIG_USB_OHCI_HCD)
8e026910 ML	83	/* Enable USB power switch */
8e026910 ML	84	alchemy_gpio_direction_output(204, 0);
4bd5a574	85	#endif /* IS_ENABLED(CONFIG_USB_OHCI_HCD) */
8e026910 ML	86
	87	/* Initialize sys_pinfunc */
	88	au_writel(SYS_PF_NI2, SYS_PINFUNC);
	89
	90	/* Initialize GPIO */
	91	au_writel(~0, KSEG1ADDR(AU1000_SYS_PHYS_ADDR) + SYS_TRIOUTCLR);
	92	alchemy_gpio_direction_output(0, 0); /* Disable M66EN (PCI 66MHz) */
	93	alchemy_gpio_direction_output(3, 1); /* Disable PCI CLKRUN# */
	94	alchemy_gpio_direction_output(1, 1); /* Enable EXT_IO3 */
	95	alchemy_gpio_direction_output(5, 0); /* Disable eth PHY TX_ER */
	96
	97	/* Enable LED and set it to green */
	98	alchemy_gpio_direction_output(211, 1); /* green on */
	99	alchemy_gpio_direction_output(212, 0); /* red off */
	100
	101	pm_power_off = mtx1_power_off;
	102	_machine_halt = mtx1_power_off;
	103	_machine_restart = mtx1_reset;
	104
	105	printk(KERN_INFO "4G Systems MTX-1 Board\n");
	106	}
	107
	108	/******************************************************************************/
bf3a1eb8	109
f6ed10ab FF	110	static struct gpio_keys_button mtx1_gpio_button[] = {
	111	{
	112	.gpio = 207,
	113	.code = BTN_0,
	114	.desc = "System button",
	115	}
	116	};
	117
	118	static struct gpio_keys_platform_data mtx1_buttons_data = {
	119	.buttons = mtx1_gpio_button,
	120	.nbuttons = ARRAY_SIZE(mtx1_gpio_button),
	121	};
	122
	123	static struct platform_device mtx1_button = {
	124	.name = "gpio-keys",
	125	.id = -1,
	126	.dev = {
	127	.platform_data = &mtx1_buttons_data,
	128	}
	129	};
	130
26c288f8 FF	131	static struct resource mtx1_wdt_res[] = {
26c288f8 FF	132	[0] = {
b7f720d6 ML	133	.start = 215,
b7f720d6 ML	134	.end = 215,
26c288f8 FF	135	.name = "mtx1-wdt-gpio",
	136	.flags = IORESOURCE_IRQ,
	137	}
	138	};
	139
26c288f8 FF	140	static struct platform_device mtx1_wdt = {
	141	.name = "mtx1-wdt",
	142	.id = 0,
	143	.num_resources = ARRAY_SIZE(mtx1_wdt_res),
	144	.resource = mtx1_wdt_res,
	145	};
	146
	147	static struct gpio_led default_leds[] = {
	148	{
	149	.name = "mtx1:green",
	150	.gpio = 211,
	151	}, {
	152	.name = "mtx1:red",
	153	.gpio = 212,
	154	},
	155	};
	156
	157	static struct gpio_led_platform_data mtx1_led_data = {
	158	.num_leds = ARRAY_SIZE(default_leds),
	159	.leds = default_leds,
	160	};
	161
	162	static struct platform_device mtx1_gpio_leds = {
	163	.name = "leds-gpio",
	164	.id = -1,
	165	.dev = {
	166	.platform_data = &mtx1_led_data,
	167	}
	168	};
	169
95283563 YY	170	static struct mtd_partition mtx1_mtd_partitions[] = {
	171	{
	172	.name = "filesystem",
	173	.size = 0x01C00000,
70342287	174	.offset = 0,
95283563 YY	175	},
	176	{
	177	.name = "yamon",
	178	.size = 0x00100000,
70342287	179	.offset = MTDPART_OFS_APPEND,
95283563 YY	180	.mask_flags = MTD_WRITEABLE,
	181	},
	182	{
	183	.name = "kernel",
	184	.size = 0x002c0000,
70342287	185	.offset = MTDPART_OFS_APPEND,
95283563 YY	186	},
	187	{
	188	.name = "yamon env",
	189	.size = 0x00040000,
70342287	190	.offset = MTDPART_OFS_APPEND,
95283563 YY	191	},
	192	};
	193
	194	static struct physmap_flash_data mtx1_flash_data = {
	195	.width = 4,
	196	.nr_parts = 4,
	197	.parts = mtx1_mtd_partitions,
	198	};
	199
	200	static struct resource mtx1_mtd_resource = {
	201	.start = 0x1e000000,
	202	.end = 0x1fffffff,
	203	.flags = IORESOURCE_MEM,
	204	};
	205
	206	static struct platform_device mtx1_mtd = {
	207	.name = "physmap-flash",
	208	.dev = {
	209	.platform_data = &mtx1_flash_data,
	210	},
	211	.num_resources = 1,
	212	.resource = &mtx1_mtd_resource,
	213	};
	214
7517de34 ML	215	static struct resource alchemy_pci_host_res[] = {
	216	[0] = {
	217	.start = AU1500_PCI_PHYS_ADDR,
	218	.end = AU1500_PCI_PHYS_ADDR + 0xfff,
	219	.flags = IORESOURCE_MEM,
	220	},
	221	};
	222
	223	static int mtx1_pci_idsel(unsigned int devsel, int assert)
	224	{
	225	/* This function is only necessary to support a proprietary Cardbus
	226	* adapter on the mtx-1 "singleboard" variant. It triggers a custom
	227	* logic chip connected to EXT_IO3 (GPIO1) to suppress IDSEL signals.
	228	*/
143ec74e BR	229	udelay(1);
143ec74e BR	230
7517de34 ML	231	if (assert && devsel != 0)
	232	/* Suppress signal to Cardbus */
	233	alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */
	234	else
	235	alchemy_gpio_set_value(1, 1); /* set EXT_IO3 ON */
	236
	237	udelay(1);
	238	return 1;
	239	}
	240
	241	static const char mtx1_irqtab[][5] = {
	242	[0] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 00 - AdapterA-Slot0 (top) */
	243	[1] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 01 - AdapterA-Slot1 (bottom) */
	244	[2] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 02 - AdapterB-Slot0 (top) */
	245	[3] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 03 - AdapterB-Slot1 (bottom) */
	246	[4] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 04 - AdapterC-Slot0 (top) */
	247	[5] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 05 - AdapterC-Slot1 (bottom) */
	248	[6] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 06 - AdapterD-Slot0 (top) */
	249	[7] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 07 - AdapterD-Slot1 (bottom) */
	250	};
	251
	252	static int mtx1_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
	253	{
	254	return mtx1_irqtab[slot][pin];
	255	}
	256
	257	static struct alchemy_pci_platdata mtx1_pci_pd = {
	258	.board_map_irq = mtx1_map_pci_irq,
	259	.board_pci_idsel = mtx1_pci_idsel,
	260	.pci_cfg_set = PCI_CONFIG_AEN \| PCI_CONFIG_R2H \| PCI_CONFIG_R1H \|
	261	PCI_CONFIG_CH \|
	262	#if defined(__MIPSEB__)
	263	PCI_CONFIG_SIC_HWA_DAT \| PCI_CONFIG_SM,
	264	#else
	265	0,
	266	#endif
	267	};
	268
	269	static struct platform_device mtx1_pci_host = {
	270	.dev.platform_data = &mtx1_pci_pd,
	271	.name = "alchemy-pci",
	272	.id = 0,
	273	.num_resources = ARRAY_SIZE(alchemy_pci_host_res),
	274	.resource = alchemy_pci_host_res,
	275	};
	276
08ebb250	277	static struct platform_device *mtx1_devs[] __initdata = {
7517de34	278	&mtx1_pci_host,
26c288f8	279	&mtx1_gpio_leds,
f6ed10ab	280	&mtx1_wdt,
95283563 YY	281	&mtx1_button,
95283563 YY	282	&mtx1_mtd,
26c288f8 FF	283	};
26c288f8 FF	284
bf3a1eb8 FF	285	static struct au1000_eth_platform_data mtx1_au1000_eth0_pdata = {
bf3a1eb8 FF	286	.phy_search_highest_addr = 1,
8e026910	287	.phy1_search_mac0 = 1,
bf3a1eb8 FF	288	};
bf3a1eb8 FF	289
26c288f8 FF	290	static int __init mtx1_register_devices(void)
26c288f8 FF	291	{
a1b021d3 FF	292	int rc;
a1b021d3 FF	293
8e026910 ML	294	irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_HIGH);
	295	irq_set_irq_type(AU1500_GPIO201_INT, IRQ_TYPE_LEVEL_LOW);
	296	irq_set_irq_type(AU1500_GPIO202_INT, IRQ_TYPE_LEVEL_LOW);
	297	irq_set_irq_type(AU1500_GPIO203_INT, IRQ_TYPE_LEVEL_LOW);
	298	irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);
	299
bf3a1eb8 FF	300	au1xxx_override_eth_cfg(0, &mtx1_au1000_eth0_pdata);
bf3a1eb8 FF	301
a1b021d3 FF	302	rc = gpio_request(mtx1_gpio_button[0].gpio,
	303	mtx1_gpio_button[0].desc);
	304	if (rc < 0) {
	305	printk(KERN_INFO "mtx1: failed to request %d\n",
	306	mtx1_gpio_button[0].gpio);
	307	goto out;
	308	}
	309	gpio_direction_input(mtx1_gpio_button[0].gpio);
	310	out:
26c288f8 FF	311	return platform_add_devices(mtx1_devs, ARRAY_SIZE(mtx1_devs));
26c288f8 FF	312	}
26c288f8	313	arch_initcall(mtx1_register_devices);