[mirror_ubuntu-kernels.git] / arch / mips / alchemy / devboards / platform.c

// SPDX-License-Identifier: GPL-2.0
/*
 * devoard misc stuff.
 */

#include <linux/init.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/physmap.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
#include <linux/pm.h>

#include <asm/bootinfo.h>
#include <asm/idle.h>
#include <asm/reboot.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-db1x00/bcsr.h>

#include <prom.h>

void __init prom_init(void)
{
	unsigned char *memsize_str;
	unsigned long memsize;

	prom_argc = (int)fw_arg0;
	prom_argv = (char **)fw_arg1;
	prom_envp = (char **)fw_arg2;

	prom_init_cmdline();
	memsize_str = prom_getenv("memsize");
	if (!memsize_str || kstrtoul(memsize_str, 0, &memsize))
		memsize = 64 << 20; /* all devboards have at least 64MB RAM */

	add_memory_region(0, memsize, BOOT_MEM_RAM);
}

void prom_putchar(unsigned char c)
{
	if (alchemy_get_cputype() == ALCHEMY_CPU_AU1300)
		alchemy_uart_putchar(AU1300_UART2_PHYS_ADDR, c);
	else
		alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
}


static struct platform_device db1x00_rtc_dev = {
	.name	= "rtc-au1xxx",
	.id	= -1,
};


static void db1x_power_off(void)
{
	bcsr_write(BCSR_RESETS, 0);
	bcsr_write(BCSR_SYSTEM, BCSR_SYSTEM_PWROFF | BCSR_SYSTEM_RESET);
	while (1)		/* sit and spin */
		cpu_wait();
}

static void db1x_reset(char *c)
{
	bcsr_write(BCSR_RESETS, 0);
	bcsr_write(BCSR_SYSTEM, 0);
}

static int __init db1x_late_setup(void)
{
	if (!pm_power_off)
		pm_power_off = db1x_power_off;
	if (!_machine_halt)
		_machine_halt = db1x_power_off;
	if (!_machine_restart)
		_machine_restart = db1x_reset;

	platform_device_register(&db1x00_rtc_dev);

	return 0;
}
device_initcall(db1x_late_setup);

/* register a pcmcia socket */
int __init db1x_register_pcmcia_socket(phys_addr_t pcmcia_attr_start,
				       phys_addr_t pcmcia_attr_end,
				       phys_addr_t pcmcia_mem_start,
				       phys_addr_t pcmcia_mem_end,
				       phys_addr_t pcmcia_io_start,
				       phys_addr_t pcmcia_io_end,
				       int card_irq,
				       int cd_irq,
				       int stschg_irq,
				       int eject_irq,
				       int id)
{
	int cnt, i, ret;
	struct resource *sr;
	struct platform_device *pd;

	cnt = 5;
	if (eject_irq)
		cnt++;
	if (stschg_irq)
		cnt++;

	sr = kzalloc(sizeof(struct resource) * cnt, GFP_KERNEL);
	if (!sr)
		return -ENOMEM;

	pd = platform_device_alloc("db1xxx_pcmcia", id);
	if (!pd) {
		ret = -ENOMEM;
		goto out;
	}

	sr[0].name	= "pcmcia-attr";
	sr[0].flags	= IORESOURCE_MEM;
	sr[0].start	= pcmcia_attr_start;
	sr[0].end	= pcmcia_attr_end;

	sr[1].name	= "pcmcia-mem";
	sr[1].flags	= IORESOURCE_MEM;
	sr[1].start	= pcmcia_mem_start;
	sr[1].end	= pcmcia_mem_end;

	sr[2].name	= "pcmcia-io";
	sr[2].flags	= IORESOURCE_MEM;
	sr[2].start	= pcmcia_io_start;
	sr[2].end	= pcmcia_io_end;

	sr[3].name	= "insert";
	sr[3].flags	= IORESOURCE_IRQ;
	sr[3].start = sr[3].end = cd_irq;

	sr[4].name	= "card";
	sr[4].flags	= IORESOURCE_IRQ;
	sr[4].start = sr[4].end = card_irq;

	i = 5;
	if (stschg_irq) {
		sr[i].name	= "stschg";
		sr[i].flags	= IORESOURCE_IRQ;
		sr[i].start = sr[i].end = stschg_irq;
		i++;
	}
	if (eject_irq) {
		sr[i].name	= "eject";
		sr[i].flags	= IORESOURCE_IRQ;
		sr[i].start = sr[i].end = eject_irq;
	}

	pd->resource = sr;
	pd->num_resources = cnt;

	ret = platform_device_add(pd);
	if (!ret)
		return 0;

	platform_device_put(pd);
out:
	kfree(sr);
	return ret;
}

#define YAMON_SIZE	0x00100000
#define YAMON_ENV_SIZE	0x00040000

int __init db1x_register_norflash(unsigned long size, int width,
				  int swapped)
{
	struct physmap_flash_data *pfd;
	struct platform_device *pd;
	struct mtd_partition *parts;
	struct resource *res;
	int ret, i;

	if (size < (8 * 1024 * 1024))
		return -EINVAL;

	ret = -ENOMEM;
	parts = kzalloc(sizeof(struct mtd_partition) * 5, GFP_KERNEL);
	if (!parts)
		goto out;

	res = kzalloc(sizeof(struct resource), GFP_KERNEL);
	if (!res)
		goto out1;

	pfd = kzalloc(sizeof(struct physmap_flash_data), GFP_KERNEL);
	if (!pfd)
		goto out2;

	pd = platform_device_alloc("physmap-flash", 0);
	if (!pd)
		goto out3;

	/* NOR flash ends at 0x20000000, regardless of size */
	res->start = 0x20000000 - size;
	res->end = 0x20000000 - 1;
	res->flags = IORESOURCE_MEM;

	/* partition setup.  Most Develboards have a switch which allows
	 * to swap the physical locations of the 2 NOR flash banks.
	 */
	i = 0;
	if (!swapped) {
		/* first NOR chip */
		parts[i].offset = 0;
		parts[i].name = "User FS";
		parts[i].size = size / 2;
		i++;
	}

	parts[i].offset = MTDPART_OFS_APPEND;
	parts[i].name = "User FS 2";
	parts[i].size = (size / 2) - (0x20000000 - 0x1fc00000);
	i++;

	parts[i].offset = MTDPART_OFS_APPEND;
	parts[i].name = "YAMON";
	parts[i].size = YAMON_SIZE;
	parts[i].mask_flags = MTD_WRITEABLE;
	i++;

	parts[i].offset = MTDPART_OFS_APPEND;
	parts[i].name = "raw kernel";
	parts[i].size = 0x00400000 - YAMON_SIZE - YAMON_ENV_SIZE;
	i++;

	parts[i].offset = MTDPART_OFS_APPEND;
	parts[i].name = "YAMON Env";
	parts[i].size = YAMON_ENV_SIZE;
	parts[i].mask_flags = MTD_WRITEABLE;
	i++;

	if (swapped) {
		parts[i].offset = MTDPART_OFS_APPEND;
		parts[i].name = "User FS";
		parts[i].size = size / 2;
		i++;
	}

	pfd->width = width;
	pfd->parts = parts;
	pfd->nr_parts = 5;

	pd->dev.platform_data = pfd;
	pd->resource = res;
	pd->num_resources = 1;

	ret = platform_device_add(pd);
	if (!ret)
		return ret;

	platform_device_put(pd);
out3:
	kfree(pfd);
out2:
	kfree(res);
out1:
	kfree(parts);
out:
	return ret;
}
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
27dd65ac ML	2	/*
	3	* devoard misc stuff.
	4	*/
	5
	6	#include <linux/init.h>
206aa6cd ML	7	#include <linux/mtd/mtd.h>
	8	#include <linux/mtd/map.h>
	9	#include <linux/mtd/physmap.h>
27dd65ac ML	10	#include <linux/slab.h>
27dd65ac ML	11	#include <linux/platform_device.h>
32fd6901 ML	12	#include <linux/pm.h>
32fd6901 ML	13
278bf05c	14	#include <asm/bootinfo.h>
092ea466	15	#include <asm/idle.h>
32fd6901	16	#include <asm/reboot.h>
278bf05c	17	#include <asm/mach-au1x00/au1000.h>
32fd6901 ML	18	#include <asm/mach-db1x00/bcsr.h>
32fd6901 ML	19
278bf05c ML	20	#include <prom.h>
	21
	22	void __init prom_init(void)
	23	{
	24	unsigned char *memsize_str;
	25	unsigned long memsize;
	26
	27	prom_argc = (int)fw_arg0;
	28	prom_argv = (char **)fw_arg1;
	29	prom_envp = (char **)fw_arg2;
	30
	31	prom_init_cmdline();
	32	memsize_str = prom_getenv("memsize");
	33	if (!memsize_str \|\| kstrtoul(memsize_str, 0, &memsize))
	34	memsize = 64 << 20; /* all devboards have at least 64MB RAM */
	35
	36	add_memory_region(0, memsize, BOOT_MEM_RAM);
	37	}
	38
	39	void prom_putchar(unsigned char c)
	40	{
bd8510df ML	41	if (alchemy_get_cputype() == ALCHEMY_CPU_AU1300)
	42	alchemy_uart_putchar(AU1300_UART2_PHYS_ADDR, c);
	43	else
	44	alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
278bf05c ML	45	}
278bf05c ML	46
1c043f16 ML	47
	48	static struct platform_device db1x00_rtc_dev = {
	49	.name = "rtc-au1xxx",
	50	.id = -1,
	51	};
	52
	53
32fd6901 ML	54	static void db1x_power_off(void)
	55	{
	56	bcsr_write(BCSR_RESETS, 0);
	57	bcsr_write(BCSR_SYSTEM, BCSR_SYSTEM_PWROFF \| BCSR_SYSTEM_RESET);
092ea466 ML	58	while (1) /* sit and spin */
092ea466 ML	59	cpu_wait();
32fd6901 ML	60	}
	61
	62	static void db1x_reset(char *c)
	63	{
	64	bcsr_write(BCSR_RESETS, 0);
	65	bcsr_write(BCSR_SYSTEM, 0);
	66	}
	67
1c043f16	68	static int __init db1x_late_setup(void)
32fd6901 ML	69	{
	70	if (!pm_power_off)
	71	pm_power_off = db1x_power_off;
	72	if (!_machine_halt)
	73	_machine_halt = db1x_power_off;
	74	if (!_machine_restart)
	75	_machine_restart = db1x_reset;
	76
1c043f16 ML	77	platform_device_register(&db1x00_rtc_dev);
1c043f16 ML	78
32fd6901 ML	79	return 0;
32fd6901 ML	80	}
1c043f16	81	device_initcall(db1x_late_setup);
27dd65ac ML	82
27dd65ac ML	83	/* register a pcmcia socket */
11b897cf ML	84	int __init db1x_register_pcmcia_socket(phys_addr_t pcmcia_attr_start,
	85	phys_addr_t pcmcia_attr_end,
	86	phys_addr_t pcmcia_mem_start,
	87	phys_addr_t pcmcia_mem_end,
	88	phys_addr_t pcmcia_io_start,
	89	phys_addr_t pcmcia_io_end,
27dd65ac ML	90	int card_irq,
	91	int cd_irq,
	92	int stschg_irq,
	93	int eject_irq,
	94	int id)
	95	{
	96	int cnt, i, ret;
	97	struct resource *sr;
	98	struct platform_device *pd;
	99
	100	cnt = 5;
	101	if (eject_irq)
	102	cnt++;
	103	if (stschg_irq)
	104	cnt++;
	105
	106	sr = kzalloc(sizeof(struct resource) * cnt, GFP_KERNEL);
	107	if (!sr)
	108	return -ENOMEM;
	109
	110	pd = platform_device_alloc("db1xxx_pcmcia", id);
	111	if (!pd) {
	112	ret = -ENOMEM;
	113	goto out;
	114	}
	115
11b897cf	116	sr[0].name = "pcmcia-attr";
27dd65ac	117	sr[0].flags = IORESOURCE_MEM;
11b897cf ML	118	sr[0].start = pcmcia_attr_start;
11b897cf ML	119	sr[0].end = pcmcia_attr_end;
27dd65ac	120
11b897cf	121	sr[1].name = "pcmcia-mem";
27dd65ac	122	sr[1].flags = IORESOURCE_MEM;
11b897cf ML	123	sr[1].start = pcmcia_mem_start;
11b897cf ML	124	sr[1].end = pcmcia_mem_end;
27dd65ac	125
11b897cf	126	sr[2].name = "pcmcia-io";
27dd65ac	127	sr[2].flags = IORESOURCE_MEM;
11b897cf ML	128	sr[2].start = pcmcia_io_start;
11b897cf ML	129	sr[2].end = pcmcia_io_end;
27dd65ac ML	130
	131	sr[3].name = "insert";
	132	sr[3].flags = IORESOURCE_IRQ;
	133	sr[3].start = sr[3].end = cd_irq;
	134
	135	sr[4].name = "card";
	136	sr[4].flags = IORESOURCE_IRQ;
	137	sr[4].start = sr[4].end = card_irq;
	138
	139	i = 5;
	140	if (stschg_irq) {
11b897cf	141	sr[i].name = "stschg";
27dd65ac	142	sr[i].flags = IORESOURCE_IRQ;
11b897cf	143	sr[i].start = sr[i].end = stschg_irq;
27dd65ac ML	144	i++;
	145	}
	146	if (eject_irq) {
	147	sr[i].name = "eject";
	148	sr[i].flags = IORESOURCE_IRQ;
	149	sr[i].start = sr[i].end = eject_irq;
	150	}
	151
	152	pd->resource = sr;
	153	pd->num_resources = cnt;
	154
	155	ret = platform_device_add(pd);
	156	if (!ret)
	157	return 0;
	158
	159	platform_device_put(pd);
	160	out:
	161	kfree(sr);
	162	return ret;
	163	}
206aa6cd ML	164
	165	#define YAMON_SIZE 0x00100000
	166	#define YAMON_ENV_SIZE 0x00040000
	167
	168	int __init db1x_register_norflash(unsigned long size, int width,
	169	int swapped)
	170	{
	171	struct physmap_flash_data *pfd;
	172	struct platform_device *pd;
	173	struct mtd_partition *parts;
	174	struct resource *res;
	175	int ret, i;
	176
	177	if (size < (8 * 1024 * 1024))
	178	return -EINVAL;
	179
	180	ret = -ENOMEM;
	181	parts = kzalloc(sizeof(struct mtd_partition) * 5, GFP_KERNEL);
	182	if (!parts)
	183	goto out;
	184
	185	res = kzalloc(sizeof(struct resource), GFP_KERNEL);
	186	if (!res)
	187	goto out1;
	188
	189	pfd = kzalloc(sizeof(struct physmap_flash_data), GFP_KERNEL);
	190	if (!pfd)
	191	goto out2;
	192
	193	pd = platform_device_alloc("physmap-flash", 0);
	194	if (!pd)
	195	goto out3;
	196
	197	/* NOR flash ends at 0x20000000, regardless of size */
	198	res->start = 0x20000000 - size;
	199	res->end = 0x20000000 - 1;
	200	res->flags = IORESOURCE_MEM;
	201
	202	/* partition setup. Most Develboards have a switch which allows
	203	* to swap the physical locations of the 2 NOR flash banks.
	204	*/
	205	i = 0;
	206	if (!swapped) {
	207	/* first NOR chip */
	208	parts[i].offset = 0;
	209	parts[i].name = "User FS";
	210	parts[i].size = size / 2;
	211	i++;
	212	}
	213
	214	parts[i].offset = MTDPART_OFS_APPEND;
	215	parts[i].name = "User FS 2";
	216	parts[i].size = (size / 2) - (0x20000000 - 0x1fc00000);
	217	i++;
	218
	219	parts[i].offset = MTDPART_OFS_APPEND;
	220	parts[i].name = "YAMON";
	221	parts[i].size = YAMON_SIZE;
	222	parts[i].mask_flags = MTD_WRITEABLE;
	223	i++;
	224
	225	parts[i].offset = MTDPART_OFS_APPEND;
	226	parts[i].name = "raw kernel";
	227	parts[i].size = 0x00400000 - YAMON_SIZE - YAMON_ENV_SIZE;
228	i++;
229
230	parts[i].offset = MTDPART_OFS_APPEND;
231	parts[i].name = "YAMON Env";
232	parts[i].size = YAMON_ENV_SIZE;
233	parts[i].mask_flags = MTD_WRITEABLE;
234	i++;
235
236	if (swapped) {
237	parts[i].offset = MTDPART_OFS_APPEND;
238	parts[i].name = "User FS";
239	parts[i].size = size / 2;
240	i++;
241	}
242
243	pfd->width = width;
244	pfd->parts = parts;
245	pfd->nr_parts = 5;
246
247	pd->dev.platform_data = pfd;
248	pd->resource = res;
249	pd->num_resources = 1;
250
251	ret = platform_device_add(pd);
252	if (!ret)
253	return ret;
254
255	platform_device_put(pd);
256	out3:
257	kfree(pfd);
258	out2:
259	kfree(res);
260	out1:
261	kfree(parts);
262	out:
263	return ret;
264	}