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7ca5dc14 FF |
1 | /* |
2 | * Copyright (C) 2006,2007 Felix Fietkau <nbd@openwrt.org> | |
3 | * Copyright (C) 2006,2007 Eugene Konev <ejka@openwrt.org> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
18 | */ | |
19 | ||
20 | #include <linux/init.h> | |
21 | #include <linux/types.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/delay.h> | |
24 | #include <linux/dma-mapping.h> | |
25 | #include <linux/platform_device.h> | |
26 | #include <linux/mtd/physmap.h> | |
27 | #include <linux/serial.h> | |
28 | #include <linux/serial_8250.h> | |
29 | #include <linux/ioport.h> | |
30 | #include <linux/io.h> | |
7ca5dc14 FF |
31 | #include <linux/vlynq.h> |
32 | #include <linux/leds.h> | |
33 | #include <linux/string.h> | |
34 | #include <linux/etherdevice.h> | |
1e2c8d83 FF |
35 | #include <linux/phy.h> |
36 | #include <linux/phy_fixed.h> | |
5f3c9098 | 37 | #include <linux/gpio.h> |
780019dd | 38 | #include <linux/clk.h> |
7ca5dc14 FF |
39 | |
40 | #include <asm/addrspace.h> | |
41 | #include <asm/mach-ar7/ar7.h> | |
42 | #include <asm/mach-ar7/gpio.h> | |
43 | #include <asm/mach-ar7/prom.h> | |
44 | ||
4d1da8c2 AC |
45 | /***************************************************************************** |
46 | * VLYNQ Bus | |
47 | ****************************************************************************/ | |
7ca5dc14 FF |
48 | struct plat_vlynq_data { |
49 | struct plat_vlynq_ops ops; | |
50 | int gpio_bit; | |
51 | int reset_bit; | |
52 | }; | |
53 | ||
7ca5dc14 FF |
54 | static int vlynq_on(struct vlynq_device *dev) |
55 | { | |
4d1da8c2 | 56 | int ret; |
7ca5dc14 FF |
57 | struct plat_vlynq_data *pdata = dev->dev.platform_data; |
58 | ||
4d1da8c2 AC |
59 | ret = gpio_request(pdata->gpio_bit, "vlynq"); |
60 | if (ret) | |
7ca5dc14 FF |
61 | goto out; |
62 | ||
63 | ar7_device_reset(pdata->reset_bit); | |
64 | ||
4d1da8c2 AC |
65 | ret = ar7_gpio_disable(pdata->gpio_bit); |
66 | if (ret) | |
7ca5dc14 FF |
67 | goto out_enabled; |
68 | ||
4d1da8c2 AC |
69 | ret = ar7_gpio_enable(pdata->gpio_bit); |
70 | if (ret) | |
7ca5dc14 FF |
71 | goto out_enabled; |
72 | ||
4d1da8c2 AC |
73 | ret = gpio_direction_output(pdata->gpio_bit, 0); |
74 | if (ret) | |
7ca5dc14 FF |
75 | goto out_gpio_enabled; |
76 | ||
77 | msleep(50); | |
78 | ||
79 | gpio_set_value(pdata->gpio_bit, 1); | |
4d1da8c2 | 80 | |
7ca5dc14 FF |
81 | msleep(50); |
82 | ||
83 | return 0; | |
84 | ||
85 | out_gpio_enabled: | |
86 | ar7_gpio_disable(pdata->gpio_bit); | |
87 | out_enabled: | |
88 | ar7_device_disable(pdata->reset_bit); | |
89 | gpio_free(pdata->gpio_bit); | |
90 | out: | |
4d1da8c2 | 91 | return ret; |
7ca5dc14 FF |
92 | } |
93 | ||
94 | static void vlynq_off(struct vlynq_device *dev) | |
95 | { | |
96 | struct plat_vlynq_data *pdata = dev->dev.platform_data; | |
4d1da8c2 | 97 | |
7ca5dc14 FF |
98 | ar7_gpio_disable(pdata->gpio_bit); |
99 | gpio_free(pdata->gpio_bit); | |
100 | ar7_device_disable(pdata->reset_bit); | |
101 | } | |
102 | ||
4d1da8c2 | 103 | static struct resource vlynq_low_res[] = { |
7ca5dc14 | 104 | { |
4d1da8c2 AC |
105 | .name = "regs", |
106 | .flags = IORESOURCE_MEM, | |
107 | .start = AR7_REGS_VLYNQ0, | |
108 | .end = AR7_REGS_VLYNQ0 + 0xff, | |
7ca5dc14 FF |
109 | }, |
110 | { | |
4d1da8c2 AC |
111 | .name = "irq", |
112 | .flags = IORESOURCE_IRQ, | |
113 | .start = 29, | |
114 | .end = 29, | |
7ca5dc14 | 115 | }, |
7ca5dc14 | 116 | { |
4d1da8c2 AC |
117 | .name = "mem", |
118 | .flags = IORESOURCE_MEM, | |
119 | .start = 0x04000000, | |
120 | .end = 0x04ffffff, | |
7ca5dc14 FF |
121 | }, |
122 | { | |
4d1da8c2 AC |
123 | .name = "devirq", |
124 | .flags = IORESOURCE_IRQ, | |
125 | .start = 80, | |
126 | .end = 111, | |
7ca5dc14 FF |
127 | }, |
128 | }; | |
129 | ||
4d1da8c2 | 130 | static struct resource vlynq_high_res[] = { |
7ca5dc14 | 131 | { |
4d1da8c2 AC |
132 | .name = "regs", |
133 | .flags = IORESOURCE_MEM, | |
134 | .start = AR7_REGS_VLYNQ1, | |
135 | .end = AR7_REGS_VLYNQ1 + 0xff, | |
7ca5dc14 FF |
136 | }, |
137 | { | |
4d1da8c2 AC |
138 | .name = "irq", |
139 | .flags = IORESOURCE_IRQ, | |
140 | .start = 33, | |
141 | .end = 33, | |
7ca5dc14 FF |
142 | }, |
143 | { | |
4d1da8c2 AC |
144 | .name = "mem", |
145 | .flags = IORESOURCE_MEM, | |
146 | .start = 0x0c000000, | |
147 | .end = 0x0cffffff, | |
7ca5dc14 FF |
148 | }, |
149 | { | |
4d1da8c2 AC |
150 | .name = "devirq", |
151 | .flags = IORESOURCE_IRQ, | |
152 | .start = 112, | |
153 | .end = 143, | |
7ca5dc14 FF |
154 | }, |
155 | }; | |
156 | ||
4d1da8c2 AC |
157 | static struct plat_vlynq_data vlynq_low_data = { |
158 | .ops = { | |
159 | .on = vlynq_on, | |
160 | .off = vlynq_off, | |
7ca5dc14 | 161 | }, |
4d1da8c2 AC |
162 | .reset_bit = 20, |
163 | .gpio_bit = 18, | |
164 | }; | |
165 | ||
166 | static struct plat_vlynq_data vlynq_high_data = { | |
167 | .ops = { | |
168 | .on = vlynq_on, | |
169 | .off = vlynq_off, | |
7ca5dc14 | 170 | }, |
4d1da8c2 AC |
171 | .reset_bit = 26, |
172 | .gpio_bit = 19, | |
173 | }; | |
174 | ||
175 | static struct platform_device vlynq_low = { | |
176 | .id = 0, | |
177 | .name = "vlynq", | |
178 | .dev = { | |
179 | .platform_data = &vlynq_low_data, | |
7ca5dc14 | 180 | }, |
4d1da8c2 AC |
181 | .resource = vlynq_low_res, |
182 | .num_resources = ARRAY_SIZE(vlynq_low_res), | |
183 | }; | |
184 | ||
185 | static struct platform_device vlynq_high = { | |
186 | .id = 1, | |
187 | .name = "vlynq", | |
188 | .dev = { | |
189 | .platform_data = &vlynq_high_data, | |
7ca5dc14 | 190 | }, |
4d1da8c2 AC |
191 | .resource = vlynq_high_res, |
192 | .num_resources = ARRAY_SIZE(vlynq_high_res), | |
7ca5dc14 FF |
193 | }; |
194 | ||
4d1da8c2 AC |
195 | /***************************************************************************** |
196 | * Flash | |
197 | ****************************************************************************/ | |
198 | static struct resource physmap_flash_resource = { | |
199 | .name = "mem", | |
200 | .flags = IORESOURCE_MEM, | |
201 | .start = 0x10000000, | |
202 | .end = 0x107fffff, | |
203 | }; | |
204 | ||
205 | static struct physmap_flash_data physmap_flash_data = { | |
206 | .width = 2, | |
207 | }; | |
208 | ||
209 | static struct platform_device physmap_flash = { | |
210 | .name = "physmap-flash", | |
211 | .dev = { | |
212 | .platform_data = &physmap_flash_data, | |
7ca5dc14 | 213 | }, |
4d1da8c2 AC |
214 | .resource = &physmap_flash_resource, |
215 | .num_resources = 1, | |
216 | }; | |
217 | ||
218 | /***************************************************************************** | |
219 | * Ethernet | |
220 | ****************************************************************************/ | |
221 | static struct resource cpmac_low_res[] = { | |
7ca5dc14 | 222 | { |
4d1da8c2 AC |
223 | .name = "regs", |
224 | .flags = IORESOURCE_MEM, | |
225 | .start = AR7_REGS_MAC0, | |
226 | .end = AR7_REGS_MAC0 + 0x7ff, | |
7ca5dc14 FF |
227 | }, |
228 | { | |
4d1da8c2 AC |
229 | .name = "irq", |
230 | .flags = IORESOURCE_IRQ, | |
231 | .start = 27, | |
232 | .end = 27, | |
7ca5dc14 FF |
233 | }, |
234 | }; | |
235 | ||
4d1da8c2 AC |
236 | static struct resource cpmac_high_res[] = { |
237 | { | |
238 | .name = "regs", | |
239 | .flags = IORESOURCE_MEM, | |
240 | .start = AR7_REGS_MAC1, | |
241 | .end = AR7_REGS_MAC1 + 0x7ff, | |
242 | }, | |
243 | { | |
244 | .name = "irq", | |
245 | .flags = IORESOURCE_IRQ, | |
246 | .start = 41, | |
247 | .end = 41, | |
248 | }, | |
7ca5dc14 FF |
249 | }; |
250 | ||
1e2c8d83 | 251 | static struct fixed_phy_status fixed_phy_status __initdata = { |
4d1da8c2 AC |
252 | .link = 1, |
253 | .speed = 100, | |
254 | .duplex = 1, | |
1e2c8d83 FF |
255 | }; |
256 | ||
7ca5dc14 | 257 | static struct plat_cpmac_data cpmac_low_data = { |
4d1da8c2 AC |
258 | .reset_bit = 17, |
259 | .power_bit = 20, | |
260 | .phy_mask = 0x80000000, | |
7ca5dc14 FF |
261 | }; |
262 | ||
263 | static struct plat_cpmac_data cpmac_high_data = { | |
4d1da8c2 AC |
264 | .reset_bit = 21, |
265 | .power_bit = 22, | |
266 | .phy_mask = 0x7fffffff, | |
7ca5dc14 FF |
267 | }; |
268 | ||
8e84c148 | 269 | static u64 cpmac_dma_mask = DMA_BIT_MASK(32); |
4d1da8c2 | 270 | |
7ca5dc14 | 271 | static struct platform_device cpmac_low = { |
4d1da8c2 AC |
272 | .id = 0, |
273 | .name = "cpmac", | |
7ca5dc14 | 274 | .dev = { |
4d1da8c2 AC |
275 | .dma_mask = &cpmac_dma_mask, |
276 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
277 | .platform_data = &cpmac_low_data, | |
7ca5dc14 | 278 | }, |
4d1da8c2 AC |
279 | .resource = cpmac_low_res, |
280 | .num_resources = ARRAY_SIZE(cpmac_low_res), | |
7ca5dc14 FF |
281 | }; |
282 | ||
283 | static struct platform_device cpmac_high = { | |
4d1da8c2 AC |
284 | .id = 1, |
285 | .name = "cpmac", | |
7ca5dc14 | 286 | .dev = { |
4d1da8c2 AC |
287 | .dma_mask = &cpmac_dma_mask, |
288 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
289 | .platform_data = &cpmac_high_data, | |
7ca5dc14 | 290 | }, |
4d1da8c2 AC |
291 | .resource = cpmac_high_res, |
292 | .num_resources = ARRAY_SIZE(cpmac_high_res), | |
7ca5dc14 FF |
293 | }; |
294 | ||
4d1da8c2 AC |
295 | static inline unsigned char char2hex(char h) |
296 | { | |
297 | switch (h) { | |
298 | case '0': case '1': case '2': case '3': case '4': | |
299 | case '5': case '6': case '7': case '8': case '9': | |
300 | return h - '0'; | |
301 | case 'A': case 'B': case 'C': case 'D': case 'E': case 'F': | |
302 | return h - 'A' + 10; | |
303 | case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': | |
304 | return h - 'a' + 10; | |
305 | default: | |
306 | return 0; | |
307 | } | |
308 | } | |
7ca5dc14 | 309 | |
4d1da8c2 AC |
310 | static void cpmac_get_mac(int instance, unsigned char *dev_addr) |
311 | { | |
312 | int i; | |
313 | char name[5], default_mac[ETH_ALEN], *mac; | |
314 | ||
315 | mac = NULL; | |
316 | sprintf(name, "mac%c", 'a' + instance); | |
317 | mac = prom_getenv(name); | |
318 | if (!mac) { | |
319 | sprintf(name, "mac%c", 'a'); | |
320 | mac = prom_getenv(name); | |
321 | } | |
322 | if (!mac) { | |
323 | random_ether_addr(default_mac); | |
324 | mac = default_mac; | |
325 | } | |
326 | for (i = 0; i < 6; i++) | |
327 | dev_addr[i] = (char2hex(mac[i * 3]) << 4) + | |
328 | char2hex(mac[i * 3 + 1]); | |
329 | } | |
330 | ||
331 | /***************************************************************************** | |
332 | * USB | |
333 | ****************************************************************************/ | |
334 | static struct resource usb_res[] = { | |
335 | { | |
336 | .name = "regs", | |
337 | .flags = IORESOURCE_MEM, | |
338 | .start = AR7_REGS_USB, | |
339 | .end = AR7_REGS_USB + 0xff, | |
340 | }, | |
341 | { | |
342 | .name = "irq", | |
343 | .flags = IORESOURCE_IRQ, | |
344 | .start = 32, | |
345 | .end = 32, | |
346 | }, | |
347 | { | |
348 | .name = "mem", | |
349 | .flags = IORESOURCE_MEM, | |
350 | .start = 0x03400000, | |
351 | .end = 0x034001fff, | |
352 | }, | |
7ca5dc14 FF |
353 | }; |
354 | ||
4d1da8c2 AC |
355 | static struct platform_device ar7_udc = { |
356 | .name = "ar7_udc", | |
357 | .resource = usb_res, | |
358 | .num_resources = ARRAY_SIZE(usb_res), | |
359 | }; | |
7ca5dc14 | 360 | |
4d1da8c2 AC |
361 | /***************************************************************************** |
362 | * LEDs | |
363 | ****************************************************************************/ | |
7ca5dc14 FF |
364 | static struct gpio_led default_leds[] = { |
365 | { | |
4d1da8c2 AC |
366 | .name = "status", |
367 | .gpio = 8, | |
368 | .active_low = 1, | |
7ca5dc14 FF |
369 | }, |
370 | }; | |
371 | ||
372 | static struct gpio_led dsl502t_leds[] = { | |
373 | { | |
4d1da8c2 AC |
374 | .name = "status", |
375 | .gpio = 9, | |
376 | .active_low = 1, | |
7ca5dc14 FF |
377 | }, |
378 | { | |
4d1da8c2 AC |
379 | .name = "ethernet", |
380 | .gpio = 7, | |
381 | .active_low = 1, | |
7ca5dc14 FF |
382 | }, |
383 | { | |
4d1da8c2 AC |
384 | .name = "usb", |
385 | .gpio = 12, | |
386 | .active_low = 1, | |
7ca5dc14 FF |
387 | }, |
388 | }; | |
389 | ||
390 | static struct gpio_led dg834g_leds[] = { | |
391 | { | |
4d1da8c2 AC |
392 | .name = "ppp", |
393 | .gpio = 6, | |
394 | .active_low = 1, | |
7ca5dc14 FF |
395 | }, |
396 | { | |
4d1da8c2 AC |
397 | .name = "status", |
398 | .gpio = 7, | |
399 | .active_low = 1, | |
7ca5dc14 FF |
400 | }, |
401 | { | |
4d1da8c2 AC |
402 | .name = "adsl", |
403 | .gpio = 8, | |
404 | .active_low = 1, | |
7ca5dc14 FF |
405 | }, |
406 | { | |
4d1da8c2 AC |
407 | .name = "wifi", |
408 | .gpio = 12, | |
409 | .active_low = 1, | |
7ca5dc14 FF |
410 | }, |
411 | { | |
4d1da8c2 AC |
412 | .name = "power", |
413 | .gpio = 14, | |
414 | .active_low = 1, | |
415 | .default_trigger = "default-on", | |
7ca5dc14 FF |
416 | }, |
417 | }; | |
418 | ||
419 | static struct gpio_led fb_sl_leds[] = { | |
420 | { | |
4d1da8c2 AC |
421 | .name = "1", |
422 | .gpio = 7, | |
7ca5dc14 FF |
423 | }, |
424 | { | |
4d1da8c2 AC |
425 | .name = "2", |
426 | .gpio = 13, | |
427 | .active_low = 1, | |
7ca5dc14 FF |
428 | }, |
429 | { | |
4d1da8c2 AC |
430 | .name = "3", |
431 | .gpio = 10, | |
432 | .active_low = 1, | |
7ca5dc14 FF |
433 | }, |
434 | { | |
4d1da8c2 AC |
435 | .name = "4", |
436 | .gpio = 12, | |
437 | .active_low = 1, | |
7ca5dc14 FF |
438 | }, |
439 | { | |
4d1da8c2 AC |
440 | .name = "5", |
441 | .gpio = 9, | |
442 | .active_low = 1, | |
7ca5dc14 FF |
443 | }, |
444 | }; | |
445 | ||
446 | static struct gpio_led fb_fon_leds[] = { | |
447 | { | |
4d1da8c2 AC |
448 | .name = "1", |
449 | .gpio = 8, | |
7ca5dc14 FF |
450 | }, |
451 | { | |
4d1da8c2 AC |
452 | .name = "2", |
453 | .gpio = 3, | |
454 | .active_low = 1, | |
7ca5dc14 FF |
455 | }, |
456 | { | |
4d1da8c2 AC |
457 | .name = "3", |
458 | .gpio = 5, | |
7ca5dc14 FF |
459 | }, |
460 | { | |
4d1da8c2 AC |
461 | .name = "4", |
462 | .gpio = 4, | |
463 | .active_low = 1, | |
7ca5dc14 FF |
464 | }, |
465 | { | |
4d1da8c2 AC |
466 | .name = "5", |
467 | .gpio = 11, | |
468 | .active_low = 1, | |
7ca5dc14 FF |
469 | }, |
470 | }; | |
471 | ||
472 | static struct gpio_led_platform_data ar7_led_data; | |
473 | ||
474 | static struct platform_device ar7_gpio_leds = { | |
475 | .name = "leds-gpio", | |
7ca5dc14 FF |
476 | .dev = { |
477 | .platform_data = &ar7_led_data, | |
478 | } | |
479 | }; | |
480 | ||
7ca5dc14 FF |
481 | static void __init detect_leds(void) |
482 | { | |
483 | char *prid, *usb_prod; | |
484 | ||
485 | /* Default LEDs */ | |
486 | ar7_led_data.num_leds = ARRAY_SIZE(default_leds); | |
487 | ar7_led_data.leds = default_leds; | |
488 | ||
489 | /* FIXME: the whole thing is unreliable */ | |
490 | prid = prom_getenv("ProductID"); | |
491 | usb_prod = prom_getenv("usb_prod"); | |
492 | ||
493 | /* If we can't get the product id from PROM, use the default LEDs */ | |
494 | if (!prid) | |
495 | return; | |
496 | ||
497 | if (strstr(prid, "Fritz_Box_FON")) { | |
498 | ar7_led_data.num_leds = ARRAY_SIZE(fb_fon_leds); | |
499 | ar7_led_data.leds = fb_fon_leds; | |
500 | } else if (strstr(prid, "Fritz_Box_")) { | |
501 | ar7_led_data.num_leds = ARRAY_SIZE(fb_sl_leds); | |
502 | ar7_led_data.leds = fb_sl_leds; | |
503 | } else if ((!strcmp(prid, "AR7RD") || !strcmp(prid, "AR7DB")) | |
504 | && usb_prod != NULL && strstr(usb_prod, "DSL-502T")) { | |
505 | ar7_led_data.num_leds = ARRAY_SIZE(dsl502t_leds); | |
506 | ar7_led_data.leds = dsl502t_leds; | |
507 | } else if (strstr(prid, "DG834")) { | |
508 | ar7_led_data.num_leds = ARRAY_SIZE(dg834g_leds); | |
509 | ar7_led_data.leds = dg834g_leds; | |
510 | } | |
511 | } | |
512 | ||
4d1da8c2 AC |
513 | /***************************************************************************** |
514 | * Watchdog | |
515 | ****************************************************************************/ | |
516 | static struct resource ar7_wdt_res = { | |
517 | .name = "regs", | |
518 | .flags = IORESOURCE_MEM, | |
519 | .start = -1, /* Filled at runtime */ | |
520 | .end = -1, /* Filled at runtime */ | |
521 | }; | |
522 | ||
523 | static struct platform_device ar7_wdt = { | |
524 | .name = "ar7_wdt", | |
525 | .resource = &ar7_wdt_res, | |
526 | .num_resources = 1, | |
527 | }; | |
528 | ||
529 | /***************************************************************************** | |
530 | * Init | |
531 | ****************************************************************************/ | |
7ca5dc14 FF |
532 | static int __init ar7_register_devices(void) |
533 | { | |
d47fbb59 | 534 | u16 chip_id; |
7ca5dc14 | 535 | int res; |
72838a17 | 536 | u32 *bootcr, val; |
50ca9619 | 537 | #ifdef CONFIG_SERIAL_8250 |
599a8945 | 538 | static struct uart_port uart_port[2] __initdata; |
780019dd | 539 | struct clk *bus_clk; |
7ca5dc14 FF |
540 | |
541 | memset(uart_port, 0, sizeof(struct uart_port) * 2); | |
542 | ||
780019dd FF |
543 | bus_clk = clk_get(NULL, "bus"); |
544 | if (IS_ERR(bus_clk)) | |
545 | panic("unable to get bus clk\n"); | |
546 | ||
4d1da8c2 AC |
547 | uart_port[0].type = PORT_16550A; |
548 | uart_port[0].line = 0; | |
549 | uart_port[0].irq = AR7_IRQ_UART0; | |
550 | uart_port[0].uartclk = clk_get_rate(bus_clk) / 2; | |
551 | uart_port[0].iotype = UPIO_MEM32; | |
552 | uart_port[0].mapbase = AR7_REGS_UART0; | |
553 | uart_port[0].membase = ioremap(uart_port[0].mapbase, 256); | |
554 | uart_port[0].regshift = 2; | |
7ca5dc14 FF |
555 | res = early_serial_setup(&uart_port[0]); |
556 | if (res) | |
557 | return res; | |
558 | ||
7ca5dc14 FF |
559 | /* Only TNETD73xx have a second serial port */ |
560 | if (ar7_has_second_uart()) { | |
4d1da8c2 AC |
561 | uart_port[1].type = PORT_16550A; |
562 | uart_port[1].line = 1; | |
563 | uart_port[1].irq = AR7_IRQ_UART1; | |
564 | uart_port[1].uartclk = clk_get_rate(bus_clk) / 2; | |
565 | uart_port[1].iotype = UPIO_MEM32; | |
566 | uart_port[1].mapbase = UR8_REGS_UART1; | |
567 | uart_port[1].membase = ioremap(uart_port[1].mapbase, 256); | |
568 | uart_port[1].regshift = 2; | |
7ca5dc14 FF |
569 | res = early_serial_setup(&uart_port[1]); |
570 | if (res) | |
571 | return res; | |
572 | } | |
50ca9619 | 573 | #endif /* CONFIG_SERIAL_8250 */ |
7ca5dc14 FF |
574 | res = platform_device_register(&physmap_flash); |
575 | if (res) | |
576 | return res; | |
577 | ||
578 | ar7_device_disable(vlynq_low_data.reset_bit); | |
579 | res = platform_device_register(&vlynq_low); | |
580 | if (res) | |
581 | return res; | |
582 | ||
583 | if (ar7_has_high_vlynq()) { | |
584 | ar7_device_disable(vlynq_high_data.reset_bit); | |
585 | res = platform_device_register(&vlynq_high); | |
586 | if (res) | |
587 | return res; | |
588 | } | |
589 | ||
590 | if (ar7_has_high_cpmac()) { | |
1e2c8d83 FF |
591 | res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status); |
592 | if (res && res != -ENODEV) | |
593 | return res; | |
7ca5dc14 FF |
594 | cpmac_get_mac(1, cpmac_high_data.dev_addr); |
595 | res = platform_device_register(&cpmac_high); | |
596 | if (res) | |
597 | return res; | |
598 | } else { | |
599 | cpmac_low_data.phy_mask = 0xffffffff; | |
600 | } | |
601 | ||
1e2c8d83 FF |
602 | res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status); |
603 | if (res && res != -ENODEV) | |
604 | return res; | |
605 | ||
7ca5dc14 FF |
606 | cpmac_get_mac(0, cpmac_low_data.dev_addr); |
607 | res = platform_device_register(&cpmac_low); | |
608 | if (res) | |
609 | return res; | |
610 | ||
611 | detect_leds(); | |
612 | res = platform_device_register(&ar7_gpio_leds); | |
613 | if (res) | |
614 | return res; | |
615 | ||
616 | res = platform_device_register(&ar7_udc); | |
617 | ||
d47fbb59 FF |
618 | chip_id = ar7_chip_id(); |
619 | switch (chip_id) { | |
620 | case AR7_CHIP_7100: | |
621 | case AR7_CHIP_7200: | |
622 | ar7_wdt_res.start = AR7_REGS_WDT; | |
623 | break; | |
624 | case AR7_CHIP_7300: | |
625 | ar7_wdt_res.start = UR8_REGS_WDT; | |
626 | break; | |
627 | default: | |
628 | break; | |
629 | } | |
630 | ||
631 | ar7_wdt_res.end = ar7_wdt_res.start + 0x20; | |
632 | ||
72838a17 FF |
633 | bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4); |
634 | val = *bootcr; | |
635 | iounmap(bootcr); | |
636 | ||
637 | /* Register watchdog only if enabled in hardware */ | |
638 | if (val & AR7_WDT_HW_ENA) | |
639 | res = platform_device_register(&ar7_wdt); | |
d47fbb59 | 640 | |
7ca5dc14 FF |
641 | return res; |
642 | } | |
643 | arch_initcall(ar7_register_devices); |