[mirror_ubuntu-jammy-kernel.git] / arch / mips / ar7 / setup.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Carsten Langgaard, carstenl@mips.com
 * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
 */
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/pm.h>
#include <linux/time.h>

#include <asm/reboot.h>
#include <asm/mach-ar7/ar7.h>
#include <asm/mach-ar7/prom.h>

static void ar7_machine_restart(char *command)
{
	u32 *softres_reg = ioremap(AR7_REGS_RESET + AR7_RESET_SOFTWARE, 1);

	writel(1, softres_reg);
}

static void ar7_machine_halt(void)
{
	while (1)
		;
}

static void ar7_machine_power_off(void)
{
	u32 *power_reg = (u32 *)ioremap(AR7_REGS_POWER, 1);
	u32 power_state = readl(power_reg) | (3 << 30);

	writel(power_state, power_reg);
	ar7_machine_halt();
}

const char *get_system_type(void)
{
	u16 chip_id = ar7_chip_id();
	u16 titan_variant_id = titan_chip_id();

	switch (chip_id) {
	case AR7_CHIP_7100:
		return "TI AR7 (TNETD7100)";
	case AR7_CHIP_7200:
		return "TI AR7 (TNETD7200)";
	case AR7_CHIP_7300:
		return "TI AR7 (TNETD7300)";
	case AR7_CHIP_TITAN:
		switch (titan_variant_id) {
		case TITAN_CHIP_1050:
			return "TI AR7 (TNETV1050)";
		case TITAN_CHIP_1055:
			return "TI AR7 (TNETV1055)";
		case TITAN_CHIP_1056:
			return "TI AR7 (TNETV1056)";
		case TITAN_CHIP_1060:
			return "TI AR7 (TNETV1060)";
		}
	default:
		return "TI AR7 (unknown)";
	}
}

static int __init ar7_init_console(void)
{
	return 0;
}
console_initcall(ar7_init_console);

/*
 * Initializes basic routines and structures pointers, memory size (as
 * given by the bios and saves the command line.
 */
void __init plat_mem_setup(void)
{
	unsigned long io_base;

	_machine_restart = ar7_machine_restart;
	_machine_halt = ar7_machine_halt;
	pm_power_off = ar7_machine_power_off;

	io_base = (unsigned long)ioremap(AR7_REGS_BASE, 0x10000);
	if (!io_base)
		panic("Can't remap IO base!");
	set_io_port_base(io_base);

	prom_meminit();

	printk(KERN_INFO "%s, ID: 0x%04x, Revision: 0x%02x\n",
			get_system_type(), ar7_chip_id(), ar7_chip_rev());
}
Commit	Line	Data
41173abc	1	// SPDX-License-Identifier: GPL-2.0-only
7ca5dc14 FF	2	/*
	3	* Carsten Langgaard, carstenl@mips.com
	4	* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
7ca5dc14	5	*/
7ca5dc14 FF	6	#include <linux/init.h>
	7	#include <linux/ioport.h>
	8	#include <linux/pm.h>
	9	#include <linux/time.h>
	10
	11	#include <asm/reboot.h>
	12	#include <asm/mach-ar7/ar7.h>
	13	#include <asm/mach-ar7/prom.h>
	14
	15	static void ar7_machine_restart(char *command)
	16	{
4d1da8c2 AC	17	u32 *softres_reg = ioremap(AR7_REGS_RESET + AR7_RESET_SOFTWARE, 1);
4d1da8c2 AC	18
7ca5dc14 FF	19	writel(1, softres_reg);
	20	}
	21
	22	static void ar7_machine_halt(void)
	23	{
	24	while (1)
	25	;
	26	}
	27
	28	static void ar7_machine_power_off(void)
	29	{
	30	u32 power_reg = (u32 )ioremap(AR7_REGS_POWER, 1);
	31	u32 power_state = readl(power_reg) \| (3 << 30);
4d1da8c2	32
7ca5dc14 FF	33	writel(power_state, power_reg);
	34	ar7_machine_halt();
	35	}
	36
	37	const char *get_system_type(void)
	38	{
	39	u16 chip_id = ar7_chip_id();
238dd317 FF	40	u16 titan_variant_id = titan_chip_id();
238dd317 FF	41
7ca5dc14	42	switch (chip_id) {
7ca5dc14 FF	43	case AR7_CHIP_7100:
	44	return "TI AR7 (TNETD7100)";
	45	case AR7_CHIP_7200:
	46	return "TI AR7 (TNETD7200)";
4d1da8c2 AC	47	case AR7_CHIP_7300:
4d1da8c2 AC	48	return "TI AR7 (TNETD7300)";
238dd317 FF	49	case AR7_CHIP_TITAN:
	50	switch (titan_variant_id) {
	51	case TITAN_CHIP_1050:
	52	return "TI AR7 (TNETV1050)";
	53	case TITAN_CHIP_1055:
	54	return "TI AR7 (TNETV1055)";
	55	case TITAN_CHIP_1056:
	56	return "TI AR7 (TNETV1056)";
	57	case TITAN_CHIP_1060:
	58	return "TI AR7 (TNETV1060)";
	59	}
7ca5dc14	60	default:
4d1da8c2	61	return "TI AR7 (unknown)";
7ca5dc14 FF	62	}
	63	}
	64
	65	static int __init ar7_init_console(void)
	66	{
	67	return 0;
	68	}
	69	console_initcall(ar7_init_console);
	70
	71	/*
	72	* Initializes basic routines and structures pointers, memory size (as
	73	* given by the bios and saves the command line.
	74	*/
7ca5dc14 FF	75	void __init plat_mem_setup(void)
	76	{
	77	unsigned long io_base;
	78
	79	_machine_restart = ar7_machine_restart;
	80	_machine_halt = ar7_machine_halt;
	81	pm_power_off = ar7_machine_power_off;
7ca5dc14 FF	82
	83	io_base = (unsigned long)ioremap(AR7_REGS_BASE, 0x10000);
	84	if (!io_base)
ab75dc02	85	panic("Can't remap IO base!");
7ca5dc14 FF	86	set_io_port_base(io_base);
	87
	88	prom_meminit();
	89
	90	printk(KERN_INFO "%s, ID: 0x%04x, Revision: 0x%02x\n",
4d1da8c2	91	get_system_type(), ar7_chip_id(), ar7_chip_rev());
7ca5dc14	92	}