[mirror_ubuntu-jammy-kernel.git] / arch / mips / ath79 / early_printk.c

/*
 *  Atheros AR7XXX/AR9XXX SoC early printk support
 *
 *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
 *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 *
 *  This program is free software; you can redistribute it and/or modify it
 *  under the terms of the GNU General Public License version 2 as published
 *  by the Free Software Foundation.
 */

#include <linux/io.h>
#include <linux/errno.h>
#include <linux/serial_reg.h>
#include <asm/addrspace.h>
#include <asm/setup.h>

#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ar933x_uart.h>

static void (*_prom_putchar)(char);

static inline void prom_putchar_wait(void __iomem *reg, u32 mask, u32 val)
{
	u32 t;

	do {
		t = __raw_readl(reg);
		if ((t & mask) == val)
			break;
	} while (1);
}

#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)

static void prom_putchar_ar71xx(char ch)
{
	void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE));

	prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY);
	__raw_writel((unsigned char)ch, base + UART_TX * 4);
	prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY);
}

static void prom_putchar_ar933x(char ch)
{
	void __iomem *base = (void __iomem *)(KSEG1ADDR(AR933X_UART_BASE));

	prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
			  AR933X_UART_DATA_TX_CSR);
	__raw_writel(AR933X_UART_DATA_TX_CSR | (unsigned char)ch,
		     base + AR933X_UART_DATA_REG);
	prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
			  AR933X_UART_DATA_TX_CSR);
}

static void prom_putchar_dummy(char ch)
{
	/* nothing to do */
}

static void prom_putchar_init(void)
{
	void __iomem *base;
	u32 id;

	base = (void __iomem *)(KSEG1ADDR(AR71XX_RESET_BASE));
	id = __raw_readl(base + AR71XX_RESET_REG_REV_ID);
	id &= REV_ID_MAJOR_MASK;

	switch (id) {
	case REV_ID_MAJOR_AR71XX:
	case REV_ID_MAJOR_AR7240:
	case REV_ID_MAJOR_AR7241:
	case REV_ID_MAJOR_AR7242:
	case REV_ID_MAJOR_AR913X:
	case REV_ID_MAJOR_AR9341:
	case REV_ID_MAJOR_AR9342:
	case REV_ID_MAJOR_AR9344:
	case REV_ID_MAJOR_QCA9533:
	case REV_ID_MAJOR_QCA9533_V2:
	case REV_ID_MAJOR_QCA9556:
	case REV_ID_MAJOR_QCA9558:
	case REV_ID_MAJOR_TP9343:
	case REV_ID_MAJOR_QCA956X:
		_prom_putchar = prom_putchar_ar71xx;
		break;

	case REV_ID_MAJOR_AR9330:
	case REV_ID_MAJOR_AR9331:
		_prom_putchar = prom_putchar_ar933x;
		break;

	default:
		_prom_putchar = prom_putchar_dummy;
		break;
	}
}

void prom_putchar(char ch)
{
	if (!_prom_putchar)
		prom_putchar_init();

	_prom_putchar(ch);
}
Commit	Line	Data
d4a67d9d	1	/*
0bd3acdf	2	* Atheros AR7XXX/AR9XXX SoC early printk support
d4a67d9d	3	*
0bd3acdf	4	* Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
d4a67d9d GJ	5	* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
	6	*
	7	* This program is free software; you can redistribute it and/or modify it
	8	* under the terms of the GNU General Public License version 2 as published
	9	* by the Free Software Foundation.
	10	*/
	11
	12	#include <linux/io.h>
0bd3acdf	13	#include <linux/errno.h>
d4a67d9d GJ	14	#include <linux/serial_reg.h>
d4a67d9d GJ	15	#include <asm/addrspace.h>
5c93316c	16	#include <asm/setup.h>
d4a67d9d	17
0bd3acdf	18	#include <asm/mach-ath79/ath79.h>
d4a67d9d	19	#include <asm/mach-ath79/ar71xx_regs.h>
0bd3acdf	20	#include <asm/mach-ath79/ar933x_uart.h>
d4a67d9d	21
5c93316c	22	static void (*_prom_putchar)(char);
0bd3acdf GJ	23
0bd3acdf GJ	24	static inline void prom_putchar_wait(void __iomem *reg, u32 mask, u32 val)
d4a67d9d	25	{
0bd3acdf	26	u32 t;
d4a67d9d GJ	27
d4a67d9d GJ	28	do {
0bd3acdf GJ	29	t = __raw_readl(reg);
0bd3acdf GJ	30	if ((t & mask) == val)
d4a67d9d GJ	31	break;
	32	} while (1);
	33	}
	34
f5b556c9 MS	35	#define BOTH_EMPTY (UART_LSR_TEMT \| UART_LSR_THRE)
f5b556c9 MS	36
5c93316c	37	static void prom_putchar_ar71xx(char ch)
d4a67d9d GJ	38	{
	39	void __iomem base = (void __iomem )(KSEG1ADDR(AR71XX_UART_BASE));
	40
f5b556c9	41	prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY);
5c93316c	42	__raw_writel((unsigned char)ch, base + UART_TX * 4);
f5b556c9	43	prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY);
0bd3acdf GJ	44	}
0bd3acdf GJ	45
5c93316c	46	static void prom_putchar_ar933x(char ch)
0bd3acdf GJ	47	{
	48	void __iomem base = (void __iomem )(KSEG1ADDR(AR933X_UART_BASE));
	49
	50	prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
	51	AR933X_UART_DATA_TX_CSR);
5c93316c AS	52	__raw_writel(AR933X_UART_DATA_TX_CSR \| (unsigned char)ch,
5c93316c AS	53	base + AR933X_UART_DATA_REG);
0bd3acdf GJ	54	prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
	55	AR933X_UART_DATA_TX_CSR);
	56	}
	57
5c93316c	58	static void prom_putchar_dummy(char ch)
0bd3acdf GJ	59	{
	60	/* nothing to do */
	61	}
	62
	63	static void prom_putchar_init(void)
	64	{
	65	void __iomem *base;
	66	u32 id;
	67
	68	base = (void __iomem *)(KSEG1ADDR(AR71XX_RESET_BASE));
	69	id = __raw_readl(base + AR71XX_RESET_REG_REV_ID);
	70	id &= REV_ID_MAJOR_MASK;
	71
	72	switch (id) {
	73	case REV_ID_MAJOR_AR71XX:
	74	case REV_ID_MAJOR_AR7240:
	75	case REV_ID_MAJOR_AR7241:
	76	case REV_ID_MAJOR_AR7242:
	77	case REV_ID_MAJOR_AR913X:
703327dd GJ	78	case REV_ID_MAJOR_AR9341:
	79	case REV_ID_MAJOR_AR9342:
	80	case REV_ID_MAJOR_AR9344:
af2d1b52 MS	81	case REV_ID_MAJOR_QCA9533:
af2d1b52 MS	82	case REV_ID_MAJOR_QCA9533_V2:
90898779 GJ	83	case REV_ID_MAJOR_QCA9556:
90898779 GJ	84	case REV_ID_MAJOR_QCA9558:
af2d1b52 MS	85	case REV_ID_MAJOR_TP9343:
af2d1b52 MS	86	case REV_ID_MAJOR_QCA956X:
0bd3acdf GJ	87	_prom_putchar = prom_putchar_ar71xx;
	88	break;
	89
	90	case REV_ID_MAJOR_AR9330:
	91	case REV_ID_MAJOR_AR9331:
	92	_prom_putchar = prom_putchar_ar933x;
	93	break;
	94
	95	default:
	96	_prom_putchar = prom_putchar_dummy;
	97	break;
	98	}
	99	}
	100
5c93316c	101	void prom_putchar(char ch)
0bd3acdf GJ	102	{
	103	if (!_prom_putchar)
	104	prom_putchar_init();
	105
	106	_prom_putchar(ch);
d4a67d9d	107	}