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Remove obsolete #include <linux/config.h>
[mirror_ubuntu-jammy-kernel.git] / arch / mips / au1000 / common / setup.c
CommitLineData
1da177e4
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1/*
2 * Copyright 2000 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc.
4 * ppopov@mvista.com or source@mvista.com
5 *
6 * Updates to 2.6, Pete Popov, Embedded Alley Solutions, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
1da177e4
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28#include <linux/init.h>
29#include <linux/sched.h>
30#include <linux/ioport.h>
31#include <linux/mm.h>
32#include <linux/delay.h>
33#include <linux/interrupt.h>
efe29c0f 34#include <linux/module.h>
fcdb27ad 35#include <linux/pm.h>
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36
37#include <asm/cpu.h>
38#include <asm/bootinfo.h>
39#include <asm/irq.h>
40#include <asm/mipsregs.h>
41#include <asm/reboot.h>
42#include <asm/pgtable.h>
43#include <asm/mach-au1x00/au1000.h>
44#include <asm/time.h>
45
46extern char * __init prom_getcmdline(void);
47extern void __init board_setup(void);
48extern void au1000_restart(char *);
49extern void au1000_halt(void);
50extern void au1000_power_off(void);
1da177e4 51extern void au1x_time_init(void);
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52extern void au1x_timer_setup(struct irqaction *irq);
53extern void au1xxx_time_init(void);
54extern void au1xxx_timer_setup(struct irqaction *irq);
55extern void set_cpuspec(void);
56
2925aba4 57void __init plat_mem_setup(void)
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58{
59 struct cpu_spec *sp;
60 char *argptr;
61 unsigned long prid, cpupll, bclk = 1;
62
63 set_cpuspec();
64 sp = cur_cpu_spec[0];
65
66 board_setup(); /* board specific setup */
67
68 prid = read_c0_prid();
69 cpupll = (au_readl(0xB1900060) & 0x3F) * 12;
70 printk("(PRId %08lx) @ %ldMHZ\n", prid, cpupll);
71
72 bclk = sp->cpu_bclk;
73 if (bclk)
74 {
75 /* Enable BCLK switching */
76 bclk = au_readl(0xB190003C);
77 au_writel(bclk | 0x60, 0xB190003C);
78 printk("BCLK switching enabled!\n");
79 }
80
81 if (sp->cpu_od) {
82 /* Various early Au1000 Errata corrected by this */
83 set_c0_config(1<<19); /* Set Config[OD] */
84 }
85 else {
86 /* Clear to obtain best system bus performance */
87 clear_c0_config(1<<19); /* Clear Config[OD] */
a3dddd56 88 }
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89
90 argptr = prom_getcmdline();
91
335bd9df 92#ifdef CONFIG_SERIAL_8250_CONSOLE
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93 if ((argptr = strstr(argptr, "console=")) == NULL) {
94 argptr = prom_getcmdline();
95 strcat(argptr, " console=ttyS0,115200");
96 }
42a3b4f2 97#endif
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98
99#ifdef CONFIG_FB_AU1100
100 if ((argptr = strstr(argptr, "video=")) == NULL) {
101 argptr = prom_getcmdline();
102 /* default panel */
103 /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/
104#ifdef CONFIG_MIPS_HYDROGEN3
105 strcat(argptr, " video=au1100fb:panel:Hydrogen_3_NEC_panel_320x240,nohwcursor");
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106#endif
107 }
108#endif
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109
110#ifdef CONFIG_FB_XPERT98
111 if ((argptr = strstr(argptr, "video=")) == NULL) {
112 argptr = prom_getcmdline();
113 strcat(argptr, " video=atyfb:1024x768-8@70");
114 }
115#endif
116
117#if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
118 /* au1000 does not support vra, au1500 and au1100 do */
119 strcat(argptr, " au1000_audio=vra");
120 argptr = prom_getcmdline();
121#endif
122 _machine_restart = au1000_restart;
123 _machine_halt = au1000_halt;
fcdb27ad 124 pm_power_off = au1000_power_off;
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125 board_time_init = au1xxx_time_init;
126 board_timer_setup = au1xxx_timer_setup;
127
128 /* IO/MEM resources. */
129 set_io_port_base(0);
130 ioport_resource.start = IOPORT_RESOURCE_START;
131 ioport_resource.end = IOPORT_RESOURCE_END;
132 iomem_resource.start = IOMEM_RESOURCE_START;
133 iomem_resource.end = IOMEM_RESOURCE_END;
134
135 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S);
136 au_writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL);
137 au_sync();
138 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
139 au_writel(0, SYS_TOYTRIM);
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140}
141
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142#if defined(CONFIG_64BIT_PHYS_ADDR)
143/* This routine should be valid for all Au1x based boards */
c3455b0e 144phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
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145{
146 u32 start, end;
147
148 /* Don't fixup 36 bit addresses */
149 if ((phys_addr >> 32) != 0) return phys_addr;
150
151#ifdef CONFIG_PCI
152 start = (u32)Au1500_PCI_MEM_START;
153 end = (u32)Au1500_PCI_MEM_END;
154 /* check for pci memory window */
155 if ((phys_addr >= start) && ((phys_addr + size) < end)) {
156 return (phys_t)((phys_addr - start) + Au1500_PCI_MEM_START);
157 }
158#endif
159
160 /* All Au1x SOCs have a pcmcia controller */
161 /* We setup our 32 bit pseudo addresses to be equal to the
162 * 36 bit addr >> 4, to make it easier to check the address
163 * and fix it.
164 * The Au1x socket 0 phys attribute address is 0xF 4000 0000.
165 * The pseudo address we use is 0xF400 0000. Any address over
166 * 0xF400 0000 is a pcmcia pseudo address.
167 */
168 if ((phys_addr >= 0xF4000000) && (phys_addr < 0xFFFFFFFF)) {
169 return (phys_t)(phys_addr << 4);
170 }
171
172 /* default nop */
173 return phys_addr;
174}
efe29c0f 175EXPORT_SYMBOL(__fixup_bigphys_addr);
1da177e4 176#endif