]>
Commit | Line | Data |
---|---|---|
1c0c13eb AJ |
1 | /* |
2 | * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org> | |
1c0c13eb | 3 | * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org> |
eb032b98 | 4 | * Copyright (C) 2006 Michael Buesch <m@bues.ch> |
121915c4 | 5 | * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org> |
f384b3dd | 6 | * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de> |
1c0c13eb AJ |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | * | |
13 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | |
14 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
15 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | |
16 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
17 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
18 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | |
19 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | |
20 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
21 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
22 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License along | |
25 | * with this program; if not, write to the Free Software Foundation, Inc., | |
26 | * 675 Mass Ave, Cambridge, MA 02139, USA. | |
27 | */ | |
28 | ||
515fa75d RM |
29 | #include "bcm47xx_private.h" |
30 | ||
2ab71a02 | 31 | #include <linux/bcm47xx_sprom.h> |
cae39d13 | 32 | #include <linux/export.h> |
1c0c13eb | 33 | #include <linux/types.h> |
b04138b3 HM |
34 | #include <linux/ethtool.h> |
35 | #include <linux/phy.h> | |
36 | #include <linux/phy_fixed.h> | |
1c0c13eb | 37 | #include <linux/ssb/ssb.h> |
b06f3e19 | 38 | #include <linux/ssb/ssb_embedded.h> |
c1d1c5d4 | 39 | #include <linux/bcma/bcma_soc.h> |
25e5fb97 | 40 | #include <asm/bootinfo.h> |
76b573e4 | 41 | #include <asm/idle.h> |
7da4b6f8 | 42 | #include <asm/prom.h> |
1c0c13eb AJ |
43 | #include <asm/reboot.h> |
44 | #include <asm/time.h> | |
45 | #include <bcm47xx.h> | |
786c497a | 46 | #include <bcm47xx_board.h> |
1c0c13eb | 47 | |
08ccf572 HM |
48 | union bcm47xx_bus bcm47xx_bus; |
49 | EXPORT_SYMBOL(bcm47xx_bus); | |
50 | ||
51 | enum bcm47xx_bus_type bcm47xx_bus_type; | |
52 | EXPORT_SYMBOL(bcm47xx_bus_type); | |
1c0c13eb AJ |
53 | |
54 | static void bcm47xx_machine_restart(char *command) | |
55 | { | |
d548ca6b | 56 | pr_alert("Please stand by while rebooting the system...\n"); |
1c0c13eb AJ |
57 | local_irq_disable(); |
58 | /* Set the watchdog timer to reset immediately */ | |
08ccf572 | 59 | switch (bcm47xx_bus_type) { |
a656ffcb | 60 | #ifdef CONFIG_BCM47XX_SSB |
08ccf572 | 61 | case BCM47XX_BUS_TYPE_SSB: |
2727cab2 HM |
62 | if (bcm47xx_bus.ssb.chip_id == 0x4785) |
63 | write_c0_diag4(1 << 22); | |
64 | ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1); | |
65 | if (bcm47xx_bus.ssb.chip_id == 0x4785) { | |
66 | __asm__ __volatile__( | |
67 | ".set\tmips3\n\t" | |
68 | "sync\n\t" | |
69 | "wait\n\t" | |
70 | ".set\tmips0"); | |
71 | } | |
08ccf572 | 72 | break; |
c1d1c5d4 HM |
73 | #endif |
74 | #ifdef CONFIG_BCM47XX_BCMA | |
75 | case BCM47XX_BUS_TYPE_BCMA: | |
2727cab2 | 76 | bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1); |
c1d1c5d4 | 77 | break; |
a656ffcb | 78 | #endif |
08ccf572 | 79 | } |
1c0c13eb AJ |
80 | while (1) |
81 | cpu_relax(); | |
82 | } | |
83 | ||
84 | static void bcm47xx_machine_halt(void) | |
85 | { | |
86 | /* Disable interrupts and watchdog and spin forever */ | |
87 | local_irq_disable(); | |
08ccf572 | 88 | switch (bcm47xx_bus_type) { |
a656ffcb | 89 | #ifdef CONFIG_BCM47XX_SSB |
08ccf572 HM |
90 | case BCM47XX_BUS_TYPE_SSB: |
91 | ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); | |
92 | break; | |
c1d1c5d4 HM |
93 | #endif |
94 | #ifdef CONFIG_BCM47XX_BCMA | |
95 | case BCM47XX_BUS_TYPE_BCMA: | |
96 | bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 0); | |
97 | break; | |
a656ffcb | 98 | #endif |
08ccf572 | 99 | } |
1c0c13eb AJ |
100 | while (1) |
101 | cpu_relax(); | |
102 | } | |
103 | ||
a656ffcb | 104 | #ifdef CONFIG_BCM47XX_SSB |
08ccf572 | 105 | static void __init bcm47xx_register_ssb(void) |
1c0c13eb AJ |
106 | { |
107 | int err; | |
1690a7f9 HM |
108 | char buf[100]; |
109 | struct ssb_mipscore *mcore; | |
1c0c13eb | 110 | |
541c9a84 | 111 | err = ssb_bus_host_soc_register(&bcm47xx_bus.ssb, SSB_ENUM_BASE); |
1c0c13eb | 112 | if (err) |
ab75dc02 | 113 | panic("Failed to initialize SSB bus (err %d)", err); |
1c0c13eb | 114 | |
08ccf572 | 115 | mcore = &bcm47xx_bus.ssb.mipscore; |
111bd981 | 116 | if (bcm47xx_nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) { |
1690a7f9 HM |
117 | if (strstr(buf, "console=ttyS1")) { |
118 | struct ssb_serial_port port; | |
119 | ||
d548ca6b | 120 | pr_debug("Swapping serial ports!\n"); |
1690a7f9 HM |
121 | /* swap serial ports */ |
122 | memcpy(&port, &mcore->serial_ports[0], sizeof(port)); | |
123 | memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1], | |
124 | sizeof(port)); | |
125 | memcpy(&mcore->serial_ports[1], &port, sizeof(port)); | |
126 | } | |
127 | } | |
08ccf572 | 128 | } |
a656ffcb | 129 | #endif |
08ccf572 | 130 | |
c1d1c5d4 HM |
131 | #ifdef CONFIG_BCM47XX_BCMA |
132 | static void __init bcm47xx_register_bcma(void) | |
133 | { | |
134 | int err; | |
135 | ||
136 | err = bcma_host_soc_register(&bcm47xx_bus.bcma); | |
a395135d RM |
137 | if (err) |
138 | panic("Failed to register BCMA bus (err %d)", err); | |
c1d1c5d4 HM |
139 | } |
140 | #endif | |
141 | ||
e5810fa0 RM |
142 | /* |
143 | * Memory setup is done in the early part of MIPS's arch_mem_init. It's supposed | |
144 | * to detect memory and record it with add_memory_region. | |
145 | * Any extra initializaion performed here must not use kmalloc or bootmem. | |
146 | */ | |
08ccf572 HM |
147 | void __init plat_mem_setup(void) |
148 | { | |
149 | struct cpuinfo_mips *c = ¤t_cpu_data; | |
150 | ||
442e14a2 | 151 | if ((c->cputype == CPU_74K) || (c->cputype == CPU_1074K)) { |
d548ca6b | 152 | pr_info("Using bcma bus\n"); |
c1d1c5d4 HM |
153 | #ifdef CONFIG_BCM47XX_BCMA |
154 | bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA; | |
155 | bcm47xx_register_bcma(); | |
dd573285 | 156 | bcm47xx_set_system_type(bcm47xx_bus.bcma.bus.chipinfo.id); |
6ee1d934 RM |
157 | #ifdef CONFIG_HIGHMEM |
158 | bcm47xx_prom_highmem_init(); | |
159 | #endif | |
c1d1c5d4 HM |
160 | #endif |
161 | } else { | |
d548ca6b | 162 | pr_info("Using ssb bus\n"); |
a656ffcb | 163 | #ifdef CONFIG_BCM47XX_SSB |
c1d1c5d4 | 164 | bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB; |
a59da8fb | 165 | bcm47xx_sprom_register_fallbacks(); |
c1d1c5d4 | 166 | bcm47xx_register_ssb(); |
dd573285 | 167 | bcm47xx_set_system_type(bcm47xx_bus.ssb.chip_id); |
a656ffcb | 168 | #endif |
c1d1c5d4 | 169 | } |
1690a7f9 | 170 | |
1c0c13eb AJ |
171 | _machine_restart = bcm47xx_machine_restart; |
172 | _machine_halt = bcm47xx_machine_halt; | |
173 | pm_power_off = bcm47xx_machine_halt; | |
e5810fa0 RM |
174 | } |
175 | ||
176 | /* | |
177 | * This finishes bus initialization doing things that were not possible without | |
178 | * kmalloc. Make sure to call it late enough (after mm_init). | |
179 | */ | |
180 | void __init bcm47xx_bus_setup(void) | |
181 | { | |
182 | #ifdef CONFIG_BCM47XX_BCMA | |
183 | if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) { | |
184 | int err; | |
185 | ||
186 | err = bcma_host_soc_init(&bcm47xx_bus.bcma); | |
187 | if (err) | |
188 | panic("Failed to initialize BCMA bus (err %d)", err); | |
e5810fa0 RM |
189 | } |
190 | #endif | |
191 | ||
192 | /* With bus initialized we can access NVRAM and detect the board */ | |
786c497a | 193 | bcm47xx_board_detect(); |
7da4b6f8 | 194 | mips_set_machine_name(bcm47xx_board_get_name()); |
1c0c13eb | 195 | } |
c1d1c5d4 | 196 | |
3c06b12b HM |
197 | static int __init bcm47xx_cpu_fixes(void) |
198 | { | |
199 | switch (bcm47xx_bus_type) { | |
200 | #ifdef CONFIG_BCM47XX_SSB | |
201 | case BCM47XX_BUS_TYPE_SSB: | |
202 | /* Nothing to do */ | |
203 | break; | |
204 | #endif | |
205 | #ifdef CONFIG_BCM47XX_BCMA | |
206 | case BCM47XX_BUS_TYPE_BCMA: | |
207 | /* The BCM4706 has a problem with the CPU wait instruction. | |
208 | * When r4k_wait or r4k_wait_irqoff is used will just hang and | |
209 | * not return from a msleep(). Removing the cpu_wait | |
210 | * functionality is a workaround for this problem. The BCM4716 | |
211 | * does not have this problem. | |
212 | */ | |
213 | if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706) | |
214 | cpu_wait = NULL; | |
215 | break; | |
216 | #endif | |
217 | } | |
218 | return 0; | |
219 | } | |
220 | arch_initcall(bcm47xx_cpu_fixes); | |
221 | ||
b04138b3 HM |
222 | static struct fixed_phy_status bcm47xx_fixed_phy_status __initdata = { |
223 | .link = 1, | |
224 | .speed = SPEED_100, | |
225 | .duplex = DUPLEX_FULL, | |
226 | }; | |
227 | ||
c1d1c5d4 HM |
228 | static int __init bcm47xx_register_bus_complete(void) |
229 | { | |
230 | switch (bcm47xx_bus_type) { | |
231 | #ifdef CONFIG_BCM47XX_SSB | |
232 | case BCM47XX_BUS_TYPE_SSB: | |
233 | /* Nothing to do */ | |
234 | break; | |
235 | #endif | |
236 | #ifdef CONFIG_BCM47XX_BCMA | |
237 | case BCM47XX_BUS_TYPE_BCMA: | |
238 | bcma_bus_register(&bcm47xx_bus.bcma.bus); | |
239 | break; | |
240 | #endif | |
241 | } | |
ef1e3e7a | 242 | bcm47xx_buttons_register(); |
515fa75d | 243 | bcm47xx_leds_register(); |
a2bec078 | 244 | bcm47xx_workarounds(); |
515fa75d | 245 | |
a5597008 | 246 | fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status, -1); |
c1d1c5d4 HM |
247 | return 0; |
248 | } | |
249 | device_initcall(bcm47xx_register_bus_complete); |