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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
cd586ebc KC |
2 | / { |
3 | #address-cells = <1>; | |
4 | #size-cells = <1>; | |
5 | compatible = "brcm,bcm3384", "brcm,bcm33843"; | |
6 | ||
7 | memory@0 { | |
8 | device_type = "memory"; | |
9 | ||
10 | /* Typical range. The bootloader should fill this in. */ | |
11 | reg = <0x0 0x08000000>; | |
12 | }; | |
13 | ||
14 | cpus { | |
15 | #address-cells = <1>; | |
16 | #size-cells = <0>; | |
17 | ||
18 | /* On BMIPS5000 this is 1/8th of the CPU core clock */ | |
19 | mips-hpt-frequency = <100000000>; | |
20 | ||
21 | cpu@0 { | |
22 | compatible = "brcm,bmips5000"; | |
23 | device_type = "cpu"; | |
24 | reg = <0>; | |
25 | }; | |
26 | ||
27 | cpu@1 { | |
28 | compatible = "brcm,bmips5000"; | |
29 | device_type = "cpu"; | |
30 | reg = <1>; | |
31 | }; | |
32 | }; | |
33 | ||
34 | cpu_intc: cpu_intc { | |
35 | #address-cells = <0>; | |
36 | compatible = "mti,cpu-interrupt-controller"; | |
37 | ||
38 | interrupt-controller; | |
39 | #interrupt-cells = <1>; | |
40 | }; | |
41 | ||
42 | clocks { | |
43 | periph_clk: periph_clk { | |
44 | compatible = "fixed-clock"; | |
45 | #clock-cells = <0>; | |
46 | clock-frequency = <54000000>; | |
47 | }; | |
48 | }; | |
49 | ||
50 | aliases { | |
51 | uart0 = &uart0; | |
52 | }; | |
53 | ||
54 | ubus { | |
55 | #address-cells = <1>; | |
56 | #size-cells = <1>; | |
57 | ||
58 | compatible = "brcm,ubus", "simple-bus"; | |
59 | ranges; | |
60 | dma-ranges = <0x00000000 0x08000000 0x08000000>, | |
61 | <0x08000000 0x00000000 0x08000000>; | |
62 | ||
63 | periph_intc: periph_intc@14e00038 { | |
64 | compatible = "brcm,bcm3380-l2-intc"; | |
65 | reg = <0x14e00038 0x4 0x14e0003c 0x4>, | |
66 | <0x14e00340 0x4 0x14e00344 0x4>; | |
67 | ||
68 | interrupt-controller; | |
69 | #interrupt-cells = <1>; | |
70 | ||
71 | interrupt-parent = <&cpu_intc>; | |
72 | interrupts = <4>; | |
73 | }; | |
74 | ||
75 | zmips_intc: zmips_intc@104b0060 { | |
76 | compatible = "brcm,bcm3380-l2-intc"; | |
77 | reg = <0x104b0060 0x4 0x104b0064 0x4>; | |
78 | ||
79 | interrupt-controller; | |
80 | #interrupt-cells = <1>; | |
81 | ||
82 | interrupt-parent = <&periph_intc>; | |
83 | interrupts = <29>; | |
84 | brcm,int-map-mask = <0xffffffff>; | |
85 | }; | |
86 | ||
87 | iop_intc: iop_intc@14e00058 { | |
88 | compatible = "brcm,bcm3380-l2-intc"; | |
89 | reg = <0x14e00058 0x4 0x14e0005c 0x4>; | |
90 | ||
91 | interrupt-controller; | |
92 | #interrupt-cells = <1>; | |
93 | ||
94 | interrupt-parent = <&cpu_intc>; | |
95 | interrupts = <6>; | |
96 | brcm,int-map-mask = <0xffffffff>; | |
97 | }; | |
98 | ||
99 | uart0: serial@14e00520 { | |
100 | compatible = "brcm,bcm6345-uart"; | |
101 | reg = <0x14e00520 0x18>; | |
102 | interrupt-parent = <&periph_intc>; | |
103 | interrupts = <2>; | |
104 | clocks = <&periph_clk>; | |
105 | status = "disabled"; | |
106 | }; | |
107 | ||
108 | ehci0: usb@15400300 { | |
109 | compatible = "brcm,bcm3384-ehci", "generic-ehci"; | |
110 | reg = <0x15400300 0x100>; | |
111 | big-endian; | |
112 | interrupt-parent = <&periph_intc>; | |
113 | interrupts = <41>; | |
114 | status = "disabled"; | |
115 | }; | |
116 | ||
117 | ohci0: usb@15400400 { | |
118 | compatible = "brcm,bcm3384-ohci", "generic-ohci"; | |
119 | reg = <0x15400400 0x100>; | |
120 | big-endian; | |
121 | no-big-frame-no; | |
122 | interrupt-parent = <&periph_intc>; | |
123 | interrupts = <40>; | |
124 | status = "disabled"; | |
125 | }; | |
126 | }; | |
127 | }; |