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Commit | Line | Data |
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8945e37e KC |
1 | / { |
2 | #address-cells = <1>; | |
3 | #size-cells = <1>; | |
4 | compatible = "brcm,bcm7360"; | |
5 | ||
6 | cpus { | |
7 | #address-cells = <1>; | |
8 | #size-cells = <0>; | |
9 | ||
10 | mips-hpt-frequency = <375000000>; | |
11 | ||
12 | cpu@0 { | |
13 | compatible = "brcm,bmips3300"; | |
14 | device_type = "cpu"; | |
15 | reg = <0>; | |
16 | }; | |
17 | }; | |
18 | ||
19 | aliases { | |
20 | uart0 = &uart0; | |
8bac078c JS |
21 | uart1 = &uart1; |
22 | uart2 = &uart2; | |
8945e37e KC |
23 | }; |
24 | ||
25 | cpu_intc: cpu_intc { | |
26 | #address-cells = <0>; | |
27 | compatible = "mti,cpu-interrupt-controller"; | |
28 | ||
29 | interrupt-controller; | |
30 | #interrupt-cells = <1>; | |
31 | }; | |
32 | ||
33 | clocks { | |
34 | uart_clk: uart_clk { | |
35 | compatible = "fixed-clock"; | |
36 | #clock-cells = <0>; | |
37 | clock-frequency = <81000000>; | |
38 | }; | |
39 | }; | |
40 | ||
41 | rdb { | |
42 | #address-cells = <1>; | |
43 | #size-cells = <1>; | |
44 | ||
45 | compatible = "simple-bus"; | |
46 | ranges = <0 0x10000000 0x01000000>; | |
47 | ||
48 | periph_intc: periph_intc@411400 { | |
49 | compatible = "brcm,bcm7038-l1-intc"; | |
50 | reg = <0x411400 0x30>; | |
51 | ||
52 | interrupt-controller; | |
53 | #interrupt-cells = <1>; | |
54 | ||
55 | interrupt-parent = <&cpu_intc>; | |
56 | interrupts = <2>; | |
57 | }; | |
58 | ||
59 | sun_l2_intc: sun_l2_intc@403000 { | |
60 | compatible = "brcm,l2-intc"; | |
61 | reg = <0x403000 0x30>; | |
62 | interrupt-controller; | |
63 | #interrupt-cells = <1>; | |
64 | interrupt-parent = <&periph_intc>; | |
65 | interrupts = <48>; | |
66 | }; | |
67 | ||
68 | gisb-arb@400000 { | |
69 | compatible = "brcm,bcm7400-gisb-arb"; | |
70 | reg = <0x400000 0xdc>; | |
71 | native-endian; | |
72 | interrupt-parent = <&sun_l2_intc>; | |
73 | interrupts = <0>, <2>; | |
74 | brcm,gisb-arb-master-mask = <0x2f3>; | |
75 | brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0", | |
76 | "rdc_0", "raaga_0", | |
77 | "avd_0", "jtag_0"; | |
78 | }; | |
79 | ||
80 | upg_irq0_intc: upg_irq0_intc@406600 { | |
81 | compatible = "brcm,bcm7120-l2-intc"; | |
82 | reg = <0x406600 0x8>; | |
83 | ||
fb575b85 | 84 | brcm,int-map-mask = <0x44>, <0x7000000>; |
8945e37e KC |
85 | brcm,int-fwd-mask = <0x70000>; |
86 | ||
87 | interrupt-controller; | |
88 | #interrupt-cells = <1>; | |
89 | ||
90 | interrupt-parent = <&periph_intc>; | |
fb575b85 JS |
91 | interrupts = <56>, <54>; |
92 | interrupt-names = "upg_main", "upg_bsc"; | |
93 | }; | |
94 | ||
95 | upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 { | |
96 | compatible = "brcm,bcm7120-l2-intc"; | |
97 | reg = <0x408b80 0x8>; | |
98 | ||
99 | brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>; | |
100 | brcm,int-fwd-mask = <0>; | |
101 | brcm,irq-can-wake; | |
102 | ||
103 | interrupt-controller; | |
104 | #interrupt-cells = <1>; | |
105 | ||
106 | interrupt-parent = <&periph_intc>; | |
107 | interrupts = <57>, <55>, <59>; | |
108 | interrupt-names = "upg_main_aon", "upg_bsc_aon", | |
109 | "upg_spi"; | |
8945e37e KC |
110 | }; |
111 | ||
112 | sun_top_ctrl: syscon@404000 { | |
113 | compatible = "brcm,bcm7360-sun-top-ctrl", "syscon"; | |
114 | reg = <0x404000 0x51c>; | |
320549a2 | 115 | little-endian; |
8945e37e KC |
116 | }; |
117 | ||
118 | reboot { | |
119 | compatible = "brcm,brcmstb-reboot"; | |
120 | syscon = <&sun_top_ctrl 0x304 0x308>; | |
121 | }; | |
122 | ||
123 | uart0: serial@406800 { | |
124 | compatible = "ns16550a"; | |
125 | reg = <0x406800 0x20>; | |
126 | reg-io-width = <0x4>; | |
127 | reg-shift = <0x2>; | |
128 | native-endian; | |
129 | interrupt-parent = <&periph_intc>; | |
130 | interrupts = <61>; | |
131 | clocks = <&uart_clk>; | |
132 | status = "disabled"; | |
133 | }; | |
134 | ||
8bac078c JS |
135 | uart1: serial@406840 { |
136 | compatible = "ns16550a"; | |
137 | reg = <0x406840 0x20>; | |
138 | reg-io-width = <0x4>; | |
139 | reg-shift = <0x2>; | |
140 | native-endian; | |
141 | interrupt-parent = <&periph_intc>; | |
142 | interrupts = <62>; | |
143 | clocks = <&uart_clk>; | |
144 | status = "disabled"; | |
145 | }; | |
146 | ||
147 | uart2: serial@406880 { | |
148 | compatible = "ns16550a"; | |
149 | reg = <0x406880 0x20>; | |
150 | reg-io-width = <0x4>; | |
151 | reg-shift = <0x2>; | |
152 | native-endian; | |
153 | interrupt-parent = <&periph_intc>; | |
154 | interrupts = <63>; | |
155 | clocks = <&uart_clk>; | |
156 | status = "disabled"; | |
157 | }; | |
158 | ||
fb575b85 JS |
159 | bsca: i2c@406200 { |
160 | clock-frequency = <390000>; | |
161 | compatible = "brcm,brcmstb-i2c"; | |
162 | interrupt-parent = <&upg_irq0_intc>; | |
163 | reg = <0x406200 0x58>; | |
164 | interrupts = <24>; | |
165 | interrupt-names = "upg_bsca"; | |
166 | status = "disabled"; | |
167 | }; | |
168 | ||
169 | bscb: i2c@406280 { | |
170 | clock-frequency = <390000>; | |
171 | compatible = "brcm,brcmstb-i2c"; | |
172 | interrupt-parent = <&upg_irq0_intc>; | |
173 | reg = <0x406280 0x58>; | |
174 | interrupts = <25>; | |
175 | interrupt-names = "upg_bscb"; | |
176 | status = "disabled"; | |
177 | }; | |
178 | ||
179 | bscc: i2c@406300 { | |
180 | clock-frequency = <390000>; | |
181 | compatible = "brcm,brcmstb-i2c"; | |
182 | interrupt-parent = <&upg_irq0_intc>; | |
183 | reg = <0x406300 0x58>; | |
184 | interrupts = <26>; | |
185 | interrupt-names = "upg_bscc"; | |
186 | status = "disabled"; | |
187 | }; | |
188 | ||
189 | bscd: i2c@408980 { | |
190 | clock-frequency = <390000>; | |
191 | compatible = "brcm,brcmstb-i2c"; | |
192 | interrupt-parent = <&upg_aon_irq0_intc>; | |
193 | reg = <0x408980 0x58>; | |
194 | interrupts = <27>; | |
195 | interrupt-names = "upg_bscd"; | |
196 | status = "disabled"; | |
197 | }; | |
198 | ||
8945e37e KC |
199 | enet0: ethernet@430000 { |
200 | phy-mode = "internal"; | |
201 | phy-handle = <&phy1>; | |
202 | mac-address = [ 00 10 18 36 23 1a ]; | |
203 | compatible = "brcm,genet-v2"; | |
204 | #address-cells = <0x1>; | |
205 | #size-cells = <0x1>; | |
206 | reg = <0x430000 0x4c8c>; | |
207 | interrupts = <24>, <25>; | |
208 | interrupt-parent = <&periph_intc>; | |
209 | status = "disabled"; | |
210 | ||
211 | mdio@e14 { | |
212 | compatible = "brcm,genet-mdio-v2"; | |
213 | #address-cells = <0x1>; | |
214 | #size-cells = <0x0>; | |
215 | reg = <0xe14 0x8>; | |
216 | ||
217 | phy1: ethernet-phy@1 { | |
218 | max-speed = <100>; | |
219 | reg = <0x1>; | |
220 | compatible = "brcm,40nm-ephy", | |
221 | "ethernet-phy-ieee802.3-c22"; | |
222 | }; | |
223 | }; | |
224 | }; | |
225 | ||
226 | ehci0: usb@480300 { | |
227 | compatible = "brcm,bcm7360-ehci", "generic-ehci"; | |
228 | reg = <0x480300 0x100>; | |
229 | native-endian; | |
230 | interrupt-parent = <&periph_intc>; | |
231 | interrupts = <65>; | |
232 | status = "disabled"; | |
233 | }; | |
234 | ||
235 | ohci0: usb@480400 { | |
236 | compatible = "brcm,bcm7360-ohci", "generic-ohci"; | |
237 | reg = <0x480400 0x100>; | |
238 | native-endian; | |
239 | no-big-frame-no; | |
240 | interrupt-parent = <&periph_intc>; | |
241 | interrupts = <66>; | |
242 | status = "disabled"; | |
243 | }; | |
244 | }; | |
245 | }; |