[mirror_ubuntu-artful-kernel.git] / arch / mips / boot / dts / brcm / bcm7435.dtsi

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "brcm,bcm7435";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		mips-hpt-frequency = <175625000>;

		cpu@0 {
			compatible = "brcm,bmips5200";
			device_type = "cpu";
			reg = <0>;
		};

		cpu@1 {
			compatible = "brcm,bmips5200";
			device_type = "cpu";
			reg = <1>;
		};

		cpu@2 {
			compatible = "brcm,bmips5200";
			device_type = "cpu";
			reg = <2>;
		};

		cpu@3 {
			compatible = "brcm,bmips5200";
			device_type = "cpu";
			reg = <3>;
		};
	};

	aliases {
		uart0 = &uart0;
	};

	cpu_intc: interrupt-controller {
		#address-cells = <0>;
		compatible = "mti,cpu-interrupt-controller";

		interrupt-controller;
		#interrupt-cells = <1>;
	};

	clocks {
		uart_clk: uart_clk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <81000000>;
		};

		upg_clk: upg_clk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <27000000>;
		};
	};

	rdb {
		#address-cells = <1>;
		#size-cells = <1>;

		compatible = "simple-bus";
		ranges = <0 0x10000000 0x01000000>;

		periph_intc: interrupt-controller@41b500 {
			compatible = "brcm,bcm7038-l1-intc";
			reg = <0x41b500 0x40>, <0x41b600 0x40>,
				<0x41b700 0x40>, <0x41b800 0x40>;

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&cpu_intc>;
			interrupts = <2>, <3>, <2>, <3>;
		};

		sun_l2_intc: interrupt-controller@403000 {
			compatible = "brcm,l2-intc";
			reg = <0x403000 0x30>;
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&periph_intc>;
			interrupts = <52>;
		};

		gisb-arb@400000 {
			compatible = "brcm,bcm7435-gisb-arb";
			reg = <0x400000 0xdc>;
			native-endian;
			interrupt-parent = <&sun_l2_intc>;
			interrupts = <0>, <2>;
			brcm,gisb-arb-master-mask = <0xf77f>;
			brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "webcpu_0",
						     "pcie_0", "bsp_0",
						     "rdc_0", "raaga_0",
						     "avd_1", "jtag_0",
						     "svd_0", "vice_0",
						     "vice_1", "raaga_1",
						     "scpu";
		};

		upg_irq0_intc: interrupt-controller@406780 {
			compatible = "brcm,bcm7120-l2-intc";
			reg = <0x406780 0x8>;

			brcm,int-map-mask = <0x44>, <0x7000000>;
			brcm,int-fwd-mask = <0x70000>;

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&periph_intc>;
			interrupts = <60>, <58>;
			interrupt-names = "upg_main", "upg_bsc";
		};

		upg_aon_irq0_intc: interrupt-controller@409480 {
			compatible = "brcm,bcm7120-l2-intc";
			reg = <0x409480 0x8>;

			brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
			brcm,int-fwd-mask = <0>;
			brcm,irq-can-wake;

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&periph_intc>;
			interrupts = <61>, <59>, <64>;
			interrupt-names = "upg_main_aon", "upg_bsc_aon",
					  "upg_spi";
		};

		sun_top_ctrl: syscon@404000 {
			compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
			reg = <0x404000 0x51c>;
			native-endian;
		};

		reboot {
			compatible = "brcm,brcmstb-reboot";
			syscon = <&sun_top_ctrl 0x304 0x308>;
		};

		uart0: serial@406b00 {
			compatible = "ns16550a";
			reg = <0x406b00 0x20>;
			reg-io-width = <0x4>;
			reg-shift = <0x2>;
			interrupt-parent = <&periph_intc>;
			interrupts = <66>;
			clocks = <&uart_clk>;
			status = "disabled";
		};

		uart1: serial@406b40 {
			compatible = "ns16550a";
			reg = <0x406b40 0x20>;
			reg-io-width = <0x4>;
			reg-shift = <0x2>;
			interrupt-parent = <&periph_intc>;
			interrupts = <67>;
			clocks = <&uart_clk>;
			status = "disabled";
		};

		uart2: serial@406b80 {
			compatible = "ns16550a";
			reg = <0x406b80 0x20>;
			reg-io-width = <0x4>;
			reg-shift = <0x2>;
			interrupt-parent = <&periph_intc>;
			interrupts = <68>;
			clocks = <&uart_clk>;
			status = "disabled";
		};

		bsca: i2c@406300 {
		      clock-frequency = <390000>;
		      compatible = "brcm,brcmstb-i2c";
		      interrupt-parent = <&upg_irq0_intc>;
		      reg = <0x406300 0x58>;
		      interrupts = <26>;
		      interrupt-names = "upg_bsca";
		      status = "disabled";
		};

		bscb: i2c@409400 {
		      clock-frequency = <390000>;
		      compatible = "brcm,brcmstb-i2c";
		      interrupt-parent = <&upg_aon_irq0_intc>;
		      reg = <0x409400 0x58>;
		      interrupts = <28>;
		      interrupt-names = "upg_bscb";
		      status = "disabled";
		};

		bscc: i2c@406200 {
		      clock-frequency = <390000>;
		      compatible = "brcm,brcmstb-i2c";
		      interrupt-parent = <&upg_irq0_intc>;
		      reg = <0x406200 0x58>;
		      interrupts = <24>;
		      interrupt-names = "upg_bscc";
		      status = "disabled";
		};

		bscd: i2c@406280 {
		      clock-frequency = <390000>;
		      compatible = "brcm,brcmstb-i2c";
		      interrupt-parent = <&upg_irq0_intc>;
		      reg = <0x406280 0x58>;
		      interrupts = <25>;
		      interrupt-names = "upg_bscd";
		      status = "disabled";
		};

		bsce: i2c@409180 {
		      clock-frequency = <390000>;
		      compatible = "brcm,brcmstb-i2c";
		      interrupt-parent = <&upg_aon_irq0_intc>;
		      reg = <0x409180 0x58>;
		      interrupts = <27>;
		      interrupt-names = "upg_bsce";
		      status = "disabled";
		};

		pwma: pwm@406580 {
			compatible = "brcm,bcm7038-pwm";
			reg = <0x406580 0x28>;
			#pwm-cells = <2>;
			clocks = <&upg_clk>;
			status = "disabled";
		};

		pwmb: pwm@406800 {
			compatible = "brcm,bcm7038-pwm";
			reg = <0x406800 0x28>;
			#pwm-cells = <2>;
			clocks = <&upg_clk>;
			status = "disabled";
		};

		aon_pm_l2_intc: interrupt-controller@408440 {
			compatible = "brcm,l2-intc";
			reg = <0x408440 0x30>;
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&periph_intc>;
			interrupts = <54>;
			brcm,irq-can-wake;
		};

		upg_gio: gpio@406700 {
			compatible = "brcm,brcmstb-gpio";
			reg = <0x406700 0x80>;
			#gpio-cells = <2>;
			#interrupt-cells = <2>;
			gpio-controller;
			interrupt-controller;
			interrupt-parent = <&upg_irq0_intc>;
			interrupts = <6>;
			brcm,gpio-bank-widths = <32 32 32 21>;
		};

		upg_gio_aon: gpio@4094c0 {
			compatible = "brcm,brcmstb-gpio";
			reg = <0x4094c0 0x40>;
			#gpio-cells = <2>;
			#interrupt-cells = <2>;
			gpio-controller;
			interrupt-controller;
			interrupt-parent = <&upg_aon_irq0_intc>;
			interrupts = <6>;
			interrupts-extended = <&upg_aon_irq0_intc 6>,
					      <&aon_pm_l2_intc 5>;
			wakeup-source;
			brcm,gpio-bank-widths = <18 4>;
		};

		enet0: ethernet@b80000 {
			phy-mode = "internal";
			phy-handle = <&phy1>;
			mac-address = [ 00 10 18 36 23 1a ];
			compatible = "brcm,genet-v3";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			reg = <0xb80000 0x11c88>;
			interrupts = <17>, <18>;
			interrupt-parent = <&periph_intc>;
			status = "disabled";

			mdio@e14 {
				compatible = "brcm,genet-mdio-v3";
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				reg = <0xe14 0x8>;

				phy1: ethernet-phy@1 {
					max-speed = <100>;
					reg = <0x1>;
					compatible = "brcm,40nm-ephy",
						"ethernet-phy-ieee802.3-c22";
				};
			};
		};

		ehci0: usb@480300 {
			compatible = "brcm,bcm7435-ehci", "generic-ehci";
			reg = <0x480300 0x100>;
			native-endian;
			interrupt-parent = <&periph_intc>;
			interrupts = <70>;
			status = "disabled";
		};

		ohci0: usb@480400 {
			compatible = "brcm,bcm7435-ohci", "generic-ohci";
			reg = <0x480400 0x100>;
			native-endian;
			no-big-frame-no;
			interrupt-parent = <&periph_intc>;
			interrupts = <72>;
			status = "disabled";
		};

		ehci1: usb@480500 {
			compatible = "brcm,bcm7435-ehci", "generic-ehci";
			reg = <0x480500 0x100>;
			native-endian;
			interrupt-parent = <&periph_intc>;
			interrupts = <71>;
			status = "disabled";
		};

		ohci1: usb@480600 {
			compatible = "brcm,bcm7435-ohci", "generic-ohci";
			reg = <0x480600 0x100>;
			native-endian;
			no-big-frame-no;
			interrupt-parent = <&periph_intc>;
			interrupts = <73>;
			status = "disabled";
		};

		ehci2: usb@490300 {
			compatible = "brcm,bcm7435-ehci", "generic-ehci";
			reg = <0x490300 0x100>;
			native-endian;
			interrupt-parent = <&periph_intc>;
			interrupts = <75>;
			status = "disabled";
		};

		ohci2: usb@490400 {
			compatible = "brcm,bcm7435-ohci", "generic-ohci";
			reg = <0x490400 0x100>;
			native-endian;
			no-big-frame-no;
			interrupt-parent = <&periph_intc>;
			interrupts = <77>;
			status = "disabled";
		};

		ehci3: usb@490500 {
			compatible = "brcm,bcm7435-ehci", "generic-ehci";
			reg = <0x490500 0x100>;
			native-endian;
			interrupt-parent = <&periph_intc>;
			interrupts = <76>;
			status = "disabled";
		};

		ohci3: usb@490600 {
			compatible = "brcm,bcm7435-ohci", "generic-ohci";
			reg = <0x490600 0x100>;
			native-endian;
			no-big-frame-no;
			interrupt-parent = <&periph_intc>;
			interrupts = <78>;
			status = "disabled";
		};

		hif_l2_intc: interrupt-controller@41b000 {
			compatible = "brcm,l2-intc";
			reg = <0x41b000 0x30>;
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&periph_intc>;
			interrupts = <24>;
		};

		nand: nand@41c800 {
			compatible = "brcm,brcmnand-v6.2", "brcm,brcmnand";
			#address-cells = <1>;
			#size-cells = <0>;
			reg-names = "nand", "flash-dma";
			reg = <0x41c800 0x600>, <0x41d000 0x100>;
			interrupt-parent = <&hif_l2_intc>;
			interrupts = <24>, <4>;
			status = "disabled";
		};

		sata: sata@181000 {
			compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
			reg-names = "ahci", "top-ctrl";
			reg = <0x181000 0xa9c>, <0x180020 0x1c>;
			interrupt-parent = <&periph_intc>;
			interrupts = <45>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";

			sata0: sata-port@0 {
				reg = <0>;
				phys = <&sata_phy0>;
			};

			sata1: sata-port@1 {
				reg = <1>;
				phys = <&sata_phy1>;
			};
		};

		sata_phy: sata-phy@180100 {
			compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
			reg = <0x180100 0x0eff>;
			reg-names = "phy";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";

			sata_phy0: sata-phy@0 {
				reg = <0>;
				#phy-cells = <0>;
			};

			sata_phy1: sata-phy@1 {
				reg = <1>;
				#phy-cells = <0>;
			};
		};

		sdhci0: sdhci@41a000 {
			compatible = "brcm,bcm7425-sdhci";
			reg = <0x41a000 0x100>;
			interrupt-parent = <&periph_intc>;
			interrupts = <47>;
			sd-uhs-sdr50;
			mmc-hs200-1_8v;
			status = "disabled";
		};

		sdhci1: sdhci@41a200 {
			compatible = "brcm,bcm7425-sdhci";
			reg = <0x41a200 0x100>;
			interrupt-parent = <&periph_intc>;
			interrupts = <48>;
			sd-uhs-sdr50;
			mmc-hs200-1_8v;
			status = "disabled";
		};

		spi_l2_intc: interrupt-controller@41bd00 {
			compatible = "brcm,l2-intc";
			reg = <0x41bd00 0x30>;
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&periph_intc>;
			interrupts = <25>;
		};

		qspi: spi@41d200 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			compatible = "brcm,spi-bcm-qspi",
				     "brcm,spi-brcmstb-qspi";
			clocks = <&upg_clk>;
			reg = <0x41a920 0x4 0x41d400 0x188 0x41d200 0x50>;
			reg-names = "cs_reg", "hif_mspi", "bspi";
			interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
			interrupt-parent = <&spi_l2_intc>;
			interrupt-names = "spi_lr_fullness_reached",
					  "spi_lr_session_aborted",
					  "spi_lr_impatient",
					  "spi_lr_session_done",
					  "spi_lr_overread",
					  "mspi_done",
					  "mspi_halted";
			status = "disabled";
		};

		mspi: spi@409200 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "brcm,spi-bcm-qspi",
				     "brcm,spi-brcmstb-mspi";
			clocks = <&upg_clk>;
			reg = <0x409200 0x180>;
			reg-names = "mspi";
			interrupts = <0x14>;
			interrupt-parent = <&upg_aon_irq0_intc>;
			interrupt-names = "mspi_done";
			status = "disabled";
		};
	};
};
Commit	Line	Data
e4c7d009 FF	1	/ {
	2	#address-cells = <1>;
	3	#size-cells = <1>;
	4	compatible = "brcm,bcm7435";
	5
	6	cpus {
	7	#address-cells = <1>;
	8	#size-cells = <0>;
	9
80fa40ac	10	mips-hpt-frequency = <175625000>;
e4c7d009 FF	11
	12	cpu@0 {
	13	compatible = "brcm,bmips5200";
	14	device_type = "cpu";
	15	reg = <0>;
	16	};
	17
	18	cpu@1 {
	19	compatible = "brcm,bmips5200";
	20	device_type = "cpu";
	21	reg = <1>;
	22	};
	23
	24	cpu@2 {
	25	compatible = "brcm,bmips5200";
	26	device_type = "cpu";
	27	reg = <2>;
	28	};
	29
	30	cpu@3 {
	31	compatible = "brcm,bmips5200";
	32	device_type = "cpu";
	33	reg = <3>;
	34	};
	35	};
	36
	37	aliases {
	38	uart0 = &uart0;
	39	};
	40
a2c510a2	41	cpu_intc: interrupt-controller {
e4c7d009 FF	42	#address-cells = <0>;
	43	compatible = "mti,cpu-interrupt-controller";
	44
	45	interrupt-controller;
	46	#interrupt-cells = <1>;
	47	};
	48
	49	clocks {
	50	uart_clk: uart_clk {
	51	compatible = "fixed-clock";
	52	#clock-cells = <0>;
	53	clock-frequency = <81000000>;
	54	};
7bbe59dd JS	55
	56	upg_clk: upg_clk {
	57	compatible = "fixed-clock";
	58	#clock-cells = <0>;
	59	clock-frequency = <27000000>;
	60	};
e4c7d009 FF	61	};
	62
	63	rdb {
	64	#address-cells = <1>;
	65	#size-cells = <1>;
	66
	67	compatible = "simple-bus";
	68	ranges = <0 0x10000000 0x01000000>;
	69
a2c510a2	70	periph_intc: interrupt-controller@41b500 {
e4c7d009	71	compatible = "brcm,bcm7038-l1-intc";
a5b143ec FF	72	reg = <0x41b500 0x40>, <0x41b600 0x40>,
a5b143ec FF	73	<0x41b700 0x40>, <0x41b800 0x40>;
e4c7d009 FF	74
	75	interrupt-controller;
	76	#interrupt-cells = <1>;
	77
	78	interrupt-parent = <&cpu_intc>;
a5b143ec	79	interrupts = <2>, <3>, <2>, <3>;
e4c7d009 FF	80	};
e4c7d009 FF	81
a2c510a2	82	sun_l2_intc: interrupt-controller@403000 {
e4c7d009 FF	83	compatible = "brcm,l2-intc";
	84	reg = <0x403000 0x30>;
	85	interrupt-controller;
	86	#interrupt-cells = <1>;
	87	interrupt-parent = <&periph_intc>;
	88	interrupts = <52>;
	89	};
	90
	91	gisb-arb@400000 {
6870e707	92	compatible = "brcm,bcm7435-gisb-arb";
e4c7d009 FF	93	reg = <0x400000 0xdc>;
	94	native-endian;
	95	interrupt-parent = <&sun_l2_intc>;
	96	interrupts = <0>, <2>;
	97	brcm,gisb-arb-master-mask = <0xf77f>;
	98	brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "webcpu_0",
	99	"pcie_0", "bsp_0",
	100	"rdc_0", "raaga_0",
	101	"avd_1", "jtag_0",
	102	"svd_0", "vice_0",
	103	"vice_1", "raaga_1",
	104	"scpu";
	105	};
	106
a2c510a2	107	upg_irq0_intc: interrupt-controller@406780 {
e4c7d009 FF	108	compatible = "brcm,bcm7120-l2-intc";
	109	reg = <0x406780 0x8>;
	110
5c40d493	111	brcm,int-map-mask = <0x44>, <0x7000000>;
e4c7d009 FF	112	brcm,int-fwd-mask = <0x70000>;
	113
	114	interrupt-controller;
	115	#interrupt-cells = <1>;
	116
	117	interrupt-parent = <&periph_intc>;
5c40d493 JS	118	interrupts = <60>, <58>;
	119	interrupt-names = "upg_main", "upg_bsc";
	120	};
	121
a2c510a2	122	upg_aon_irq0_intc: interrupt-controller@409480 {
5c40d493 JS	123	compatible = "brcm,bcm7120-l2-intc";
	124	reg = <0x409480 0x8>;
	125
	126	brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
	127	brcm,int-fwd-mask = <0>;
	128	brcm,irq-can-wake;
	129
	130	interrupt-controller;
	131	#interrupt-cells = <1>;
	132
	133	interrupt-parent = <&periph_intc>;
	134	interrupts = <61>, <59>, <64>;
	135	interrupt-names = "upg_main_aon", "upg_bsc_aon",
	136	"upg_spi";
e4c7d009 FF	137	};
	138
	139	sun_top_ctrl: syscon@404000 {
	140	compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
	141	reg = <0x404000 0x51c>;
25d6463e	142	native-endian;
e4c7d009 FF	143	};
	144
	145	reboot {
	146	compatible = "brcm,brcmstb-reboot";
	147	syscon = <&sun_top_ctrl 0x304 0x308>;
	148	};
	149
	150	uart0: serial@406b00 {
	151	compatible = "ns16550a";
	152	reg = <0x406b00 0x20>;
	153	reg-io-width = <0x4>;
	154	reg-shift = <0x2>;
	155	interrupt-parent = <&periph_intc>;
	156	interrupts = <66>;
	157	clocks = <&uart_clk>;
	158	status = "disabled";
	159	};
	160
5c40d493 JS	161	uart1: serial@406b40 {
	162	compatible = "ns16550a";
	163	reg = <0x406b40 0x20>;
	164	reg-io-width = <0x4>;
	165	reg-shift = <0x2>;
	166	interrupt-parent = <&periph_intc>;
	167	interrupts = <67>;
	168	clocks = <&uart_clk>;
	169	status = "disabled";
	170	};
	171
	172	uart2: serial@406b80 {
	173	compatible = "ns16550a";
	174	reg = <0x406b80 0x20>;
	175	reg-io-width = <0x4>;
	176	reg-shift = <0x2>;
	177	interrupt-parent = <&periph_intc>;
	178	interrupts = <68>;
	179	clocks = <&uart_clk>;
	180	status = "disabled";
	181	};
	182
	183	bsca: i2c@406300 {
	184	clock-frequency = <390000>;
	185	compatible = "brcm,brcmstb-i2c";
	186	interrupt-parent = <&upg_irq0_intc>;
	187	reg = <0x406300 0x58>;
	188	interrupts = <26>;
	189	interrupt-names = "upg_bsca";
	190	status = "disabled";
	191	};
	192
	193	bscb: i2c@409400 {
	194	clock-frequency = <390000>;
	195	compatible = "brcm,brcmstb-i2c";
	196	interrupt-parent = <&upg_aon_irq0_intc>;
	197	reg = <0x409400 0x58>;
	198	interrupts = <28>;
	199	interrupt-names = "upg_bscb";
	200	status = "disabled";
	201	};
	202
	203	bscc: i2c@406200 {
	204	clock-frequency = <390000>;
	205	compatible = "brcm,brcmstb-i2c";
	206	interrupt-parent = <&upg_irq0_intc>;
	207	reg = <0x406200 0x58>;
	208	interrupts = <24>;
	209	interrupt-names = "upg_bscc";
	210	status = "disabled";
	211	};
	212
	213	bscd: i2c@406280 {
	214	clock-frequency = <390000>;
	215	compatible = "brcm,brcmstb-i2c";
	216	interrupt-parent = <&upg_irq0_intc>;
	217	reg = <0x406280 0x58>;
	218	interrupts = <25>;
	219	interrupt-names = "upg_bscd";
	220	status = "disabled";
	221	};
	222
	223	bsce: i2c@409180 {
	224	clock-frequency = <390000>;
225	compatible = "brcm,brcmstb-i2c";
226	interrupt-parent = <&upg_aon_irq0_intc>;
227	reg = <0x409180 0x58>;
228	interrupts = <27>;
229	interrupt-names = "upg_bsce";
230	status = "disabled";
231	};
232
7bbe59dd JS	233	pwma: pwm@406580 {
	234	compatible = "brcm,bcm7038-pwm";
	235	reg = <0x406580 0x28>;
	236	#pwm-cells = <2>;
	237	clocks = <&upg_clk>;
	238	status = "disabled";
	239	};
	240
	241	pwmb: pwm@406800 {
	242	compatible = "brcm,bcm7038-pwm";
	243	reg = <0x406800 0x28>;
	244	#pwm-cells = <2>;
	245	clocks = <&upg_clk>;
	246	status = "disabled";
	247	};
	248
c707844d JS	249	aon_pm_l2_intc: interrupt-controller@408440 {
	250	compatible = "brcm,l2-intc";
	251	reg = <0x408440 0x30>;
	252	interrupt-controller;
	253	#interrupt-cells = <1>;
	254	interrupt-parent = <&periph_intc>;
	255	interrupts = <54>;
	256	brcm,irq-can-wake;
	257	};
	258
	259	upg_gio: gpio@406700 {
	260	compatible = "brcm,brcmstb-gpio";
	261	reg = <0x406700 0x80>;
	262	#gpio-cells = <2>;
	263	#interrupt-cells = <2>;
	264	gpio-controller;
	265	interrupt-controller;
	266	interrupt-parent = <&upg_irq0_intc>;
	267	interrupts = <6>;
	268	brcm,gpio-bank-widths = <32 32 32 21>;
	269	};
	270
	271	upg_gio_aon: gpio@4094c0 {
	272	compatible = "brcm,brcmstb-gpio";
	273	reg = <0x4094c0 0x40>;
	274	#gpio-cells = <2>;
	275	#interrupt-cells = <2>;
	276	gpio-controller;
	277	interrupt-controller;
	278	interrupt-parent = <&upg_aon_irq0_intc>;
	279	interrupts = <6>;
	280	interrupts-extended = <&upg_aon_irq0_intc 6>,
	281	<&aon_pm_l2_intc 5>;
	282	wakeup-source;
	283	brcm,gpio-bank-widths = <18 4>;
	284	};
	285
e4c7d009 FF	286	enet0: ethernet@b80000 {
	287	phy-mode = "internal";
	288	phy-handle = <&phy1>;
	289	mac-address = [ 00 10 18 36 23 1a ];
	290	compatible = "brcm,genet-v3";
	291	#address-cells = <0x1>;
	292	#size-cells = <0x1>;
	293	reg = <0xb80000 0x11c88>;
	294	interrupts = <17>, <18>;
	295	interrupt-parent = <&periph_intc>;
	296	status = "disabled";
	297
	298	mdio@e14 {
	299	compatible = "brcm,genet-mdio-v3";
	300	#address-cells = <0x1>;
	301	#size-cells = <0x0>;
	302	reg = <0xe14 0x8>;
	303
	304	phy1: ethernet-phy@1 {
	305	max-speed = <100>;
	306	reg = <0x1>;
	307	compatible = "brcm,40nm-ephy",
	308	"ethernet-phy-ieee802.3-c22";
	309	};
	310	};
	311	};
	312
	313	ehci0: usb@480300 {
	314	compatible = "brcm,bcm7435-ehci", "generic-ehci";
	315	reg = <0x480300 0x100>;
	316	native-endian;
	317	interrupt-parent = <&periph_intc>;
	318	interrupts = <70>;
	319	status = "disabled";
	320	};
	321
	322	ohci0: usb@480400 {
	323	compatible = "brcm,bcm7435-ohci", "generic-ohci";
	324	reg = <0x480400 0x100>;
	325	native-endian;
	326	no-big-frame-no;
	327	interrupt-parent = <&periph_intc>;
	328	interrupts = <72>;
	329	status = "disabled";
	330	};
	331
	332	ehci1: usb@480500 {
	333	compatible = "brcm,bcm7435-ehci", "generic-ehci";
	334	reg = <0x480500 0x100>;
	335	native-endian;
	336	interrupt-parent = <&periph_intc>;
	337	interrupts = <71>;
	338	status = "disabled";
	339	};
	340
	341	ohci1: usb@480600 {
	342	compatible = "brcm,bcm7435-ohci", "generic-ohci";
	343	reg = <0x480600 0x100>;
	344	native-endian;
	345	no-big-frame-no;
	346	interrupt-parent = <&periph_intc>;
	347	interrupts = <73>;
	348	status = "disabled";
	349	};
350
351	ehci2: usb@490300 {
352	compatible = "brcm,bcm7435-ehci", "generic-ehci";
353	reg = <0x490300 0x100>;
354	native-endian;
355	interrupt-parent = <&periph_intc>;
356	interrupts = <75>;
357	status = "disabled";
358	};
359
360	ohci2: usb@490400 {
361	compatible = "brcm,bcm7435-ohci", "generic-ohci";
362	reg = <0x490400 0x100>;
363	native-endian;
364	no-big-frame-no;
365	interrupt-parent = <&periph_intc>;
366	interrupts = <77>;
367	status = "disabled";
368	};
369
370	ehci3: usb@490500 {
371	compatible = "brcm,bcm7435-ehci", "generic-ehci";
372	reg = <0x490500 0x100>;
373	native-endian;
374	interrupt-parent = <&periph_intc>;
375	interrupts = <76>;
376	status = "disabled";
377	};
378
379	ohci3: usb@490600 {
380	compatible = "brcm,bcm7435-ohci", "generic-ohci";
381	reg = <0x490600 0x100>;
382	native-endian;
383	no-big-frame-no;
384	interrupt-parent = <&periph_intc>;
385	interrupts = <78>;
386	status = "disabled";
387	};
5c40d493	388
cfc8be04 JS	389	hif_l2_intc: interrupt-controller@41b000 {
	390	compatible = "brcm,l2-intc";
	391	reg = <0x41b000 0x30>;
	392	interrupt-controller;
	393	#interrupt-cells = <1>;
	394	interrupt-parent = <&periph_intc>;
	395	interrupts = <24>;
	396	};
	397
	398	nand: nand@41c800 {
	399	compatible = "brcm,brcmnand-v6.2", "brcm,brcmnand";
	400	#address-cells = <1>;
	401	#size-cells = <0>;
	402	reg-names = "nand", "flash-dma";
	403	reg = <0x41c800 0x600>, <0x41d000 0x100>;
	404	interrupt-parent = <&hif_l2_intc>;
	405	interrupts = <24>, <4>;
	406	status = "disabled";
	407	};
	408
5c40d493 JS	409	sata: sata@181000 {
	410	compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
	411	reg-names = "ahci", "top-ctrl";
	412	reg = <0x181000 0xa9c>, <0x180020 0x1c>;
	413	interrupt-parent = <&periph_intc>;
	414	interrupts = <45>;
	415	#address-cells = <1>;
	416	#size-cells = <0>;
	417	status = "disabled";
	418
	419	sata0: sata-port@0 {
	420	reg = <0>;
	421	phys = <&sata_phy0>;
	422	};
	423
	424	sata1: sata-port@1 {
	425	reg = <1>;
	426	phys = <&sata_phy1>;
	427	};
	428	};
	429
	430	sata_phy: sata-phy@180100 {
	431	compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
	432	reg = <0x180100 0x0eff>;
	433	reg-names = "phy";
	434	#address-cells = <1>;
	435	#size-cells = <0>;
	436	status = "disabled";
	437
	438	sata_phy0: sata-phy@0 {
	439	reg = <0>;
	440	#phy-cells = <0>;
	441	};
	442
	443	sata_phy1: sata-phy@1 {
	444	reg = <1>;
	445	#phy-cells = <0>;
	446	};
	447	};
b2420e27 JS	448
	449	sdhci0: sdhci@41a000 {
	450	compatible = "brcm,bcm7425-sdhci";
	451	reg = <0x41a000 0x100>;
	452	interrupt-parent = <&periph_intc>;
	453	interrupts = <47>;
	454	sd-uhs-sdr50;
	455	mmc-hs200-1_8v;
	456	status = "disabled";
	457	};
	458
	459	sdhci1: sdhci@41a200 {
	460	compatible = "brcm,bcm7425-sdhci";
	461	reg = <0x41a200 0x100>;
	462	interrupt-parent = <&periph_intc>;
	463	interrupts = <48>;
	464	sd-uhs-sdr50;
	465	mmc-hs200-1_8v;
	466	status = "disabled";
	467	};
d783738c JS	468
	469	spi_l2_intc: interrupt-controller@41bd00 {
	470	compatible = "brcm,l2-intc";
	471	reg = <0x41bd00 0x30>;
	472	interrupt-controller;
	473	#interrupt-cells = <1>;
	474	interrupt-parent = <&periph_intc>;
	475	interrupts = <25>;
	476	};
	477
	478	qspi: spi@41d200 {
	479	#address-cells = <0x1>;
	480	#size-cells = <0x0>;
	481	compatible = "brcm,spi-bcm-qspi",
	482	"brcm,spi-brcmstb-qspi";
	483	clocks = <&upg_clk>;
	484	reg = <0x41a920 0x4 0x41d400 0x188 0x41d200 0x50>;
	485	reg-names = "cs_reg", "hif_mspi", "bspi";
	486	interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
	487	interrupt-parent = <&spi_l2_intc>;
	488	interrupt-names = "spi_lr_fullness_reached",
	489	"spi_lr_session_aborted",
	490	"spi_lr_impatient",
	491	"spi_lr_session_done",
	492	"spi_lr_overread",
	493	"mspi_done",
	494	"mspi_halted";
	495	status = "disabled";
	496	};
	497
	498	mspi: spi@409200 {
	499	#address-cells = <1>;
	500	#size-cells = <0>;
	501	compatible = "brcm,spi-bcm-qspi",
	502	"brcm,spi-brcmstb-mspi";
	503	clocks = <&upg_clk>;
	504	reg = <0x409200 0x180>;
	505	reg-names = "mspi";
	506	interrupts = <0x14>;
	507	interrupt-parent = <&upg_aon_irq0_intc>;
	508	interrupt-names = "mspi_done";
	509	status = "disabled";
	510	};
e4c7d009 FF	511	};
e4c7d009 FF	512	};