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Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
ff1930c6 PB |
2 | #include <dt-bindings/clock/jz4740-cgu.h> |
3 | ||
ffb1843d PB |
4 | / { |
5 | #address-cells = <1>; | |
6 | #size-cells = <1>; | |
7 | compatible = "ingenic,jz4740"; | |
8e8261eb | 8 | |
5214cae7 | 9 | cpuintc: interrupt-controller { |
8e8261eb PB |
10 | #address-cells = <0>; |
11 | #interrupt-cells = <1>; | |
12 | interrupt-controller; | |
13 | compatible = "mti,cpu-interrupt-controller"; | |
14 | }; | |
adbdce77 PB |
15 | |
16 | intc: interrupt-controller@10001000 { | |
17 | compatible = "ingenic,jz4740-intc"; | |
18 | reg = <0x10001000 0x14>; | |
19 | ||
20 | interrupt-controller; | |
21 | #interrupt-cells = <1>; | |
22 | ||
23 | interrupt-parent = <&cpuintc>; | |
24 | interrupts = <2>; | |
25 | }; | |
ff1930c6 PB |
26 | |
27 | ext: ext { | |
28 | compatible = "fixed-clock"; | |
29 | #clock-cells = <0>; | |
30 | }; | |
31 | ||
32 | rtc: rtc { | |
33 | compatible = "fixed-clock"; | |
34 | #clock-cells = <0>; | |
35 | clock-frequency = <32768>; | |
36 | }; | |
37 | ||
38 | cgu: jz4740-cgu@10000000 { | |
39 | compatible = "ingenic,jz4740-cgu"; | |
40 | reg = <0x10000000 0x100>; | |
41 | ||
42 | clocks = <&ext>, <&rtc>; | |
43 | clock-names = "ext", "rtc"; | |
44 | ||
45 | #clock-cells = <1>; | |
46 | }; | |
8838245d | 47 | |
262d62cb PC |
48 | rtc_dev: rtc@10003000 { |
49 | compatible = "ingenic,jz4740-rtc"; | |
50 | reg = <0x10003000 0x40>; | |
51 | ||
52 | interrupt-parent = <&intc>; | |
53 | interrupts = <15>; | |
54 | ||
55 | clocks = <&cgu JZ4740_CLK_RTC>; | |
56 | clock-names = "rtc"; | |
57 | }; | |
58 | ||
3951cbb5 PC |
59 | pinctrl: pin-controller@10010000 { |
60 | compatible = "ingenic,jz4740-pinctrl"; | |
61 | reg = <0x10010000 0x400>; | |
62 | ||
63 | #address-cells = <1>; | |
64 | #size-cells = <0>; | |
65 | ||
66 | gpa: gpio@0 { | |
67 | compatible = "ingenic,jz4740-gpio"; | |
68 | reg = <0>; | |
69 | ||
70 | gpio-controller; | |
71 | gpio-ranges = <&pinctrl 0 0 32>; | |
72 | #gpio-cells = <2>; | |
73 | ||
74 | interrupt-controller; | |
75 | #interrupt-cells = <2>; | |
76 | ||
77 | interrupt-parent = <&intc>; | |
78 | interrupts = <28>; | |
79 | }; | |
80 | ||
81 | gpb: gpio@1 { | |
82 | compatible = "ingenic,jz4740-gpio"; | |
83 | reg = <1>; | |
84 | ||
85 | gpio-controller; | |
86 | gpio-ranges = <&pinctrl 0 32 32>; | |
87 | #gpio-cells = <2>; | |
88 | ||
89 | interrupt-controller; | |
90 | #interrupt-cells = <2>; | |
91 | ||
92 | interrupt-parent = <&intc>; | |
93 | interrupts = <27>; | |
94 | }; | |
95 | ||
96 | gpc: gpio@2 { | |
97 | compatible = "ingenic,jz4740-gpio"; | |
98 | reg = <2>; | |
99 | ||
100 | gpio-controller; | |
101 | gpio-ranges = <&pinctrl 0 64 32>; | |
102 | #gpio-cells = <2>; | |
103 | ||
104 | interrupt-controller; | |
105 | #interrupt-cells = <2>; | |
106 | ||
107 | interrupt-parent = <&intc>; | |
108 | interrupts = <26>; | |
109 | }; | |
110 | ||
111 | gpd: gpio@3 { | |
112 | compatible = "ingenic,jz4740-gpio"; | |
113 | reg = <3>; | |
114 | ||
115 | gpio-controller; | |
116 | gpio-ranges = <&pinctrl 0 96 32>; | |
117 | #gpio-cells = <2>; | |
118 | ||
119 | interrupt-controller; | |
120 | #interrupt-cells = <2>; | |
121 | ||
122 | interrupt-parent = <&intc>; | |
123 | interrupts = <25>; | |
124 | }; | |
125 | }; | |
126 | ||
8838245d PB |
127 | uart0: serial@10030000 { |
128 | compatible = "ingenic,jz4740-uart"; | |
129 | reg = <0x10030000 0x100>; | |
130 | ||
131 | interrupt-parent = <&intc>; | |
132 | interrupts = <9>; | |
133 | ||
134 | clocks = <&ext>, <&cgu JZ4740_CLK_UART0>; | |
135 | clock-names = "baud", "module"; | |
136 | }; | |
137 | ||
138 | uart1: serial@10031000 { | |
139 | compatible = "ingenic,jz4740-uart"; | |
140 | reg = <0x10031000 0x100>; | |
141 | ||
142 | interrupt-parent = <&intc>; | |
143 | interrupts = <8>; | |
144 | ||
145 | clocks = <&ext>, <&cgu JZ4740_CLK_UART1>; | |
146 | clock-names = "baud", "module"; | |
147 | }; | |
9d1e7875 MH |
148 | |
149 | uhc: uhc@13030000 { | |
150 | compatible = "ingenic,jz4740-ohci", "generic-ohci"; | |
151 | reg = <0x13030000 0x1000>; | |
152 | ||
153 | clocks = <&cgu JZ4740_CLK_UHC>; | |
154 | assigned-clocks = <&cgu JZ4740_CLK_UHC>; | |
155 | assigned-clock-rates = <48000000>; | |
156 | ||
157 | interrupt-parent = <&intc>; | |
158 | interrupts = <3>; | |
159 | ||
160 | status = "disabled"; | |
161 | }; | |
ffb1843d | 162 | }; |