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MIPS: Avoid DIVU in `__div64_32' is result would be zero
[mirror_ubuntu-hirsute-kernel.git] / arch / mips / include / asm / div64.h
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1da177e4 1/*
685bc9d1 2 * Copyright (C) 2000, 2004, 2021 Maciej W. Rozycki
3927f2e8 3 * Copyright (C) 2003, 07 Ralf Baechle (ralf@linux-mips.org)
1da177e4
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4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 */
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9#ifndef __ASM_DIV64_H
10#define __ASM_DIV64_H
1da177e4 11
685bc9d1 12#include <asm/bitsperlong.h>
1da177e4 13
685bc9d1 14#if BITS_PER_LONG == 32
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15
16/*
17 * No traps on overflows for any of these...
18 */
19
685bc9d1 20#define do_div64_32(res, high, low, base) ({ \
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21 unsigned long __cf, __tmp, __tmp2, __i; \
22 unsigned long __quot32, __mod32; \
c21004cd 23 \
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24 __asm__( \
25 " .set push \n" \
26 " .set noat \n" \
27 " .set noreorder \n" \
28 " move %2, $0 \n" \
29 " move %3, $0 \n" \
30 " b 1f \n" \
31 " li %4, 0x21 \n" \
32 "0: \n" \
33 " sll $1, %0, 0x1 \n" \
34 " srl %3, %0, 0x1f \n" \
35 " or %0, $1, %5 \n" \
36 " sll %1, %1, 0x1 \n" \
37 " sll %2, %2, 0x1 \n" \
38 "1: \n" \
39 " bnez %3, 2f \n" \
40 " sltu %5, %0, %z6 \n" \
41 " bnez %5, 3f \n" \
42 "2: \n" \
43 " addiu %4, %4, -1 \n" \
44 " subu %0, %0, %z6 \n" \
45 " addiu %2, %2, 1 \n" \
46 "3: \n" \
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47 " bnez %4, 0b \n" \
48 " srl %5, %1, 0x1f \n" \
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49 " .set pop" \
50 : "=&r" (__mod32), "=&r" (__tmp), \
51 "=&r" (__quot32), "=&r" (__cf), \
52 "=&r" (__i), "=&r" (__tmp2) \
685bc9d1 53 : "Jr" (base), "0" (high), "1" (low)); \
c21004cd 54 \
685bc9d1 55 (res) = __quot32; \
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56 __mod32; \
57})
1da177e4 58
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59#define __div64_32(n, base) ({ \
60 unsigned long __upper, __low, __high, __radix; \
61 unsigned long long __modquot; \
62 unsigned long long __quot; \
63 unsigned long long __div; \
64 unsigned long __mod; \
65 \
66 __div = (*n); \
67 __radix = (base); \
68 \
69 __high = __div >> 32; \
70 __low = __div; \
685bc9d1 71 \
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72 if (__high < __radix) { \
73 __upper = __high; \
74 __high = 0; \
75 } else { \
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76 __asm__("divu $0, %z1, %z2" \
77 : "=x" (__modquot) \
78 : "Jr" (__high), "Jr" (__radix)); \
79 __upper = __modquot >> 32; \
80 __high = __modquot; \
81 } \
82 \
83 __mod = do_div64_32(__low, __upper, __low, __radix); \
84 \
85 __quot = __high; \
86 __quot = __quot << 32 | __low; \
87 (*n) = __quot; \
88 __mod; \
89})
90
91#endif /* BITS_PER_LONG == 32 */
92
93#include <asm-generic/div64.h>
1da177e4 94
c21004cd 95#endif /* __ASM_DIV64_H */