projects / mirror_ubuntu-artful-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public | |
| 3 | * License. See the file "COPYING" in the main directory of this archive | |
| 4 | * for more details. | |
| 5 | * | |
| 6 | * Copyright (C) 1994 by Waldorf GMBH, written by Ralf Baechle | |
| 7 | * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle | |
| 8 | */ | |
| 9 | #ifndef _ASM_IRQ_H | |
| 10 | #define _ASM_IRQ_H | |
| 11 | ||
| 1da177e4 | 12 | #include <linux/linkage.h> |
| 631330f5 | 13 | #include <linux/smp.h> |
| abd2363f | 14 | #include <linux/irqdomain.h> |
| 41c594ab RB |
15 | |
| 16 | #include <asm/mipsmtregs.h> | |
| 17 | ||
| 1da177e4 LT |
18 | #include <irq.h> |
| 19 | ||
| fe8bd18f | 20 | #define IRQ_STACK_SIZE THREAD_SIZE |
| 5fdc66e0 | 21 | #define IRQ_STACK_START (IRQ_STACK_SIZE - 16) |
| fe8bd18f MR |
22 | |
| 23 | extern void *irq_stack[NR_CPUS]; | |
| 24 | ||
| db8466c5 MR |
25 | /* |
| 26 | * The highest address on the IRQ stack contains a dummy frame put down in | |
| 27 | * genex.S (handle_int & except_vec_vi_handler) which is structured as follows: | |
| 28 | * | |
| 29 | * top ------------ | |
| 30 | * | task sp | <- irq_stack[cpu] + IRQ_STACK_START | |
| 31 | * ------------ | |
| 32 | * | | <- First frame of IRQ context | |
| 33 | * ------------ | |
| 34 | * | |
| 35 | * task sp holds a copy of the task stack pointer where the struct pt_regs | |
| 36 | * from exception entry can be found. | |
| 37 | */ | |
| 38 | ||
| fe8bd18f MR |
39 | static inline bool on_irq_stack(int cpu, unsigned long sp) |
| 40 | { | |
| 41 | unsigned long low = (unsigned long)irq_stack[cpu]; | |
| 42 | unsigned long high = low + IRQ_STACK_SIZE; | |
| 43 | ||
| 44 | return (low <= sp && sp <= high); | |
| 45 | } | |
| 46 | ||
| 1da177e4 LT |
47 | #ifdef CONFIG_I8259 |
| 48 | static inline int irq_canonicalize(int irq) | |
| 49 | { | |
| 2fa7937b | 50 | return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq); |
| 1da177e4 LT |
51 | } |
| 52 | #else | |
| 53 | #define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */ | |
| 54 | #endif | |
| 55 | ||
| 950e97ca SR |
56 | asmlinkage void plat_irq_dispatch(void); |
| 57 | ||
| 8f99a162 | 58 | extern void do_IRQ(unsigned int irq); |
| 1da177e4 | 59 | |
| 1da177e4 | 60 | extern void arch_init_irq(void); |
| 937a8015 | 61 | extern void spurious_interrupt(void); |
| 1da177e4 | 62 | |
| 4a4cf779 RB |
63 | extern int allocate_irqno(void); |
| 64 | extern void alloc_legacy_irqno(void); | |
| 65 | extern void free_irqno(unsigned int irq); | |
| 66 | ||
| 3b1d4ed5 RB |
67 | /* |
| 68 | * Before R2 the timer and performance counter interrupts were both fixed to | |
| 70342287 | 69 | * IE7. Since R2 their number has to be read from the c0_intctl register. |
| 3b1d4ed5 RB |
70 | */ |
| 71 | #define CP0_LEGACY_COMPARE_IRQ 7 | |
| c6a4ebb9 | 72 | #define CP0_LEGACY_PERFCNT_IRQ 7 |
| 3b1d4ed5 RB |
73 | |
| 74 | extern int cp0_compare_irq; | |
| 010c108d | 75 | extern int cp0_compare_irq_shift; |
| 3b1d4ed5 | 76 | extern int cp0_perfcount_irq; |
| 8f7ff027 JH |
77 | extern int cp0_fdc_irq; |
| 78 | ||
| 770847ba | 79 | extern int get_c0_fdc_int(void); |
| 3b1d4ed5 | 80 | |
| 9a01c3ed CM |
81 | void arch_trigger_cpumask_backtrace(const struct cpumask *mask, |
| 82 | bool exclude_self); | |
| 83 | #define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace | |
| 856839b7 | 84 | |
| 1da177e4 | 85 | #endif /* _ASM_IRQ_H */ |