]>
Commit | Line | Data |
---|---|---|
2874c5fd | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
c3455b0e MR |
2 | /* |
3 | * include/asm-mips/mach-au1x00/ioremap.h | |
c3455b0e MR |
4 | */ |
5 | #ifndef __ASM_MACH_AU1X00_IOREMAP_H | |
6 | #define __ASM_MACH_AU1X00_IOREMAP_H | |
7 | ||
c3455b0e MR |
8 | #include <linux/types.h> |
9 | ||
34adb28d | 10 | #if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_PCI) |
15d45cce | 11 | extern phys_addr_t __fixup_bigphys_addr(phys_addr_t, phys_addr_t); |
f10fae02 | 12 | #else |
15d45cce | 13 | static inline phys_addr_t __fixup_bigphys_addr(phys_addr_t phys_addr, phys_addr_t size) |
c3455b0e MR |
14 | { |
15 | return phys_addr; | |
16 | } | |
17 | #endif | |
18 | ||
19 | /* | |
20 | * Allow physical addresses to be fixed up to help 36-bit peripherals. | |
21 | */ | |
15d45cce | 22 | static inline phys_addr_t fixup_bigphys_addr(phys_addr_t phys_addr, phys_addr_t size) |
c3455b0e MR |
23 | { |
24 | return __fixup_bigphys_addr(phys_addr, size); | |
25 | } | |
26 | ||
15d45cce | 27 | static inline void __iomem *plat_ioremap(phys_addr_t offset, unsigned long size, |
5ddcb3c3 AN |
28 | unsigned long flags) |
29 | { | |
30 | return NULL; | |
31 | } | |
32 | ||
33 | static inline int plat_iounmap(const volatile void __iomem *addr) | |
34 | { | |
35 | return 0; | |
36 | } | |
37 | ||
c3455b0e | 38 | #endif /* __ASM_MACH_AU1X00_IOREMAP_H */ |