]>
Commit | Line | Data |
---|---|---|
65040e22 J |
1 | /* |
2 | * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights | |
3 | * reserved. | |
4 | * | |
5 | * This software is available to you under a choice of one of two | |
6 | * licenses. You may choose to be licensed under the terms of the GNU | |
7 | * General Public License (GPL) Version 2, available from the file | |
8 | * COPYING in the main directory of this source tree, or the NetLogic | |
9 | * license below: | |
10 | * | |
11 | * Redistribution and use in source and binary forms, with or without | |
12 | * modification, are permitted provided that the following conditions | |
13 | * are met: | |
14 | * | |
15 | * 1. Redistributions of source code must retain the above copyright | |
16 | * notice, this list of conditions and the following disclaimer. | |
17 | * 2. Redistributions in binary form must reproduce the above copyright | |
18 | * notice, this list of conditions and the following disclaimer in | |
19 | * the documentation and/or other materials provided with the | |
20 | * distribution. | |
21 | * | |
22 | * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR | |
23 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | |
24 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
25 | * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE | |
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
29 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
30 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE | |
31 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN | |
32 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
33 | */ | |
34 | ||
35 | #ifndef _NLM_HAL_XLP_H | |
36 | #define _NLM_HAL_XLP_H | |
37 | ||
9bac624b GR |
38 | #define PIC_UART_0_IRQ 17 |
39 | #define PIC_UART_1_IRQ 18 | |
40 | #define PIC_PCIE_LINK_0_IRQ 19 | |
41 | #define PIC_PCIE_LINK_1_IRQ 20 | |
42 | #define PIC_PCIE_LINK_2_IRQ 21 | |
43 | #define PIC_PCIE_LINK_3_IRQ 22 | |
9eac3591 | 44 | |
1004165f GR |
45 | #define PIC_EHCI_0_IRQ 23 |
46 | #define PIC_EHCI_1_IRQ 24 | |
47 | #define PIC_OHCI_0_IRQ 25 | |
48 | #define PIC_OHCI_1_IRQ 26 | |
49 | #define PIC_OHCI_2_IRQ 27 | |
50 | #define PIC_OHCI_3_IRQ 28 | |
9eac3591 GR |
51 | #define PIC_2XX_XHCI_0_IRQ 23 |
52 | #define PIC_2XX_XHCI_1_IRQ 24 | |
53 | #define PIC_2XX_XHCI_2_IRQ 25 | |
54 | ||
57d7cdb6 J |
55 | #define PIC_MMC_IRQ 29 |
56 | #define PIC_I2C_0_IRQ 30 | |
57 | #define PIC_I2C_1_IRQ 31 | |
e5be1fd0 GR |
58 | #define PIC_I2C_2_IRQ 32 |
59 | #define PIC_I2C_3_IRQ 33 | |
65040e22 J |
60 | |
61 | #ifndef __ASSEMBLY__ | |
62 | ||
63 | /* SMP support functions */ | |
66d29985 J |
64 | void xlp_boot_core0_siblings(void); |
65 | void xlp_wakeup_secondary_cpus(void); | |
65040e22 J |
66 | |
67 | void xlp_mmu_init(void); | |
68 | void nlm_hal_init(void); | |
a2ba6cd6 J |
69 | int xlp_get_dram_map(int n, uint64_t *dram_map); |
70 | ||
71 | /* Device tree related */ | |
aceee09d | 72 | void *xlp_dt_init(void *fdtp); |
65040e22 | 73 | |
4ca86a2f J |
74 | static inline int cpu_is_xlpii(void) |
75 | { | |
76 | int chip = read_c0_prid() & 0xff00; | |
77 | ||
78 | return chip == PRID_IMP_NETLOGIC_XLP2XX; | |
79 | } | |
80 | ||
65040e22 J |
81 | #endif /* !__ASSEMBLY__ */ |
82 | #endif /* _ASM_NLM_XLP_H */ |