[mirror_ubuntu-artful-kernel.git] / arch / mips / include / asm / octeon / octeon-model.h

/***********************license start***************
 * Author: Cavium Networks
 *
 * Contact: support@caviumnetworks.com
 * This file is part of the OCTEON SDK
 *
 * Copyright (c) 2003-2010 Cavium Networks
 *
 * This file is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, Version 2, as
 * published by the Free Software Foundation.
 *
 * This file is distributed in the hope that it will be useful, but
 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
 * NONINFRINGEMENT.  See the GNU General Public License for more
 * details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this file; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 * or visit http://www.gnu.org/licenses/.
 *
 * This file may also be available under a different license from Cavium.
 * Contact Cavium Networks for more information
 ***********************license end**************************************/
#ifndef __OCTEON_MODEL_H__
#define __OCTEON_MODEL_H__

/*
 * The defines below should be used with the OCTEON_IS_MODEL() macro
 * to determine what model of chip the software is running on.	Models
 * ending in 'XX' match multiple models (families), while specific
 * models match only that model.  If a pass (revision) is specified,
 * then only that revision will be matched.  Care should be taken when
 * checking for both specific models and families that the specific
 * models are checked for first.  While these defines are similar to
 * the processor ID, they are not intended to be used by anything
 * other that the OCTEON_IS_MODEL framework, and the values are
 * subject to change at anytime without notice.
 *
 * NOTE: only the OCTEON_IS_MODEL() macro/function and the OCTEON_CN*
 * macros should be used outside of this file.	All other macros are
 * for internal use only, and may change without notice.
 */

#define OCTEON_FAMILY_MASK	0x00ffff00
#define OCTEON_PRID_MASK	0x00ffffff

/* Flag bits in top byte */
/* Ignores revision in model checks */
#define OM_IGNORE_REVISION	  0x01000000
/* Check submodels */
#define OM_CHECK_SUBMODEL	  0x02000000
/* Match all models previous than the one specified */
#define OM_MATCH_PREVIOUS_MODELS  0x04000000
/* Ignores the minor revison on newer parts */
#define OM_IGNORE_MINOR_REVISION  0x08000000
#define OM_FLAG_MASK		  0xff000000

/* Match all cn5XXX Octeon models. */
#define OM_MATCH_5XXX_FAMILY_MODELS	0x20000000
/* Match all cn6XXX Octeon models. */
#define OM_MATCH_6XXX_FAMILY_MODELS	0x40000000
/* Match all cnf7XXX Octeon models. */
#define OM_MATCH_F7XXX_FAMILY_MODELS	0x80000000
/* Match all cn7XXX Octeon models. */
#define OM_MATCH_7XXX_FAMILY_MODELS     0x10000000
#define OM_MATCH_FAMILY_MODELS		(OM_MATCH_5XXX_FAMILY_MODELS |	\
					 OM_MATCH_6XXX_FAMILY_MODELS |	\
					 OM_MATCH_F7XXX_FAMILY_MODELS | \
					 OM_MATCH_7XXX_FAMILY_MODELS)
/*
 * CN7XXX models with new revision encoding
 */

#define OCTEON_CNF75XX_PASS1_0	0x000d9800
#define OCTEON_CNF75XX		(OCTEON_CNF75XX_PASS1_0 | OM_IGNORE_REVISION)
#define OCTEON_CNF75XX_PASS1_X	(OCTEON_CNF75XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)

#define OCTEON_CN73XX_PASS1_0	0x000d9700
#define OCTEON_CN73XX_PASS1_1	0x000d9701
#define OCTEON_CN73XX		(OCTEON_CN73XX_PASS1_0 | OM_IGNORE_REVISION)
#define OCTEON_CN73XX_PASS1_X	(OCTEON_CN73XX_PASS1_0 | \
				 OM_IGNORE_MINOR_REVISION)

#define OCTEON_CN70XX_PASS1_0	0x000d9600
#define OCTEON_CN70XX_PASS1_1	0x000d9601
#define OCTEON_CN70XX_PASS1_2	0x000d9602

#define OCTEON_CN70XX_PASS2_0	0x000d9608

#define OCTEON_CN70XX		(OCTEON_CN70XX_PASS1_0 | OM_IGNORE_REVISION)
#define OCTEON_CN70XX_PASS1_X	(OCTEON_CN70XX_PASS1_0 | \
				 OM_IGNORE_MINOR_REVISION)
#define OCTEON_CN70XX_PASS2_X	(OCTEON_CN70XX_PASS2_0 | \
				 OM_IGNORE_MINOR_REVISION)

#define OCTEON_CN71XX		OCTEON_CN70XX

#define OCTEON_CN78XX_PASS1_0	0x000d9500
#define OCTEON_CN78XX_PASS1_1	0x000d9501
#define OCTEON_CN78XX_PASS2_0	0x000d9508

#define OCTEON_CN78XX		(OCTEON_CN78XX_PASS1_0 | OM_IGNORE_REVISION)
#define OCTEON_CN78XX_PASS1_X	(OCTEON_CN78XX_PASS1_0 | \
				 OM_IGNORE_MINOR_REVISION)
#define OCTEON_CN78XX_PASS2_X	(OCTEON_CN78XX_PASS2_0 | \
				 OM_IGNORE_MINOR_REVISION)

#define OCTEON_CN76XX		(0x000d9540 | OM_CHECK_SUBMODEL)

/*
 * CNF7XXX models with new revision encoding
 */
#define OCTEON_CNF71XX_PASS1_0	0x000d9400
#define OCTEON_CNF71XX_PASS1_1  0x000d9401

#define OCTEON_CNF71XX		(OCTEON_CNF71XX_PASS1_0 | OM_IGNORE_REVISION)
#define OCTEON_CNF71XX_PASS1_X	(OCTEON_CNF71XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)

/*
 * CN6XXX models with new revision encoding
 */
#define OCTEON_CN68XX_PASS1_0	0x000d9100
#define OCTEON_CN68XX_PASS1_1	0x000d9101
#define OCTEON_CN68XX_PASS1_2	0x000d9102
#define OCTEON_CN68XX_PASS2_0	0x000d9108
#define OCTEON_CN68XX_PASS2_1   0x000d9109
#define OCTEON_CN68XX_PASS2_2   0x000d910a

#define OCTEON_CN68XX		(OCTEON_CN68XX_PASS2_0 | OM_IGNORE_REVISION)
#define OCTEON_CN68XX_PASS1_X	(OCTEON_CN68XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
#define OCTEON_CN68XX_PASS2_X	(OCTEON_CN68XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)

#define OCTEON_CN68XX_PASS1	OCTEON_CN68XX_PASS1_X
#define OCTEON_CN68XX_PASS2	OCTEON_CN68XX_PASS2_X

#define OCTEON_CN66XX_PASS1_0	0x000d9200
#define OCTEON_CN66XX_PASS1_2	0x000d9202

#define OCTEON_CN66XX		(OCTEON_CN66XX_PASS1_0 | OM_IGNORE_REVISION)
#define OCTEON_CN66XX_PASS1_X	(OCTEON_CN66XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)

#define OCTEON_CN63XX_PASS1_0	0x000d9000
#define OCTEON_CN63XX_PASS1_1	0x000d9001
#define OCTEON_CN63XX_PASS1_2	0x000d9002
#define OCTEON_CN63XX_PASS2_0	0x000d9008
#define OCTEON_CN63XX_PASS2_1	0x000d9009
#define OCTEON_CN63XX_PASS2_2	0x000d900a

#define OCTEON_CN63XX		(OCTEON_CN63XX_PASS2_0 | OM_IGNORE_REVISION)
#define OCTEON_CN63XX_PASS1_X	(OCTEON_CN63XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
#define OCTEON_CN63XX_PASS2_X	(OCTEON_CN63XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)

/* CN62XX is same as CN63XX with 1 MB cache */
#define OCTEON_CN62XX           OCTEON_CN63XX

#define OCTEON_CN61XX_PASS1_0	0x000d9300
#define OCTEON_CN61XX_PASS1_1   0x000d9301

#define OCTEON_CN61XX		(OCTEON_CN61XX_PASS1_0 | OM_IGNORE_REVISION)
#define OCTEON_CN61XX_PASS1_X	(OCTEON_CN61XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)

/* CN60XX is same as CN61XX with 512 KB cache */
#define OCTEON_CN60XX           OCTEON_CN61XX

/*
 * CN5XXX models with new revision encoding
 */
#define OCTEON_CN58XX_PASS1_0	0x000d0300
#define OCTEON_CN58XX_PASS1_1	0x000d0301
#define OCTEON_CN58XX_PASS1_2	0x000d0303
#define OCTEON_CN58XX_PASS2_0	0x000d0308
#define OCTEON_CN58XX_PASS2_1	0x000d0309
#define OCTEON_CN58XX_PASS2_2	0x000d030a
#define OCTEON_CN58XX_PASS2_3	0x000d030b

#define OCTEON_CN58XX		(OCTEON_CN58XX_PASS2_0 | OM_IGNORE_REVISION)
#define OCTEON_CN58XX_PASS1_X	(OCTEON_CN58XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
#define OCTEON_CN58XX_PASS2_X	(OCTEON_CN58XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
#define OCTEON_CN58XX_PASS1	OCTEON_CN58XX_PASS1_X
#define OCTEON_CN58XX_PASS2	OCTEON_CN58XX_PASS2_X

#define OCTEON_CN56XX_PASS1_0	0x000d0400
#define OCTEON_CN56XX_PASS1_1	0x000d0401
#define OCTEON_CN56XX_PASS2_0	0x000d0408
#define OCTEON_CN56XX_PASS2_1	0x000d0409

#define OCTEON_CN56XX		(OCTEON_CN56XX_PASS2_0 | OM_IGNORE_REVISION)
#define OCTEON_CN56XX_PASS1_X	(OCTEON_CN56XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
#define OCTEON_CN56XX_PASS2_X	(OCTEON_CN56XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
#define OCTEON_CN56XX_PASS1	OCTEON_CN56XX_PASS1_X
#define OCTEON_CN56XX_PASS2	OCTEON_CN56XX_PASS2_X

#define OCTEON_CN57XX		OCTEON_CN56XX
#define OCTEON_CN57XX_PASS1	OCTEON_CN56XX_PASS1
#define OCTEON_CN57XX_PASS2	OCTEON_CN56XX_PASS2

#define OCTEON_CN55XX		OCTEON_CN56XX
#define OCTEON_CN55XX_PASS1	OCTEON_CN56XX_PASS1
#define OCTEON_CN55XX_PASS2	OCTEON_CN56XX_PASS2

#define OCTEON_CN54XX		OCTEON_CN56XX
#define OCTEON_CN54XX_PASS1	OCTEON_CN56XX_PASS1
#define OCTEON_CN54XX_PASS2	OCTEON_CN56XX_PASS2

#define OCTEON_CN50XX_PASS1_0	0x000d0600

#define OCTEON_CN50XX		(OCTEON_CN50XX_PASS1_0 | OM_IGNORE_REVISION)
#define OCTEON_CN50XX_PASS1_X	(OCTEON_CN50XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
#define OCTEON_CN50XX_PASS1	OCTEON_CN50XX_PASS1_X

/*
 * NOTE: Octeon CN5000F model is not identifiable using the
 * OCTEON_IS_MODEL() functions, but are treated as CN50XX.
 */

#define OCTEON_CN52XX_PASS1_0	0x000d0700
#define OCTEON_CN52XX_PASS2_0	0x000d0708

#define OCTEON_CN52XX		(OCTEON_CN52XX_PASS2_0 | OM_IGNORE_REVISION)
#define OCTEON_CN52XX_PASS1_X	(OCTEON_CN52XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
#define OCTEON_CN52XX_PASS2_X	(OCTEON_CN52XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
#define OCTEON_CN52XX_PASS1	OCTEON_CN52XX_PASS1_X
#define OCTEON_CN52XX_PASS2	OCTEON_CN52XX_PASS2_X

/*
 * CN3XXX models with old revision enconding
 */
#define OCTEON_CN38XX_PASS1	0x000d0000
#define OCTEON_CN38XX_PASS2	0x000d0001
#define OCTEON_CN38XX_PASS3	0x000d0003
#define OCTEON_CN38XX		(OCTEON_CN38XX_PASS3 | OM_IGNORE_REVISION)

#define OCTEON_CN36XX		OCTEON_CN38XX
#define OCTEON_CN36XX_PASS2	OCTEON_CN38XX_PASS2
#define OCTEON_CN36XX_PASS3	OCTEON_CN38XX_PASS3

/* The OCTEON_CN31XX matches CN31XX models and the CN3020 */
#define OCTEON_CN31XX_PASS1	0x000d0100
#define OCTEON_CN31XX_PASS1_1	0x000d0102
#define OCTEON_CN31XX		(OCTEON_CN31XX_PASS1 | OM_IGNORE_REVISION)

/*
 * This model is only used for internal checks, it is not a valid
 * model for the OCTEON_MODEL environment variable.  This matches the
 * CN3010 and CN3005 but NOT the CN3020.
 */
#define OCTEON_CN30XX_PASS1	0x000d0200
#define OCTEON_CN30XX_PASS1_1	0x000d0202
#define OCTEON_CN30XX		(OCTEON_CN30XX_PASS1 | OM_IGNORE_REVISION)

#define OCTEON_CN3005_PASS1	(0x000d0210 | OM_CHECK_SUBMODEL)
#define OCTEON_CN3005_PASS1_0	(0x000d0210 | OM_CHECK_SUBMODEL)
#define OCTEON_CN3005_PASS1_1	(0x000d0212 | OM_CHECK_SUBMODEL)
#define OCTEON_CN3005		(OCTEON_CN3005_PASS1 | OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)

#define OCTEON_CN3010_PASS1	(0x000d0200 | OM_CHECK_SUBMODEL)
#define OCTEON_CN3010_PASS1_0	(0x000d0200 | OM_CHECK_SUBMODEL)
#define OCTEON_CN3010_PASS1_1	(0x000d0202 | OM_CHECK_SUBMODEL)
#define OCTEON_CN3010		(OCTEON_CN3010_PASS1 | OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)

#define OCTEON_CN3020_PASS1	(0x000d0110 | OM_CHECK_SUBMODEL)
#define OCTEON_CN3020_PASS1_0	(0x000d0110 | OM_CHECK_SUBMODEL)
#define OCTEON_CN3020_PASS1_1	(0x000d0112 | OM_CHECK_SUBMODEL)
#define OCTEON_CN3020		(OCTEON_CN3020_PASS1 | OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)

/*
 * This matches the complete family of CN3xxx CPUs, and not subsequent
 * models
 */
#define OCTEON_CN3XXX		(OCTEON_CN58XX_PASS1_0 | OM_MATCH_PREVIOUS_MODELS | OM_IGNORE_REVISION)
#define OCTEON_CN5XXX		(OCTEON_CN58XX_PASS1_0 | OM_MATCH_5XXX_FAMILY_MODELS)
#define OCTEON_CN6XXX		(OCTEON_CN63XX_PASS1_0 | OM_MATCH_6XXX_FAMILY_MODELS)
#define OCTEON_CNF7XXX		(OCTEON_CNF71XX_PASS1_0 | \
				 OM_MATCH_F7XXX_FAMILY_MODELS)
#define OCTEON_CN7XXX		(OCTEON_CN78XX_PASS1_0 | \
				 OM_MATCH_7XXX_FAMILY_MODELS)

/* The revision byte (low byte) has two different encodings.
 * CN3XXX:
 *
 *     bits
 *     <7:5>: reserved (0)
 *     <4>:   alternate package
 *     <3:0>: revision
 *
 * CN5XXX and older models:
 *
 *     bits
 *     <7>:   reserved (0)
 *     <6>:   alternate package
 *     <5:3>: major revision
 *     <2:0>: minor revision
 *
 */

/* Masks used for the various types of model/family/revision matching */
#define OCTEON_38XX_FAMILY_MASK	     0x00ffff00
#define OCTEON_38XX_FAMILY_REV_MASK  0x00ffff0f
#define OCTEON_38XX_MODEL_MASK	     0x00ffff10
#define OCTEON_38XX_MODEL_REV_MASK   (OCTEON_38XX_FAMILY_REV_MASK | OCTEON_38XX_MODEL_MASK)

/* CN5XXX and later use different layout of bits in the revision ID field */
#define OCTEON_58XX_FAMILY_MASK	     OCTEON_38XX_FAMILY_MASK
#define OCTEON_58XX_FAMILY_REV_MASK  0x00ffff3f
#define OCTEON_58XX_MODEL_MASK	     0x00ffff40
#define OCTEON_58XX_MODEL_REV_MASK   (OCTEON_58XX_FAMILY_REV_MASK | OCTEON_58XX_MODEL_MASK)
#define OCTEON_58XX_MODEL_MINOR_REV_MASK (OCTEON_58XX_MODEL_REV_MASK & 0x00ffff38)
#define OCTEON_5XXX_MODEL_MASK	     0x00ff0fc0

static inline uint32_t cvmx_get_proc_id(void) __attribute__ ((pure));
static inline uint64_t cvmx_read_csr(uint64_t csr_addr);

#define __OCTEON_MATCH_MASK__(x, y, z) (((x) & (z)) == ((y) & (z)))

/*
 * __OCTEON_IS_MODEL_COMPILE__(arg_model, chip_model)
 * returns true if chip_model is identical or belong to the OCTEON
 * model group specified in arg_model.
 */
/* NOTE: This for internal use only! */
#define __OCTEON_IS_MODEL_COMPILE__(arg_model, chip_model)		\
((((arg_model & OCTEON_38XX_FAMILY_MASK) < OCTEON_CN58XX_PASS1_0)  && ( \
		((((arg_model) & (OM_FLAG_MASK)) == (OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)) \
			&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_MODEL_MASK)) || \
		((((arg_model) & (OM_FLAG_MASK)) == 0)			\
			&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_FAMILY_REV_MASK)) || \
		((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_REVISION) \
			&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_FAMILY_MASK)) || \
		((((arg_model) & (OM_FLAG_MASK)) == OM_CHECK_SUBMODEL)	\
			&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_MODEL_REV_MASK)) || \
		((((arg_model) & (OM_MATCH_PREVIOUS_MODELS)) == OM_MATCH_PREVIOUS_MODELS) \
			&& (((chip_model) & OCTEON_38XX_MODEL_MASK) < ((arg_model) & OCTEON_38XX_MODEL_MASK))) \
		)) ||							\
	(((arg_model & OCTEON_38XX_FAMILY_MASK) >= OCTEON_CN58XX_PASS1_0)  && ( \
		((((arg_model) & (OM_FLAG_MASK)) == (OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)) \
			&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_MASK)) || \
		((((arg_model) & (OM_FLAG_MASK)) == 0)			\
			&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_FAMILY_REV_MASK)) || \
		((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_MINOR_REVISION) \
			&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_MINOR_REV_MASK)) || \
		((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_REVISION) \
			&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_FAMILY_MASK)) || \
		((((arg_model) & (OM_FLAG_MASK)) == OM_CHECK_SUBMODEL)	\
			&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_MASK)) || \
		((((arg_model) & (OM_MATCH_5XXX_FAMILY_MODELS)) == OM_MATCH_5XXX_FAMILY_MODELS) \
			&& ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN58XX_PASS1_0) \
			&& ((chip_model & OCTEON_PRID_MASK) < OCTEON_CN63XX_PASS1_0)) || \
		((((arg_model) & (OM_MATCH_6XXX_FAMILY_MODELS)) == OM_MATCH_6XXX_FAMILY_MODELS) \
			&& ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN63XX_PASS1_0) \
			&& ((chip_model & OCTEON_PRID_MASK) < OCTEON_CNF71XX_PASS1_0)) || \
		((((arg_model) & (OM_MATCH_F7XXX_FAMILY_MODELS)) == OM_MATCH_F7XXX_FAMILY_MODELS) \
			&& ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CNF71XX_PASS1_0) \
			&& ((chip_model & OCTEON_PRID_MASK) < OCTEON_CN78XX_PASS1_0)) || \
		((((arg_model) & (OM_MATCH_7XXX_FAMILY_MODELS)) == OM_MATCH_7XXX_FAMILY_MODELS) \
			&& ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN78XX_PASS1_0)) || \
		((((arg_model) & (OM_MATCH_PREVIOUS_MODELS)) == OM_MATCH_PREVIOUS_MODELS) \
			&& (((chip_model) & OCTEON_58XX_MODEL_MASK) < ((arg_model) & OCTEON_58XX_MODEL_MASK))) \
		)))

/* NOTE: This for internal use only!!!!! */
static inline int __octeon_is_model_runtime__(uint32_t model)
{
	uint32_t cpuid = cvmx_get_proc_id();

	return __OCTEON_IS_MODEL_COMPILE__(model, cpuid);
}

/*
 * The OCTEON_IS_MODEL macro should be used for all Octeon model checking done
 * in a program.
 * This should be kept runtime if at all possible  and must be conditionalized
 * with OCTEON_IS_COMMON_BINARY() if runtime checking support is required.
 *
 * Use of the macro in preprocessor directives ( #if OCTEON_IS_MODEL(...) )
 * is NOT SUPPORTED, and should be replaced with CVMX_COMPILED_FOR()
 * I.e.:
 *  #if OCTEON_IS_MODEL(OCTEON_CN56XX)	->  #if CVMX_COMPILED_FOR(OCTEON_CN56XX)
 */
#define OCTEON_IS_MODEL(x) __octeon_is_model_runtime__(x)
#define OCTEON_IS_COMMON_BINARY() 1
#undef OCTEON_MODEL

#define OCTEON_IS_OCTEON1()	OCTEON_IS_MODEL(OCTEON_CN3XXX)
#define OCTEON_IS_OCTEONPLUS()	OCTEON_IS_MODEL(OCTEON_CN5XXX)
#define OCTEON_IS_OCTEON2()						\
	(OCTEON_IS_MODEL(OCTEON_CN6XXX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))

#define OCTEON_IS_OCTEON3()	OCTEON_IS_MODEL(OCTEON_CN7XXX)

#define OCTEON_IS_OCTEON1PLUS()	(OCTEON_IS_OCTEON1() || OCTEON_IS_OCTEONPLUS())

const char *__init octeon_model_get_string(uint32_t chip_id);

/*
 * Return the octeon family, i.e., ProcessorID of the PrID register.
 *
 * @return the octeon family on success, ((unint32_t)-1) on error.
 */
static inline uint32_t cvmx_get_octeon_family(void)
{
	return cvmx_get_proc_id() & OCTEON_FAMILY_MASK;
}

#include <asm/octeon/octeon-feature.h>

#endif /* __OCTEON_MODEL_H__ */
Commit	Line	Data
58f07778 DD	1	/*********************license start*************
	2	* Author: Cavium Networks
	3	*
	4	* Contact: support@caviumnetworks.com
	5	* This file is part of the OCTEON SDK
	6	*
751c9f68	7	* Copyright (c) 2003-2010 Cavium Networks
58f07778 DD	8	*
	9	* This file is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License, Version 2, as
	11	* published by the Free Software Foundation.
	12	*
	13	* This file is distributed in the hope that it will be useful, but
	14	* AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
	15	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
	16	* NONINFRINGEMENT. See the GNU General Public License for more
	17	* details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this file; if not, write to the Free Software
	21	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	22	* or visit http://www.gnu.org/licenses/.
	23	*
	24	* This file may also be available under a different license from Cavium.
	25	* Contact Cavium Networks for more information
	26	*********************license end************************************/
58f07778 DD	27	#ifndef __OCTEON_MODEL_H__
	28	#define __OCTEON_MODEL_H__
	29
58f07778 DD	30	/*
58f07778 DD	31	* The defines below should be used with the OCTEON_IS_MODEL() macro
70342287	32	* to determine what model of chip the software is running on. Models
58f07778 DD	33	* ending in 'XX' match multiple models (families), while specific
	34	* models match only that model. If a pass (revision) is specified,
	35	* then only that revision will be matched. Care should be taken when
	36	* checking for both specific models and families that the specific
	37	* models are checked for first. While these defines are similar to
	38	* the processor ID, they are not intended to be used by anything
	39	* other that the OCTEON_IS_MODEL framework, and the values are
	40	* subject to change at anytime without notice.
	41	*
	42	* NOTE: only the OCTEON_IS_MODEL() macro/function and the OCTEON_CN*
70342287	43	* macros should be used outside of this file. All other macros are
58f07778 DD	44	* for internal use only, and may change without notice.
	45	*/
	46
70342287	47	#define OCTEON_FAMILY_MASK 0x00ffff00
debe6a62	48	#define OCTEON_PRID_MASK 0x00ffffff
751c9f68	49
58f07778 DD	50	/* Flag bits in top byte */
58f07778 DD	51	/* Ignores revision in model checks */
70342287	52	#define OM_IGNORE_REVISION 0x01000000
58f07778	53	/* Check submodels */
70342287	54	#define OM_CHECK_SUBMODEL 0x02000000
58f07778 DD	55	/* Match all models previous than the one specified */
	56	#define OM_MATCH_PREVIOUS_MODELS 0x04000000
	57	/* Ignores the minor revison on newer parts */
	58	#define OM_IGNORE_MINOR_REVISION 0x08000000
70342287	59	#define OM_FLAG_MASK 0xff000000
58f07778	60
751c9f68	61	/* Match all cn5XXX Octeon models. */
70342287	62	#define OM_MATCH_5XXX_FAMILY_MODELS 0x20000000
751c9f68	63	/* Match all cn6XXX Octeon models. */
70342287	64	#define OM_MATCH_6XXX_FAMILY_MODELS 0x40000000
5cf02e55	65	/* Match all cnf7XXX Octeon models. */
70342287	66	#define OM_MATCH_F7XXX_FAMILY_MODELS 0x80000000
debe6a62 DD	67	/* Match all cn7XXX Octeon models. */
	68	#define OM_MATCH_7XXX_FAMILY_MODELS 0x10000000
	69	#define OM_MATCH_FAMILY_MODELS (OM_MATCH_5XXX_FAMILY_MODELS \| \
	70	OM_MATCH_6XXX_FAMILY_MODELS \| \
	71	OM_MATCH_F7XXX_FAMILY_MODELS \| \
	72	OM_MATCH_7XXX_FAMILY_MODELS)
	73	/*
	74	* CN7XXX models with new revision encoding
	75	*/
	76
182a6d1c DD	77	#define OCTEON_CNF75XX_PASS1_0 0x000d9800
	78	#define OCTEON_CNF75XX (OCTEON_CNF75XX_PASS1_0 \| OM_IGNORE_REVISION)
	79	#define OCTEON_CNF75XX_PASS1_X (OCTEON_CNF75XX_PASS1_0 \| OM_IGNORE_MINOR_REVISION)
	80
debe6a62	81	#define OCTEON_CN73XX_PASS1_0 0x000d9700
182a6d1c	82	#define OCTEON_CN73XX_PASS1_1 0x000d9701
debe6a62 DD	83	#define OCTEON_CN73XX (OCTEON_CN73XX_PASS1_0 \| OM_IGNORE_REVISION)
	84	#define OCTEON_CN73XX_PASS1_X (OCTEON_CN73XX_PASS1_0 \| \
	85	OM_IGNORE_MINOR_REVISION)
	86
	87	#define OCTEON_CN70XX_PASS1_0 0x000d9600
	88	#define OCTEON_CN70XX_PASS1_1 0x000d9601
	89	#define OCTEON_CN70XX_PASS1_2 0x000d9602
	90
	91	#define OCTEON_CN70XX_PASS2_0 0x000d9608
	92
	93	#define OCTEON_CN70XX (OCTEON_CN70XX_PASS1_0 \| OM_IGNORE_REVISION)
	94	#define OCTEON_CN70XX_PASS1_X (OCTEON_CN70XX_PASS1_0 \| \
	95	OM_IGNORE_MINOR_REVISION)
	96	#define OCTEON_CN70XX_PASS2_X (OCTEON_CN70XX_PASS2_0 \| \
	97	OM_IGNORE_MINOR_REVISION)
	98
	99	#define OCTEON_CN71XX OCTEON_CN70XX
	100
	101	#define OCTEON_CN78XX_PASS1_0 0x000d9500
	102	#define OCTEON_CN78XX_PASS1_1 0x000d9501
	103	#define OCTEON_CN78XX_PASS2_0 0x000d9508
	104
	105	#define OCTEON_CN78XX (OCTEON_CN78XX_PASS1_0 \| OM_IGNORE_REVISION)
	106	#define OCTEON_CN78XX_PASS1_X (OCTEON_CN78XX_PASS1_0 \| \
	107	OM_IGNORE_MINOR_REVISION)
	108	#define OCTEON_CN78XX_PASS2_X (OCTEON_CN78XX_PASS2_0 \| \
	109	OM_IGNORE_MINOR_REVISION)
	110
	111	#define OCTEON_CN76XX (0x000d9540 \| OM_CHECK_SUBMODEL)
5cf02e55 DD	112
	113	/*
	114	* CNF7XXX models with new revision encoding
	115	*/
70342287	116	#define OCTEON_CNF71XX_PASS1_0 0x000d9400
debe6a62	117	#define OCTEON_CNF71XX_PASS1_1 0x000d9401
5cf02e55	118
70342287 RB	119	#define OCTEON_CNF71XX (OCTEON_CNF71XX_PASS1_0 \| OM_IGNORE_REVISION)
70342287 RB	120	#define OCTEON_CNF71XX_PASS1_X (OCTEON_CNF71XX_PASS1_0 \| OM_IGNORE_MINOR_REVISION)
a70b13a9 DD	121
	122	/*
	123	* CN6XXX models with new revision encoding
	124	*/
70342287 RB	125	#define OCTEON_CN68XX_PASS1_0 0x000d9100
	126	#define OCTEON_CN68XX_PASS1_1 0x000d9101
	127	#define OCTEON_CN68XX_PASS1_2 0x000d9102
	128	#define OCTEON_CN68XX_PASS2_0 0x000d9108
debe6a62 DD	129	#define OCTEON_CN68XX_PASS2_1 0x000d9109
debe6a62 DD	130	#define OCTEON_CN68XX_PASS2_2 0x000d910a
751c9f68	131
70342287 RB	132	#define OCTEON_CN68XX (OCTEON_CN68XX_PASS2_0 \| OM_IGNORE_REVISION)
	133	#define OCTEON_CN68XX_PASS1_X (OCTEON_CN68XX_PASS1_0 \| OM_IGNORE_MINOR_REVISION)
	134	#define OCTEON_CN68XX_PASS2_X (OCTEON_CN68XX_PASS2_0 \| OM_IGNORE_MINOR_REVISION)
751c9f68 DD	135
	136	#define OCTEON_CN68XX_PASS1 OCTEON_CN68XX_PASS1_X
	137	#define OCTEON_CN68XX_PASS2 OCTEON_CN68XX_PASS2_X
	138
70342287 RB	139	#define OCTEON_CN66XX_PASS1_0 0x000d9200
70342287 RB	140	#define OCTEON_CN66XX_PASS1_2 0x000d9202
751c9f68	141
70342287 RB	142	#define OCTEON_CN66XX (OCTEON_CN66XX_PASS1_0 \| OM_IGNORE_REVISION)
70342287 RB	143	#define OCTEON_CN66XX_PASS1_X (OCTEON_CN66XX_PASS1_0 \| OM_IGNORE_MINOR_REVISION)
751c9f68	144
70342287 RB	145	#define OCTEON_CN63XX_PASS1_0 0x000d9000
	146	#define OCTEON_CN63XX_PASS1_1 0x000d9001
	147	#define OCTEON_CN63XX_PASS1_2 0x000d9002
	148	#define OCTEON_CN63XX_PASS2_0 0x000d9008
	149	#define OCTEON_CN63XX_PASS2_1 0x000d9009
	150	#define OCTEON_CN63XX_PASS2_2 0x000d900a
a70b13a9	151
70342287 RB	152	#define OCTEON_CN63XX (OCTEON_CN63XX_PASS2_0 \| OM_IGNORE_REVISION)
	153	#define OCTEON_CN63XX_PASS1_X (OCTEON_CN63XX_PASS1_0 \| OM_IGNORE_MINOR_REVISION)
	154	#define OCTEON_CN63XX_PASS2_X (OCTEON_CN63XX_PASS2_0 \| OM_IGNORE_MINOR_REVISION)
a70b13a9	155
debe6a62 DD	156	/* CN62XX is same as CN63XX with 1 MB cache */
	157	#define OCTEON_CN62XX OCTEON_CN63XX
	158
70342287	159	#define OCTEON_CN61XX_PASS1_0 0x000d9300
debe6a62	160	#define OCTEON_CN61XX_PASS1_1 0x000d9301
751c9f68	161
70342287 RB	162	#define OCTEON_CN61XX (OCTEON_CN61XX_PASS1_0 \| OM_IGNORE_REVISION)
70342287 RB	163	#define OCTEON_CN61XX_PASS1_X (OCTEON_CN61XX_PASS1_0 \| OM_IGNORE_MINOR_REVISION)
751c9f68	164
debe6a62 DD	165	/* CN60XX is same as CN61XX with 512 KB cache */
	166	#define OCTEON_CN60XX OCTEON_CN61XX
	167
58f07778 DD	168	/*
	169	* CN5XXX models with new revision encoding
	170	*/
70342287 RB	171	#define OCTEON_CN58XX_PASS1_0 0x000d0300
	172	#define OCTEON_CN58XX_PASS1_1 0x000d0301
	173	#define OCTEON_CN58XX_PASS1_2 0x000d0303
	174	#define OCTEON_CN58XX_PASS2_0 0x000d0308
	175	#define OCTEON_CN58XX_PASS2_1 0x000d0309
	176	#define OCTEON_CN58XX_PASS2_2 0x000d030a
	177	#define OCTEON_CN58XX_PASS2_3 0x000d030b
	178
debe6a62	179	#define OCTEON_CN58XX (OCTEON_CN58XX_PASS2_0 \| OM_IGNORE_REVISION)
70342287 RB	180	#define OCTEON_CN58XX_PASS1_X (OCTEON_CN58XX_PASS1_0 \| OM_IGNORE_MINOR_REVISION)
	181	#define OCTEON_CN58XX_PASS2_X (OCTEON_CN58XX_PASS2_0 \| OM_IGNORE_MINOR_REVISION)
	182	#define OCTEON_CN58XX_PASS1 OCTEON_CN58XX_PASS1_X
	183	#define OCTEON_CN58XX_PASS2 OCTEON_CN58XX_PASS2_X
	184
	185	#define OCTEON_CN56XX_PASS1_0 0x000d0400
	186	#define OCTEON_CN56XX_PASS1_1 0x000d0401
	187	#define OCTEON_CN56XX_PASS2_0 0x000d0408
	188	#define OCTEON_CN56XX_PASS2_1 0x000d0409
	189
	190	#define OCTEON_CN56XX (OCTEON_CN56XX_PASS2_0 \| OM_IGNORE_REVISION)
	191	#define OCTEON_CN56XX_PASS1_X (OCTEON_CN56XX_PASS1_0 \| OM_IGNORE_MINOR_REVISION)
	192	#define OCTEON_CN56XX_PASS2_X (OCTEON_CN56XX_PASS2_0 \| OM_IGNORE_MINOR_REVISION)
	193	#define OCTEON_CN56XX_PASS1 OCTEON_CN56XX_PASS1_X
	194	#define OCTEON_CN56XX_PASS2 OCTEON_CN56XX_PASS2_X
	195
	196	#define OCTEON_CN57XX OCTEON_CN56XX
	197	#define OCTEON_CN57XX_PASS1 OCTEON_CN56XX_PASS1
	198	#define OCTEON_CN57XX_PASS2 OCTEON_CN56XX_PASS2
	199
	200	#define OCTEON_CN55XX OCTEON_CN56XX
	201	#define OCTEON_CN55XX_PASS1 OCTEON_CN56XX_PASS1
	202	#define OCTEON_CN55XX_PASS2 OCTEON_CN56XX_PASS2
	203
	204	#define OCTEON_CN54XX OCTEON_CN56XX
	205	#define OCTEON_CN54XX_PASS1 OCTEON_CN56XX_PASS1
	206	#define OCTEON_CN54XX_PASS2 OCTEON_CN56XX_PASS2
	207
	208	#define OCTEON_CN50XX_PASS1_0 0x000d0600
	209
	210	#define OCTEON_CN50XX (OCTEON_CN50XX_PASS1_0 \| OM_IGNORE_REVISION)
	211	#define OCTEON_CN50XX_PASS1_X (OCTEON_CN50XX_PASS1_0 \| OM_IGNORE_MINOR_REVISION)
	212	#define OCTEON_CN50XX_PASS1 OCTEON_CN50XX_PASS1_X
58f07778 DD	213
	214	/*
	215	* NOTE: Octeon CN5000F model is not identifiable using the
	216	* OCTEON_IS_MODEL() functions, but are treated as CN50XX.
	217	*/
	218
70342287 RB	219	#define OCTEON_CN52XX_PASS1_0 0x000d0700
70342287 RB	220	#define OCTEON_CN52XX_PASS2_0 0x000d0708
58f07778	221
70342287 RB	222	#define OCTEON_CN52XX (OCTEON_CN52XX_PASS2_0 \| OM_IGNORE_REVISION)
	223	#define OCTEON_CN52XX_PASS1_X (OCTEON_CN52XX_PASS1_0 \| OM_IGNORE_MINOR_REVISION)
	224	#define OCTEON_CN52XX_PASS2_X (OCTEON_CN52XX_PASS2_0 \| OM_IGNORE_MINOR_REVISION)
	225	#define OCTEON_CN52XX_PASS1 OCTEON_CN52XX_PASS1_X
	226	#define OCTEON_CN52XX_PASS2 OCTEON_CN52XX_PASS2_X
58f07778 DD	227
	228	/*
	229	* CN3XXX models with old revision enconding
	230	*/
70342287 RB	231	#define OCTEON_CN38XX_PASS1 0x000d0000
	232	#define OCTEON_CN38XX_PASS2 0x000d0001
	233	#define OCTEON_CN38XX_PASS3 0x000d0003
	234	#define OCTEON_CN38XX (OCTEON_CN38XX_PASS3 \| OM_IGNORE_REVISION)
58f07778	235
70342287 RB	236	#define OCTEON_CN36XX OCTEON_CN38XX
	237	#define OCTEON_CN36XX_PASS2 OCTEON_CN38XX_PASS2
	238	#define OCTEON_CN36XX_PASS3 OCTEON_CN38XX_PASS3
58f07778 DD	239
58f07778 DD	240	/* The OCTEON_CN31XX matches CN31XX models and the CN3020 */
70342287 RB	241	#define OCTEON_CN31XX_PASS1 0x000d0100
	242	#define OCTEON_CN31XX_PASS1_1 0x000d0102
	243	#define OCTEON_CN31XX (OCTEON_CN31XX_PASS1 \| OM_IGNORE_REVISION)
58f07778 DD	244
	245	/*
	246	* This model is only used for internal checks, it is not a valid
	247	* model for the OCTEON_MODEL environment variable. This matches the
	248	* CN3010 and CN3005 but NOT the CN3020.
	249	*/
70342287 RB	250	#define OCTEON_CN30XX_PASS1 0x000d0200
	251	#define OCTEON_CN30XX_PASS1_1 0x000d0202
	252	#define OCTEON_CN30XX (OCTEON_CN30XX_PASS1 \| OM_IGNORE_REVISION)
58f07778	253
70342287 RB	254	#define OCTEON_CN3005_PASS1 (0x000d0210 \| OM_CHECK_SUBMODEL)
	255	#define OCTEON_CN3005_PASS1_0 (0x000d0210 \| OM_CHECK_SUBMODEL)
	256	#define OCTEON_CN3005_PASS1_1 (0x000d0212 \| OM_CHECK_SUBMODEL)
	257	#define OCTEON_CN3005 (OCTEON_CN3005_PASS1 \| OM_IGNORE_REVISION \| OM_CHECK_SUBMODEL)
58f07778	258
70342287 RB	259	#define OCTEON_CN3010_PASS1 (0x000d0200 \| OM_CHECK_SUBMODEL)
	260	#define OCTEON_CN3010_PASS1_0 (0x000d0200 \| OM_CHECK_SUBMODEL)
	261	#define OCTEON_CN3010_PASS1_1 (0x000d0202 \| OM_CHECK_SUBMODEL)
	262	#define OCTEON_CN3010 (OCTEON_CN3010_PASS1 \| OM_IGNORE_REVISION \| OM_CHECK_SUBMODEL)
58f07778	263
70342287 RB	264	#define OCTEON_CN3020_PASS1 (0x000d0110 \| OM_CHECK_SUBMODEL)
	265	#define OCTEON_CN3020_PASS1_0 (0x000d0110 \| OM_CHECK_SUBMODEL)
	266	#define OCTEON_CN3020_PASS1_1 (0x000d0112 \| OM_CHECK_SUBMODEL)
	267	#define OCTEON_CN3020 (OCTEON_CN3020_PASS1 \| OM_IGNORE_REVISION \| OM_CHECK_SUBMODEL)
58f07778	268
751c9f68 DD	269	/*
	270	* This matches the complete family of CN3xxx CPUs, and not subsequent
	271	* models
	272	*/
70342287 RB	273	#define OCTEON_CN3XXX (OCTEON_CN58XX_PASS1_0 \| OM_MATCH_PREVIOUS_MODELS \| OM_IGNORE_REVISION)
	274	#define OCTEON_CN5XXX (OCTEON_CN58XX_PASS1_0 \| OM_MATCH_5XXX_FAMILY_MODELS)
	275	#define OCTEON_CN6XXX (OCTEON_CN63XX_PASS1_0 \| OM_MATCH_6XXX_FAMILY_MODELS)
debe6a62 DD	276	#define OCTEON_CNF7XXX (OCTEON_CNF71XX_PASS1_0 \| \
	277	OM_MATCH_F7XXX_FAMILY_MODELS)
	278	#define OCTEON_CN7XXX (OCTEON_CN78XX_PASS1_0 \| \
	279	OM_MATCH_7XXX_FAMILY_MODELS)
6bbf6a6d	280
58f07778 DD	281	/* The revision byte (low byte) has two different encodings.
	282	* CN3XXX:
	283	*
	284	* bits
	285	* <7:5>: reserved (0)
	286	* <4>: alternate package
	287	* <3:0>: revision
	288	*
debe6a62	289	* CN5XXX and older models:
58f07778 DD	290	*
	291	* bits
	292	* <7>: reserved (0)
	293	* <6>: alternate package
	294	* <5:3>: major revision
	295	* <2:0>: minor revision
	296	*
	297	*/
	298
	299	/* Masks used for the various types of model/family/revision matching */
70342287	300	#define OCTEON_38XX_FAMILY_MASK 0x00ffff00
58f07778	301	#define OCTEON_38XX_FAMILY_REV_MASK 0x00ffff0f
70342287	302	#define OCTEON_38XX_MODEL_MASK 0x00ffff10
751c9f68	303	#define OCTEON_38XX_MODEL_REV_MASK (OCTEON_38XX_FAMILY_REV_MASK \| OCTEON_38XX_MODEL_MASK)
58f07778 DD	304
58f07778 DD	305	/* CN5XXX and later use different layout of bits in the revision ID field */
70342287	306	#define OCTEON_58XX_FAMILY_MASK OCTEON_38XX_FAMILY_MASK
58f07778	307	#define OCTEON_58XX_FAMILY_REV_MASK 0x00ffff3f
debe6a62	308	#define OCTEON_58XX_MODEL_MASK 0x00ffff40
751c9f68	309	#define OCTEON_58XX_MODEL_REV_MASK (OCTEON_58XX_FAMILY_REV_MASK \| OCTEON_58XX_MODEL_MASK)
debe6a62	310	#define OCTEON_58XX_MODEL_MINOR_REV_MASK (OCTEON_58XX_MODEL_REV_MASK & 0x00ffff38)
70342287	311	#define OCTEON_5XXX_MODEL_MASK 0x00ff0fc0
58f07778	312
58f07778 DD	313	static inline uint32_t cvmx_get_proc_id(void) __attribute__ ((pure));
	314	static inline uint64_t cvmx_read_csr(uint64_t csr_addr);
	315
751c9f68 DD	316	#define __OCTEON_MATCH_MASK__(x, y, z) (((x) & (z)) == ((y) & (z)))
751c9f68 DD	317
debe6a62 DD	318	/*
	319	* __OCTEON_IS_MODEL_COMPILE__(arg_model, chip_model)
	320	* returns true if chip_model is identical or belong to the OCTEON
	321	* model group specified in arg_model.
	322	*/
751c9f68 DD	323	/* NOTE: This for internal use only! */
751c9f68 DD	324	#define __OCTEON_IS_MODEL_COMPILE__(arg_model, chip_model) \
70342287	325	((((arg_model & OCTEON_38XX_FAMILY_MASK) < OCTEON_CN58XX_PASS1_0) && ( \
751c9f68 DD	326	((((arg_model) & (OM_FLAG_MASK)) == (OM_IGNORE_REVISION \| OM_CHECK_SUBMODEL)) \
	327	&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_MODEL_MASK)) \|\| \
	328	((((arg_model) & (OM_FLAG_MASK)) == 0) \
	329	&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_FAMILY_REV_MASK)) \|\| \
	330	((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_REVISION) \
	331	&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_FAMILY_MASK)) \|\| \
	332	((((arg_model) & (OM_FLAG_MASK)) == OM_CHECK_SUBMODEL) \
	333	&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_MODEL_REV_MASK)) \|\| \
	334	((((arg_model) & (OM_MATCH_PREVIOUS_MODELS)) == OM_MATCH_PREVIOUS_MODELS) \
	335	&& (((chip_model) & OCTEON_38XX_MODEL_MASK) < ((arg_model) & OCTEON_38XX_MODEL_MASK))) \
	336	)) \|\| \
70342287	337	(((arg_model & OCTEON_38XX_FAMILY_MASK) >= OCTEON_CN58XX_PASS1_0) && ( \
751c9f68 DD	338	((((arg_model) & (OM_FLAG_MASK)) == (OM_IGNORE_REVISION \| OM_CHECK_SUBMODEL)) \
	339	&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_MASK)) \|\| \
	340	((((arg_model) & (OM_FLAG_MASK)) == 0) \
	341	&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_FAMILY_REV_MASK)) \|\| \
	342	((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_MINOR_REVISION) \
	343	&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_MINOR_REV_MASK)) \|\| \
	344	((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_REVISION) \
	345	&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_FAMILY_MASK)) \|\| \
	346	((((arg_model) & (OM_FLAG_MASK)) == OM_CHECK_SUBMODEL) \
debe6a62	347	&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_MASK)) \|\| \
751c9f68	348	((((arg_model) & (OM_MATCH_5XXX_FAMILY_MODELS)) == OM_MATCH_5XXX_FAMILY_MODELS) \
debe6a62 DD	349	&& ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN58XX_PASS1_0) \
debe6a62 DD	350	&& ((chip_model & OCTEON_PRID_MASK) < OCTEON_CN63XX_PASS1_0)) \|\| \
751c9f68	351	((((arg_model) & (OM_MATCH_6XXX_FAMILY_MODELS)) == OM_MATCH_6XXX_FAMILY_MODELS) \
debe6a62 DD	352	&& ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN63XX_PASS1_0) \
	353	&& ((chip_model & OCTEON_PRID_MASK) < OCTEON_CNF71XX_PASS1_0)) \|\| \
	354	((((arg_model) & (OM_MATCH_F7XXX_FAMILY_MODELS)) == OM_MATCH_F7XXX_FAMILY_MODELS) \
	355	&& ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CNF71XX_PASS1_0) \
	356	&& ((chip_model & OCTEON_PRID_MASK) < OCTEON_CN78XX_PASS1_0)) \|\| \
	357	((((arg_model) & (OM_MATCH_7XXX_FAMILY_MODELS)) == OM_MATCH_7XXX_FAMILY_MODELS) \
	358	&& ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN78XX_PASS1_0)) \|\| \
751c9f68 DD	359	((((arg_model) & (OM_MATCH_PREVIOUS_MODELS)) == OM_MATCH_PREVIOUS_MODELS) \
	360	&& (((chip_model) & OCTEON_58XX_MODEL_MASK) < ((arg_model) & OCTEON_58XX_MODEL_MASK))) \
	361	)))
	362
58f07778 DD	363	/* NOTE: This for internal use only!!!!! */
	364	static inline int __octeon_is_model_runtime__(uint32_t model)
	365	{
	366	uint32_t cpuid = cvmx_get_proc_id();
	367
58f07778 DD	368	return __OCTEON_IS_MODEL_COMPILE__(model, cpuid);
	369	}
	370
	371	/*
751c9f68 DD	372	* The OCTEON_IS_MODEL macro should be used for all Octeon model checking done
	373	* in a program.
	374	* This should be kept runtime if at all possible and must be conditionalized
	375	* with OCTEON_IS_COMMON_BINARY() if runtime checking support is required.
	376	*
	377	* Use of the macro in preprocessor directives ( #if OCTEON_IS_MODEL(...) )
	378	* is NOT SUPPORTED, and should be replaced with CVMX_COMPILED_FOR()
	379	* I.e.:
70342287	380	* #if OCTEON_IS_MODEL(OCTEON_CN56XX) -> #if CVMX_COMPILED_FOR(OCTEON_CN56XX)
58f07778 DD	381	*/
	382	#define OCTEON_IS_MODEL(x) __octeon_is_model_runtime__(x)
	383	#define OCTEON_IS_COMMON_BINARY() 1
	384	#undef OCTEON_MODEL
	385
debe6a62 DD	386	#define OCTEON_IS_OCTEON1() OCTEON_IS_MODEL(OCTEON_CN3XXX)
	387	#define OCTEON_IS_OCTEONPLUS() OCTEON_IS_MODEL(OCTEON_CN5XXX)
	388	#define OCTEON_IS_OCTEON2() \
	389	(OCTEON_IS_MODEL(OCTEON_CN6XXX) \|\| OCTEON_IS_MODEL(OCTEON_CNF71XX))
	390
	391	#define OCTEON_IS_OCTEON3() OCTEON_IS_MODEL(OCTEON_CN7XXX)
	392
	393	#define OCTEON_IS_OCTEON1PLUS() (OCTEON_IS_OCTEON1() \|\| OCTEON_IS_OCTEONPLUS())
	394
da85e364	395	const char *__init octeon_model_get_string(uint32_t chip_id);
58f07778	396
5cf02e55 DD	397	/*
5cf02e55 DD	398	* Return the octeon family, i.e., ProcessorID of the PrID register.
debe6a62 DD	399	*
debe6a62 DD	400	* @return the octeon family on success, ((unint32_t)-1) on error.
5cf02e55 DD	401	*/
	402	static inline uint32_t cvmx_get_octeon_family(void)
	403	{
	404	return cvmx_get_proc_id() & OCTEON_FAMILY_MASK;
	405	}
	406
a1ce3928	407	#include <asm/octeon/octeon-feature.h>
58f07778 DD	408
58f07778 DD	409	#endif /* __OCTEON_MODEL_H__ */