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CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000, 03 Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 */
9#ifndef _ASM_PAGE_H
10#define _ASM_PAGE_H
11
1da177e4 12#include <spaces.h>
99502d94 13#include <linux/const.h>
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14#include <linux/kernel.h>
15#include <asm/mipsregs.h>
1da177e4 16
1da177e4
LT
17/*
18 * PAGE_SHIFT determines the page size
19 */
20#ifdef CONFIG_PAGE_SIZE_4KB
21#define PAGE_SHIFT 12
22#endif
23#ifdef CONFIG_PAGE_SIZE_8KB
24#define PAGE_SHIFT 13
25#endif
26#ifdef CONFIG_PAGE_SIZE_16KB
27#define PAGE_SHIFT 14
28#endif
c52399be
RB
29#ifdef CONFIG_PAGE_SIZE_32KB
30#define PAGE_SHIFT 15
31#endif
1da177e4
LT
32#ifdef CONFIG_PAGE_SIZE_64KB
33#define PAGE_SHIFT 16
34#endif
99502d94 35#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
22b14523 36#define PAGE_MASK (~(PAGE_SIZE - 1))
1da177e4 37
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38/*
39 * This is used for calculating the real page sizes
91ff7ac0 40 * for FTLB or VTLB + FTLB configurations.
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41 */
42static inline unsigned int page_size_ftlb(unsigned int mmuextdef)
43{
44 switch (mmuextdef) {
45 case MIPS_CONF4_MMUEXTDEF_FTLBSIZEEXT:
46 if (PAGE_SIZE == (1 << 30))
47 return 5;
48 if (PAGE_SIZE == (1llu << 32))
49 return 6;
50 if (PAGE_SIZE > (256 << 10))
51 return 7; /* reserved */
52 /* fall through */
53 case MIPS_CONF4_MMUEXTDEF_VTLBSIZEEXT:
54 return (PAGE_SHIFT - 10) / 2;
55 default:
56 panic("Invalid FTLB configuration with Conf4_mmuextdef=%d value\n",
57 mmuextdef >> 14);
58 }
59}
60
aa1762f4 61#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
dd794392 62#define HPAGE_SHIFT (PAGE_SHIFT + PAGE_SHIFT - 3)
99502d94 63#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
dd794392
DD
64#define HPAGE_MASK (~(HPAGE_SIZE - 1))
65#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
aa1762f4 66#else /* !CONFIG_MIPS_HUGE_TLB_SUPPORT */
f467e4bf
HD
67#define HPAGE_SHIFT ({BUILD_BUG(); 0; })
68#define HPAGE_SIZE ({BUILD_BUG(); 0; })
69#define HPAGE_MASK ({BUILD_BUG(); 0; })
70#define HUGETLB_PAGE_ORDER ({BUILD_BUG(); 0; })
aa1762f4 71#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
dd794392 72
41b0483e 73#include <linux/pfn.h>
6f284a2c 74
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DV
75extern void build_clear_page(void);
76extern void build_copy_page(void);
77
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FBH
78/*
79 * It's normally defined only for FLATMEM config but it's
80 * used in our early mem init code for all memory models.
81 * So always define it.
82 */
83#define ARCH_PFN_OFFSET PFN_UP(PHYS_OFFSET)
84
1da177e4
LT
85extern void clear_page(void * page);
86extern void copy_page(void * to, void * from);
87
88extern unsigned long shm_align_mask;
89
90static inline unsigned long pages_do_alias(unsigned long addr1,
91 unsigned long addr2)
92{
93 return (addr1 ^ addr2) & shm_align_mask;
94}
95
96struct page;
97
98static inline void clear_user_page(void *addr, unsigned long vaddr,
99 struct page *page)
100{
101 extern void (*flush_data_cache_page)(unsigned long addr);
102
103 clear_page(addr);
585fa724 104 if (pages_do_alias((unsigned long) addr, vaddr & PAGE_MASK))
1da177e4
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105 flush_data_cache_page((unsigned long)addr);
106}
107
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AN
108struct vm_area_struct;
109extern void copy_user_highpage(struct page *to, struct page *from,
110 unsigned long vaddr, struct vm_area_struct *vma);
1da177e4 111
bcd02280 112#define __HAVE_ARCH_COPY_USER_HIGHPAGE
1da177e4
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113
114/*
115 * These are used to make use of C type-checking..
116 */
34adb28d 117#ifdef CONFIG_PHYS_ADDR_T_64BIT
ec917c2c 118 #ifdef CONFIG_CPU_MIPS32
1da177e4 119 typedef struct { unsigned long pte_low, pte_high; } pte_t;
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120 #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32))
121 #define __pte(x) ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; })
1da177e4
LT
122 #else
123 typedef struct { unsigned long long pte; } pte_t;
70342287 124 #define pte_val(x) ((x).pte)
d34555fb 125 #define __pte(x) ((pte_t) { (x) } )
1da177e4
LT
126 #endif
127#else
128typedef struct { unsigned long pte; } pte_t;
129#define pte_val(x) ((x).pte)
c6e8b587 130#define __pte(x) ((pte_t) { (x) } )
d34555fb 131#endif
2f569afd 132typedef struct page *pgtable_t;
1da177e4 133
c6e8b587
RB
134/*
135 * Right now we don't support 4-level pagetables, so all pud-related
136 * definitions come from <asm-generic/pgtable-nopud.h>.
137 */
138
139/*
140 * Finall the top of the hierarchy, the pgd
141 */
142typedef struct { unsigned long pgd; } pgd_t;
143#define pgd_val(x) ((x).pgd)
1da177e4 144#define __pgd(x) ((pgd_t) { (x) } )
c6e8b587
RB
145
146/*
147 * Manipulate page protection bits
148 */
149typedef struct { unsigned long pgprot; } pgprot_t;
150#define pgprot_val(x) ((x).pgprot)
1da177e4
LT
151#define __pgprot(x) ((pgprot_t) { (x) } )
152
c6e8b587
RB
153/*
154 * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd
155 * pair of pages we only have a single global bit per pair of pages. When
156 * writing to the TLB make sure we always have the bit set for both pages
157 * or none. This macro is used to access the `buddy' of the pte we're just
158 * working on.
159 */
160#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t)))
161
6f284a2c
FBH
162/*
163 * __pa()/__va() should be used only during mem init.
164 */
f4fae826 165#ifdef CONFIG_64BIT
b1c65b39
FBH
166#define __pa(x) \
167({ \
168 unsigned long __x = (unsigned long)(x); \
169 __x < CKSEG0 ? XPHYSADDR(__x) : CPHYSADDR(__x); \
170})
620a4802 171#else
b1c65b39
FBH
172#define __pa(x) \
173 ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET)
620a4802 174#endif
6f284a2c 175#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET))
49c426ba 176#include <asm/io.h>
5707bf6b
RB
177
178/*
179 * RELOC_HIDE was originally added by 6007b903dfe5f1d13e0c711ac2894bdd4a61b1ad
180 * (lmo) rsp. 8431fd094d625b94d364fe393076ccef88e6ce18 (kernel.org). The
181 * discussion can be found in lkml posting
182 * <a2ebde260608230500o3407b108hc03debb9da6e62c@mail.gmail.com> which is
183 * archived at http://lists.linuxcoding.com/kernel/2006-q3/msg17360.html
184 *
185 * It is unclear if the misscompilations mentioned in
186 * http://lkml.org/lkml/2010/8/8/138 also affect MIPS so we keep this one
187 * until GCC 3.x has been retired before we can apply
188 * https://patchwork.linux-mips.org/patch/1541/
189 */
190
27b3db20 191#ifndef __pa_symbol
21a151d8 192#define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x), 0))
27b3db20 193#endif
1da177e4
LT
194
195#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
196
e53639d8
RB
197#ifdef CONFIG_FLATMEM
198
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RB
199static inline int pfn_valid(unsigned long pfn)
200{
201 /* avoid <linux/mm.h> include hell */
202 extern unsigned long max_mapnr;
95486e49 203 unsigned long pfn_offset = ARCH_PFN_OFFSET;
8b923214 204
95486e49 205 return pfn >= pfn_offset && pfn < max_mapnr;
8b923214 206}
e53639d8 207
7de58fab
AN
208#elif defined(CONFIG_SPARSEMEM)
209
210/* pfn_valid is defined in linux/mmzone.h */
211
e53639d8
RB
212#elif defined(CONFIG_NEED_MULTIPLE_NODES)
213
214#define pfn_valid(pfn) \
215({ \
216 unsigned long __pfn = (pfn); \
217 int __n = pfn_to_nid(__pfn); \
218 ((__n >= 0) ? (__pfn < NODE_DATA(__n)->node_start_pfn + \
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RB
219 NODE_DATA(__n)->node_spanned_pages) \
220 : 0); \
e53639d8
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221})
222
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223#endif
224
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ZLK
225#define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(virt_to_phys((void *) \
226 (kaddr))))
d3ce8843
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227
228extern int __virt_addr_valid(const volatile void *kaddr);
229#define virt_addr_valid(kaddr) \
230 __virt_addr_valid((const volatile void *) (kaddr))
1da177e4
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231
232#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
233 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
234
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235#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
236#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
1da177e4 237
a02036e7 238#include <asm-generic/memory_model.h>
5b17e1cd 239#include <asm-generic/getorder.h>
fd4fd5aa 240
1da177e4 241#endif /* _ASM_PAGE_H */