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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | */ | |
6 | #ifndef _ASM_PCI_H | |
7 | #define _ASM_PCI_H | |
8 | ||
1da177e4 LT |
9 | #include <linux/mm.h> |
10 | ||
11 | #ifdef __KERNEL__ | |
12 | ||
13 | /* | |
14 | * This file essentially defines the interface between board | |
15 | * specific PCI code and MIPS common PCI code. Should potentially put | |
16 | * into include/asm/pci.h file. | |
17 | */ | |
18 | ||
19 | #include <linux/ioport.h> | |
20 | ||
21 | /* | |
22 | * Each pci channel is a top-level PCI bus seem by CPU. A machine with | |
23 | * multiple PCI channels may have multiple PCI host controllers or a | |
24 | * single controller supporting multiple channels. | |
25 | */ | |
26 | struct pci_controller { | |
27 | struct pci_controller *next; | |
28 | struct pci_bus *bus; | |
29 | ||
30 | struct pci_ops *pci_ops; | |
31 | struct resource *mem_resource; | |
32 | unsigned long mem_offset; | |
33 | struct resource *io_resource; | |
34 | unsigned long io_offset; | |
140c1729 | 35 | unsigned long io_map_base; |
1da177e4 LT |
36 | |
37 | unsigned int index; | |
38 | /* For compatibility with current (as of July 2003) pciutils | |
39 | and XFree86. Eventually will be removed. */ | |
40 | unsigned int need_domain_info; | |
41 | ||
42 | int iommu; | |
8a1417de AI |
43 | |
44 | /* Optional access methods for reading/writing the bus number | |
45 | of the PCI controller */ | |
46 | int (*get_busno)(void); | |
47 | void (*set_busno)(int busno); | |
1da177e4 LT |
48 | }; |
49 | ||
50 | /* | |
51 | * Used by boards to register their PCI busses before the actual scanning. | |
52 | */ | |
53 | extern struct pci_controller * alloc_pci_controller(void); | |
54 | extern void register_pci_controller(struct pci_controller *hose); | |
55 | ||
56 | /* | |
57 | * board supplied pci irq fixup routine | |
58 | */ | |
19df0d11 | 59 | extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); |
1da177e4 LT |
60 | |
61 | ||
62 | /* Can be used to override the logic in pci_scan_bus for skipping | |
63 | already-configured bus numbers - to be used for buggy BIOSes | |
64 | or architectures with incomplete PCI setup by the loader */ | |
65 | ||
66 | extern unsigned int pcibios_assign_all_busses(void); | |
67 | ||
68 | #define pcibios_scan_all_fns(a, b) 0 | |
69 | ||
70 | extern unsigned long PCIBIOS_MIN_IO; | |
71 | extern unsigned long PCIBIOS_MIN_MEM; | |
72 | ||
73 | #define PCIBIOS_MIN_CARDBUS_IO 0x4000 | |
74 | ||
75 | extern void pcibios_set_master(struct pci_dev *dev); | |
76 | ||
c9c3e457 | 77 | static inline void pcibios_penalize_isa_irq(int irq, int active) |
1da177e4 LT |
78 | { |
79 | /* We don't do dynamic PCI IRQ allocation */ | |
80 | } | |
81 | ||
98873f53 RB |
82 | #define HAVE_PCI_MMAP |
83 | ||
84 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | |
85 | enum pci_mmap_state mmap_state, int write_combine); | |
86 | ||
1da177e4 LT |
87 | /* |
88 | * Dynamic DMA mapping stuff. | |
89 | * MIPS has everything mapped statically. | |
90 | */ | |
91 | ||
92 | #include <linux/types.h> | |
93 | #include <linux/slab.h> | |
94 | #include <asm/scatterlist.h> | |
95 | #include <linux/string.h> | |
96 | #include <asm/io.h> | |
97 | ||
98 | struct pci_dev; | |
99 | ||
100 | /* | |
101 | * The PCI address space does equal the physical memory address space. The | |
102 | * networking and block device layers use this boolean for bounce buffer | |
103 | * decisions. This is set if any hose does not have an IOMMU. | |
104 | */ | |
105 | extern unsigned int PCI_DMA_BUS_IS_PHYS; | |
106 | ||
4ce588cd | 107 | #ifdef CONFIG_DMA_NEED_PCI_MAP_STATE |
1da177e4 LT |
108 | |
109 | /* pci_unmap_{single,page} is not a nop, thus... */ | |
110 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME; | |
111 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME; | |
112 | #define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) | |
113 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) | |
114 | #define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) | |
115 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) | |
116 | ||
4ce588cd | 117 | #else /* CONFIG_DMA_NEED_PCI_MAP_STATE */ |
1da177e4 LT |
118 | |
119 | /* pci_unmap_{page,single} is a nop so... */ | |
120 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) | |
121 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) | |
122 | #define pci_unmap_addr(PTR, ADDR_NAME) (0) | |
123 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) | |
124 | #define pci_unmap_len(PTR, LEN_NAME) (0) | |
125 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) | |
126 | ||
4ce588cd | 127 | #endif /* CONFIG_DMA_NEED_PCI_MAP_STATE */ |
1da177e4 | 128 | |
bb4a61b6 | 129 | #ifdef CONFIG_PCI |
e24c2d96 DM |
130 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, |
131 | enum pci_dma_burst_strategy *strat, | |
132 | unsigned long *strategy_parameter) | |
133 | { | |
134 | *strat = PCI_DMA_BURST_INFINITY; | |
135 | *strategy_parameter = ~0UL; | |
136 | } | |
bb4a61b6 | 137 | #endif |
e24c2d96 | 138 | |
1da177e4 LT |
139 | extern void pcibios_resource_to_bus(struct pci_dev *dev, |
140 | struct pci_bus_region *region, struct resource *res); | |
870d3d98 RB |
141 | |
142 | extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, | |
143 | struct pci_bus_region *region); | |
144 | ||
145 | static inline struct resource * | |
146 | pcibios_select_root(struct pci_dev *pdev, struct resource *res) | |
147 | { | |
148 | struct resource *root = NULL; | |
149 | ||
150 | if (res->flags & IORESOURCE_IO) | |
151 | root = &ioport_resource; | |
152 | if (res->flags & IORESOURCE_MEM) | |
153 | root = &iomem_resource; | |
154 | ||
155 | return root; | |
156 | } | |
1da177e4 | 157 | |
1da177e4 LT |
158 | #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index |
159 | ||
160 | static inline int pci_proc_domain(struct pci_bus *bus) | |
161 | { | |
162 | struct pci_controller *hose = bus->sysdata; | |
163 | return hose->need_domain_info; | |
164 | } | |
165 | ||
1da177e4 LT |
166 | #endif /* __KERNEL__ */ |
167 | ||
168 | /* implement the pci_ DMA API in terms of the generic device dma_ one */ | |
169 | #include <asm-generic/pci-dma-compat.h> | |
170 | ||
1da177e4 LT |
171 | /* Do platform specific device initialization at pci_enable_device() time */ |
172 | extern int pcibios_plat_dev_init(struct pci_dev *dev); | |
173 | ||
5b1d221e RB |
174 | /* Chances are this interrupt is wired PC-style ... */ |
175 | static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) | |
176 | { | |
177 | return channel ? 15 : 14; | |
178 | } | |
179 | ||
af3e69cf | 180 | extern int pci_probe_only; |
af3e69cf | 181 | |
47a5c976 AN |
182 | extern char * (*pcibios_plat_setup)(char *str); |
183 | ||
1da177e4 | 184 | #endif /* _ASM_PCI_H */ |