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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | */ | |
6 | #ifndef _ASM_PCI_H | |
7 | #define _ASM_PCI_H | |
8 | ||
1da177e4 LT |
9 | #include <linux/mm.h> |
10 | ||
11 | #ifdef __KERNEL__ | |
12 | ||
13 | /* | |
14 | * This file essentially defines the interface between board | |
70342287 | 15 | * specific PCI code and MIPS common PCI code. Should potentially put |
1da177e4 LT |
16 | * into include/asm/pci.h file. |
17 | */ | |
18 | ||
19 | #include <linux/ioport.h> | |
23dac14d | 20 | #include <linux/list.h> |
a48cf37a | 21 | #include <linux/of.h> |
1da177e4 | 22 | |
c5611df9 PB |
23 | #ifdef CONFIG_PCI_DRIVERS_LEGACY |
24 | ||
1da177e4 | 25 | /* |
70342287 | 26 | * Each pci channel is a top-level PCI bus seem by CPU. A machine with |
1da177e4 LT |
27 | * multiple PCI channels may have multiple PCI host controllers or a |
28 | * single controller supporting multiple channels. | |
29 | */ | |
30 | struct pci_controller { | |
23dac14d | 31 | struct list_head list; |
1da177e4 | 32 | struct pci_bus *bus; |
a48cf37a | 33 | struct device_node *of_node; |
1da177e4 LT |
34 | |
35 | struct pci_ops *pci_ops; | |
36 | struct resource *mem_resource; | |
37 | unsigned long mem_offset; | |
38 | struct resource *io_resource; | |
39 | unsigned long io_offset; | |
140c1729 | 40 | unsigned long io_map_base; |
a2e50f53 JK |
41 | struct resource *busn_resource; |
42 | unsigned long busn_offset; | |
1da177e4 | 43 | |
88555b48 | 44 | #ifndef CONFIG_PCI_DOMAINS_GENERIC |
1da177e4 LT |
45 | unsigned int index; |
46 | /* For compatibility with current (as of July 2003) pciutils | |
47 | and XFree86. Eventually will be removed. */ | |
48 | unsigned int need_domain_info; | |
88555b48 | 49 | #endif |
1da177e4 | 50 | |
8a1417de AI |
51 | /* Optional access methods for reading/writing the bus number |
52 | of the PCI controller */ | |
53 | int (*get_busno)(void); | |
54 | void (*set_busno)(int busno); | |
1da177e4 LT |
55 | }; |
56 | ||
57 | /* | |
58 | * Used by boards to register their PCI busses before the actual scanning. | |
59 | */ | |
1da177e4 LT |
60 | extern void register_pci_controller(struct pci_controller *hose); |
61 | ||
62 | /* | |
63 | * board supplied pci irq fixup routine | |
64 | */ | |
19df0d11 | 65 | extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); |
1da177e4 | 66 | |
c5611df9 PB |
67 | /* Do platform specific device initialization at pci_enable_device() time */ |
68 | extern int pcibios_plat_dev_init(struct pci_dev *dev); | |
69 | ||
70 | extern char * (*pcibios_plat_setup)(char *str); | |
71 | ||
72 | #ifdef CONFIG_OF | |
73 | /* this function parses memory ranges from a device node */ | |
74 | extern void pci_load_of_ranges(struct pci_controller *hose, | |
75 | struct device_node *node); | |
76 | #else | |
77 | static inline void pci_load_of_ranges(struct pci_controller *hose, | |
78 | struct device_node *node) {} | |
79 | #endif | |
80 | ||
81 | #ifdef CONFIG_PCI_DOMAINS_GENERIC | |
82 | static inline void set_pci_need_domain_info(struct pci_controller *hose, | |
83 | int need_domain_info) | |
84 | { | |
85 | /* nothing to do */ | |
86 | } | |
87 | #elif defined(CONFIG_PCI_DOMAINS) | |
88 | static inline void set_pci_need_domain_info(struct pci_controller *hose, | |
89 | int need_domain_info) | |
90 | { | |
91 | hose->need_domain_info = need_domain_info; | |
92 | } | |
93 | #endif /* CONFIG_PCI_DOMAINS */ | |
94 | ||
95 | #endif | |
1da177e4 LT |
96 | |
97 | /* Can be used to override the logic in pci_scan_bus for skipping | |
98 | already-configured bus numbers - to be used for buggy BIOSes | |
99 | or architectures with incomplete PCI setup by the loader */ | |
ab96b031 PB |
100 | static inline unsigned int pcibios_assign_all_busses(void) |
101 | { | |
102 | return 1; | |
103 | } | |
1da177e4 | 104 | |
1da177e4 LT |
105 | extern unsigned long PCIBIOS_MIN_IO; |
106 | extern unsigned long PCIBIOS_MIN_MEM; | |
107 | ||
108 | #define PCIBIOS_MIN_CARDBUS_IO 0x4000 | |
109 | ||
110 | extern void pcibios_set_master(struct pci_dev *dev); | |
111 | ||
98873f53 RB |
112 | #define HAVE_PCI_MMAP |
113 | ||
114 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | |
115 | enum pci_mmap_state mmap_state, int write_combine); | |
116 | ||
4c2924b7 WG |
117 | #define HAVE_ARCH_PCI_RESOURCE_TO_USER |
118 | ||
1da177e4 LT |
119 | /* |
120 | * Dynamic DMA mapping stuff. | |
121 | * MIPS has everything mapped statically. | |
122 | */ | |
123 | ||
124 | #include <linux/types.h> | |
125 | #include <linux/slab.h> | |
84be456f | 126 | #include <linux/scatterlist.h> |
1da177e4 LT |
127 | #include <linux/string.h> |
128 | #include <asm/io.h> | |
129 | ||
130 | struct pci_dev; | |
131 | ||
132 | /* | |
e8b5325c SR |
133 | * The PCI address space does equal the physical memory address space. |
134 | * The networking and block device layers use this boolean for bounce | |
135 | * buffer decisions. | |
1da177e4 | 136 | */ |
e8b5325c | 137 | #define PCI_DMA_BUS_IS_PHYS (1) |
1da177e4 | 138 | |
88555b48 PB |
139 | #ifdef CONFIG_PCI_DOMAINS_GENERIC |
140 | static inline int pci_proc_domain(struct pci_bus *bus) | |
141 | { | |
142 | return pci_domain_nr(bus); | |
143 | } | |
88555b48 | 144 | #elif defined(CONFIG_PCI_DOMAINS) |
1da177e4 LT |
145 | #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index |
146 | ||
147 | static inline int pci_proc_domain(struct pci_bus *bus) | |
148 | { | |
149 | struct pci_controller *hose = bus->sysdata; | |
150 | return hose->need_domain_info; | |
151 | } | |
6fb8a163 | 152 | #endif /* CONFIG_PCI_DOMAINS */ |
1da177e4 | 153 | |
1da177e4 LT |
154 | #endif /* __KERNEL__ */ |
155 | ||
1da177e4 LT |
156 | /* Do platform specific device initialization at pci_enable_device() time */ |
157 | extern int pcibios_plat_dev_init(struct pci_dev *dev); | |
158 | ||
5b1d221e RB |
159 | /* Chances are this interrupt is wired PC-style ... */ |
160 | static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) | |
161 | { | |
162 | return channel ? 15 : 14; | |
163 | } | |
164 | ||
1da177e4 | 165 | #endif /* _ASM_PCI_H */ |