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1 | /* |
2 | * Copyright (C) 2014 Imagination Technologies | |
3 | * Author: Paul Burton <paul.burton@imgtec.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License as published by the | |
7 | * Free Software Foundation; either version 2 of the License, or (at your | |
8 | * option) any later version. | |
9 | */ | |
10 | ||
11 | #ifndef __MIPS_ASM_PM_CPS_H__ | |
12 | #define __MIPS_ASM_PM_CPS_H__ | |
13 | ||
14 | /* | |
15 | * The CM & CPC can only handle coherence & power control on a per-core basis, | |
929d4f51 | 16 | * thus in an MT system the VP(E)s within each core are coupled and can only |
3179d37e PB |
17 | * enter or exit states requiring CM or CPC assistance in unison. |
18 | */ | |
929d4f51 MR |
19 | #if defined(CONFIG_CPU_MIPSR6) |
20 | # define coupled_coherence cpu_has_vp | |
21 | #elif defined(CONFIG_MIPS_MT) | |
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22 | # define coupled_coherence cpu_has_mipsmt |
23 | #else | |
24 | # define coupled_coherence 0 | |
25 | #endif | |
26 | ||
27 | /* Enumeration of possible PM states */ | |
28 | enum cps_pm_state { | |
29 | CPS_PM_NC_WAIT, /* MIPS wait instruction, non-coherent */ | |
30 | CPS_PM_CLOCK_GATED, /* Core clock gated */ | |
31 | CPS_PM_POWER_GATED, /* Core power gated */ | |
32 | CPS_PM_STATE_COUNT, | |
33 | }; | |
34 | ||
35 | /** | |
36 | * cps_pm_support_state - determine whether the system supports a PM state | |
37 | * @state: the state to test for support | |
38 | * | |
39 | * Returns true if the system supports the given state, otherwise false. | |
40 | */ | |
41 | extern bool cps_pm_support_state(enum cps_pm_state state); | |
42 | ||
43 | /** | |
44 | * cps_pm_enter_state - enter a PM state | |
45 | * @state: the state to enter | |
46 | * | |
47 | * Enter the given PM state. If coupled_coherence is non-zero then it is | |
48 | * expected that this function be called at approximately the same time on | |
49 | * each coupled CPU. Returns 0 on successful entry & exit, otherwise -errno. | |
50 | */ | |
51 | extern int cps_pm_enter_state(enum cps_pm_state state); | |
52 | ||
53 | #endif /* __MIPS_ASM_PM_CPS_H__ */ |