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1 | /****************************************************************** |
2 | * Copyright (c) 2000-2007 PMC-Sierra INC. | |
3 | * | |
4 | * This program is free software; you can redistribute it | |
5 | * and/or modify it under the terms of the GNU General | |
6 | * Public License as published by the Free Software | |
7 | * Foundation; either version 2 of the License, or (at your | |
8 | * option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be | |
11 | * useful, but WITHOUT ANY WARRANTY; without even the implied | |
12 | * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR | |
13 | * PURPOSE. See the GNU General Public License for more | |
14 | * details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public | |
17 | * License along with this program; if not, write to the Free | |
18 | * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA | |
19 | * 02139, USA. | |
20 | * | |
21 | * PMC-SIERRA INC. DISCLAIMS ANY LIABILITY OF ANY KIND | |
22 | * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS | |
23 | * SOFTWARE. | |
24 | */ | |
25 | #ifndef MSP_USB_H_ | |
26 | #define MSP_USB_H_ | |
27 | ||
28 | #ifdef CONFIG_MSP_HAS_DUAL_USB | |
29 | #define NUM_USB_DEVS 2 | |
30 | #else | |
31 | #define NUM_USB_DEVS 1 | |
32 | #endif | |
33 | ||
34 | /* Register spaces for USB host 0 */ | |
35 | #define MSP_USB0_MAB_START (MSP_USB0_BASE + 0x0) | |
36 | #define MSP_USB0_MAB_END (MSP_USB0_BASE + 0x17) | |
37 | #define MSP_USB0_ID_START (MSP_USB0_BASE + 0x40000) | |
38 | #define MSP_USB0_ID_END (MSP_USB0_BASE + 0x4008f) | |
39 | #define MSP_USB0_HS_START (MSP_USB0_BASE + 0x40100) | |
40 | #define MSP_USB0_HS_END (MSP_USB0_BASE + 0x401FF) | |
41 | ||
42 | /* Register spaces for USB host 1 */ | |
70342287 | 43 | #define MSP_USB1_MAB_START (MSP_USB1_BASE + 0x0) |
5027070b A |
44 | #define MSP_USB1_MAB_END (MSP_USB1_BASE + 0x17) |
45 | #define MSP_USB1_ID_START (MSP_USB1_BASE + 0x40000) | |
46 | #define MSP_USB1_ID_END (MSP_USB1_BASE + 0x4008f) | |
47 | #define MSP_USB1_HS_START (MSP_USB1_BASE + 0x40100) | |
48 | #define MSP_USB1_HS_END (MSP_USB1_BASE + 0x401ff) | |
49 | ||
50 | /* USB Identification registers */ | |
51 | struct msp_usbid_regs { | |
52 | u32 id; /* 0x0: Identification register */ | |
53 | u32 hwgen; /* 0x4: General HW params */ | |
54 | u32 hwhost; /* 0x8: Host HW params */ | |
55 | u32 hwdev; /* 0xc: Device HW params */ | |
56 | u32 hwtxbuf; /* 0x10: Tx buffer HW params */ | |
57 | u32 hwrxbuf; /* 0x14: Rx buffer HW params */ | |
58 | u32 reserved[26]; | |
59 | u32 timer0_load; /* 0x80: General-purpose timer 0 load*/ | |
60 | u32 timer0_ctrl; /* 0x84: General-purpose timer 0 control */ | |
61 | u32 timer1_load; /* 0x88: General-purpose timer 1 load*/ | |
62 | u32 timer1_ctrl; /* 0x8c: General-purpose timer 1 control */ | |
63 | }; | |
64 | ||
65 | /* MSBus to AMBA registers */ | |
66 | struct msp_mab_regs { | |
67 | u32 isr; /* 0x0: Interrupt status */ | |
68 | u32 imr; /* 0x4: Interrupt mask */ | |
69 | u32 thcr0; /* 0x8: Transaction header capture 0 */ | |
70 | u32 thcr1; /* 0xc: Transaction header capture 1 */ | |
71 | u32 int_stat; /* 0x10: Interrupt status summary */ | |
72 | u32 phy_cfg; /* 0x14: USB phy config */ | |
73 | }; | |
74 | ||
75 | /* EHCI registers */ | |
76 | struct msp_usbhs_regs { | |
77 | u32 hciver; /* 0x0: Version and offset to operational regs */ | |
78 | u32 hcsparams; /* 0x4: Host control structural parameters */ | |
79 | u32 hccparams; /* 0x8: Host control capability parameters */ | |
80 | u32 reserved0[5]; | |
81 | u32 dciver; /* 0x20: Device interface version */ | |
82 | u32 dccparams; /* 0x24: Device control capability parameters */ | |
83 | u32 reserved1[6]; | |
84 | u32 cmd; /* 0x40: USB command */ | |
85 | u32 sts; /* 0x44: USB status */ | |
86 | u32 int_ena; /* 0x48: USB interrupt enable */ | |
87 | u32 frindex; /* 0x4c: Frame index */ | |
88 | u32 reserved3; | |
89 | union { | |
90 | struct { | |
91 | u32 flb_addr; /* 0x54: Frame list base address */ | |
92 | u32 next_async_addr; /* 0x58: next asynchronous addr */ | |
93 | u32 ttctrl; /* 0x5c: embedded transaction translator | |
94 | async buffer status */ | |
95 | u32 burst_size; /* 0x60: Controller burst size */ | |
96 | u32 tx_fifo_ctrl; /* 0x64: Tx latency FIFO tuning */ | |
97 | u32 reserved0[4]; | |
98 | u32 endpt_nak; /* 0x78: Endpoint NAK */ | |
99 | u32 endpt_nak_ena; /* 0x7c: Endpoint NAK enable */ | |
100 | u32 cfg_flag; /* 0x80: Config flag */ | |
101 | u32 port_sc1; /* 0x84: Port status & control 1 */ | |
102 | u32 reserved1[7]; | |
103 | u32 otgsc; /* 0xa4: OTG status & control */ | |
104 | u32 mode; /* 0xa8: USB controller mode */ | |
105 | } host; | |
106 | ||
107 | struct { | |
108 | u32 dev_addr; /* 0x54: Device address */ | |
109 | u32 endpt_list_addr; /* 0x58: Endpoint list address */ | |
110 | u32 reserved0[7]; | |
111 | u32 endpt_nak; /* 0x74 */ | |
112 | u32 endpt_nak_ctrl; /* 0x78 */ | |
113 | u32 cfg_flag; /* 0x80 */ | |
114 | u32 port_sc1; /* 0x84: Port status & control 1 */ | |
115 | u32 reserved[7]; | |
116 | u32 otgsc; /* 0xa4: OTG status & control */ | |
117 | u32 mode; /* 0xa8: USB controller mode */ | |
118 | u32 endpt_setup_stat; /* 0xac */ | |
119 | u32 endpt_prime; /* 0xb0 */ | |
120 | u32 endpt_flush; /* 0xb4 */ | |
121 | u32 endpt_stat; /* 0xb8 */ | |
122 | u32 endpt_complete; /* 0xbc */ | |
123 | u32 endpt_ctrl0; /* 0xc0 */ | |
124 | u32 endpt_ctrl1; /* 0xc4 */ | |
125 | u32 endpt_ctrl2; /* 0xc8 */ | |
126 | u32 endpt_ctrl3; /* 0xcc */ | |
127 | } device; | |
128 | } u; | |
129 | }; | |
130 | /* | |
131 | * Container for the more-generic platform_device. | |
132 | * This exists mainly as a way to map the non-standard register | |
133 | * spaces and make them accessible to the USB ISR. | |
134 | */ | |
135 | struct mspusb_device { | |
136 | struct msp_mab_regs __iomem *mab_regs; | |
137 | struct msp_usbid_regs __iomem *usbid_regs; | |
138 | struct msp_usbhs_regs __iomem *usbhs_regs; | |
139 | struct platform_device dev; | |
140 | }; | |
141 | ||
142 | #define to_mspusb_device(x) container_of((x), struct mspusb_device, dev) | |
143 | #define TO_HOST_ID(x) ((x) & 0x3) | |
144 | #endif /*MSP_USB_H_*/ |