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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General | |
3 | * Public License. See the file "COPYING" in the main directory of this | |
4 | * archive for more details. | |
5 | * | |
6 | * Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com) | |
7 | * Copyright (C) 2000 - 2001 by Silicon Graphics, Inc. | |
8 | * Copyright (C) 2000, 2001, 2002 Ralf Baechle | |
9 | * Copyright (C) 2000, 2001 Broadcom Corporation | |
10 | */ | |
11 | #ifndef __ASM_SMP_H | |
12 | #define __ASM_SMP_H | |
13 | ||
1da177e4 LT |
14 | #include <linux/bitops.h> |
15 | #include <linux/linkage.h> | |
631330f5 | 16 | #include <linux/smp.h> |
1da177e4 LT |
17 | #include <linux/threads.h> |
18 | #include <linux/cpumask.h> | |
87353d8a | 19 | |
60063497 | 20 | #include <linux/atomic.h> |
87353d8a | 21 | #include <asm/smp-ops.h> |
1da177e4 | 22 | |
0ab7aefc RB |
23 | extern int smp_num_siblings; |
24 | extern cpumask_t cpu_sibling_map[]; | |
25 | ||
39c715b7 | 26 | #define raw_smp_processor_id() (current_thread_info()->cpu) |
1da177e4 LT |
27 | |
28 | /* Map from cpu id to sequential logical cpu number. This will only | |
29 | not be idempotent when cpus failed to come on-line. */ | |
30 | extern int __cpu_number_map[NR_CPUS]; | |
31 | #define cpu_number_map(cpu) __cpu_number_map[cpu] | |
32 | ||
33 | /* The reverse map from sequential logical cpu number to cpu id. */ | |
34 | extern int __cpu_logical_map[NR_CPUS]; | |
35 | #define cpu_logical_map(cpu) __cpu_logical_map[cpu] | |
36 | ||
37 | #define NO_PROC_ID (-1) | |
38 | ||
1da177e4 LT |
39 | #define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */ |
40 | #define SMP_CALL_FUNCTION 0x2 | |
ddcdb1b4 DD |
41 | /* Octeon - Tell another core to flush its icache */ |
42 | #define SMP_ICACHE_FLUSH 0x4 | |
7aa1c8f4 RB |
43 | /* Used by kexec crashdump to save all cpu's state */ |
44 | #define SMP_DUMP 0x8 | |
ddcdb1b4 | 45 | |
773cb77d | 46 | extern volatile cpumask_t cpu_callin_map; |
1da177e4 | 47 | |
1da177e4 LT |
48 | extern void asmlinkage smp_bootstrap(void); |
49 | ||
50 | /* | |
51 | * this function sends a 'reschedule' IPI to another CPU. | |
52 | * it goes straight through and wastes no time serializing | |
53 | * anything. Worst case is that we lose a reschedule ... | |
54 | */ | |
55 | static inline void smp_send_reschedule(int cpu) | |
56 | { | |
87353d8a RB |
57 | extern struct plat_smp_ops *mp_ops; /* private */ |
58 | ||
59 | mp_ops->send_ipi_single(cpu, SMP_RESCHEDULE_YOURSELF); | |
1da177e4 LT |
60 | } |
61 | ||
1b2bc75c RB |
62 | #ifdef CONFIG_HOTPLUG_CPU |
63 | static inline int __cpu_disable(void) | |
64 | { | |
65 | extern struct plat_smp_ops *mp_ops; /* private */ | |
66 | ||
67 | return mp_ops->cpu_disable(); | |
68 | } | |
69 | ||
70 | static inline void __cpu_die(unsigned int cpu) | |
71 | { | |
72 | extern struct plat_smp_ops *mp_ops; /* private */ | |
73 | ||
74 | mp_ops->cpu_die(cpu); | |
75 | } | |
76 | ||
77 | extern void play_dead(void); | |
78 | #endif | |
79 | ||
1da177e4 LT |
80 | extern asmlinkage void smp_call_function_interrupt(void); |
81 | ||
eef34ec5 RB |
82 | static inline void arch_send_call_function_single_ipi(int cpu) |
83 | { | |
84 | extern struct plat_smp_ops *mp_ops; /* private */ | |
85 | ||
86 | mp_ops->send_ipi_mask(&cpumask_of_cpu(cpu), SMP_CALL_FUNCTION); | |
87 | } | |
88 | ||
89 | static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask) | |
90 | { | |
91 | extern struct plat_smp_ops *mp_ops; /* private */ | |
92 | ||
93 | mp_ops->send_ipi_mask(mask, SMP_CALL_FUNCTION); | |
94 | } | |
2f304c0a | 95 | |
7aa1c8f4 RB |
96 | #if defined(CONFIG_KEXEC) |
97 | extern void (*dump_ipi_function_ptr)(void *); | |
98 | void dump_send_ipi(void (*dump_ipi_callback)(void *)); | |
99 | #endif | |
1da177e4 | 100 | #endif /* __ASM_SMP_H */ |