[mirror_ubuntu-bionic-kernel.git] / arch / mips / kernel / entry.S

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
 * Copyright (C) 2001 MIPS Technologies, Inc.
 */

#include <asm/asm.h>
#include <asm/asmmacro.h>
#include <asm/regdef.h>
#include <asm/mipsregs.h>
#include <asm/stackframe.h>
#include <asm/isadep.h>
#include <asm/thread_info.h>
#include <asm/war.h>
#ifdef CONFIG_MIPS_MT_SMTC
#include <asm/mipsmtregs.h>
#endif

#ifdef CONFIG_PREEMPT
	.macro	preempt_stop
	.endm
#else
	.macro	preempt_stop
	local_irq_disable
	.endm
#define resume_kernel	restore_all
#endif

	.text
	.align	5
FEXPORT(ret_from_exception)
	preempt_stop
FEXPORT(ret_from_irq)
	LONG_L	t0, PT_STATUS(sp)		# returning to kernel mode?
	andi	t0, t0, KU_USER
	beqz	t0, resume_kernel

resume_userspace:
	local_irq_disable		# make sure we dont miss an
					# interrupt setting need_resched
					# between sampling and return
	LONG_L	a2, TI_FLAGS($28)	# current->work
	andi	t0, a2, _TIF_WORK_MASK	# (ignoring syscall_trace)
	bnez	t0, work_pending
	j	restore_all

#ifdef CONFIG_PREEMPT
resume_kernel:
	local_irq_disable
	lw	t0, TI_PRE_COUNT($28)
	bnez	t0, restore_all
need_resched:
	LONG_L	t0, TI_FLAGS($28)
	andi	t1, t0, _TIF_NEED_RESCHED
	beqz	t1, restore_all
	LONG_L	t0, PT_STATUS(sp)		# Interrupts off?
	andi	t0, 1
	beqz	t0, restore_all
	jal	preempt_schedule_irq
	b	need_resched
#endif

FEXPORT(ret_from_fork)
	jal	schedule_tail		# a0 = struct task_struct *prev

FEXPORT(syscall_exit)
	local_irq_disable		# make sure need_resched and
					# signals dont change between
					# sampling and return
	LONG_L	a2, TI_FLAGS($28)	# current->work
	li	t0, _TIF_ALLWORK_MASK
	and	t0, a2, t0
	bnez	t0, syscall_exit_work

FEXPORT(restore_all)			# restore full frame
#ifdef CONFIG_MIPS_MT_SMTC
/* Detect and execute deferred IPI "interrupts" */
	jal	deferred_smtc_ipi
/* Re-arm any temporarily masked interrupts not explicitly "acked" */
	mfc0	v0, CP0_TCSTATUS
	ori	v1, v0, TCSTATUS_IXMT
	mtc0	v1, CP0_TCSTATUS
	andi	v0, TCSTATUS_IXMT
	_ehb
	mfc0	t0, CP0_TCCONTEXT
	DMT	9				# dmt t1
	jal	mips_ihb
	mfc0	t2, CP0_STATUS
	andi	t3, t0, 0xff00
	or	t2, t2, t3
	mtc0	t2, CP0_STATUS
	_ehb
	andi	t1, t1, VPECONTROL_TE
	beqz	t1, 1f
	EMT
1:
	mfc0	v1, CP0_TCSTATUS
	/* We set IXMT above, XOR should clear it here */
	xori	v1, v1, TCSTATUS_IXMT
	or	v1, v0, v1
	mtc0	v1, CP0_TCSTATUS
	_ehb
	xor	t0, t0, t3
	mtc0	t0, CP0_TCCONTEXT
#endif /* CONFIG_MIPS_MT_SMTC */
	.set	noat
	RESTORE_TEMP
	RESTORE_AT
	RESTORE_STATIC
FEXPORT(restore_partial)		# restore partial frame
#ifdef CONFIG_TRACE_IRQFLAGS
	SAVE_STATIC
	SAVE_AT
	SAVE_TEMP
	LONG_L	v0, PT_STATUS(sp)
	and	v0, 1
	beqz	v0, 1f
	jal	trace_hardirqs_on
	b	2f
1:	jal	trace_hardirqs_off
2:
	RESTORE_TEMP
	RESTORE_AT
	RESTORE_STATIC
#endif
	RESTORE_SOME
	RESTORE_SP_AND_RET
	.set	at

work_pending:
	andi	t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
	beqz	t0, work_notifysig
work_resched:
	jal	schedule

	local_irq_disable		# make sure need_resched and
					# signals dont change between
					# sampling and return
	LONG_L	a2, TI_FLAGS($28)
	andi	t0, a2, _TIF_WORK_MASK	# is there any work to be done
					# other than syscall tracing?
	beqz	t0, restore_all
	andi	t0, a2, _TIF_NEED_RESCHED
	bnez	t0, work_resched

work_notifysig:				# deal with pending signals and
					# notify-resume requests
	move	a0, sp
	li	a1, 0
	jal	do_notify_resume	# a2 already loaded
	j	resume_userspace

FEXPORT(syscall_exit_work_partial)
	SAVE_STATIC
syscall_exit_work:
	li	t0, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT
	and	t0, a2			# a2 is preloaded with TI_FLAGS
	beqz	t0, work_pending	# trace bit set?
	local_irq_enable		# could let do_syscall_trace()
					# call schedule() instead
	move	a0, sp
	li	a1, 1
	jal	do_syscall_trace
	b	resume_userspace

#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT)

/*
 * MIPS32R2 Instruction Hazard Barrier - must be called
 *
 * For C code use the inline version named instruction_hazard().
 */
LEAF(mips_ihb)
	.set	mips32r2
	jr.hb	ra
	nop
	END(mips_ihb)

#endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
	7	* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
	8	* Copyright (C) 2001 MIPS Technologies, Inc.
	9	*/
1da177e4 LT	10
	11	#include <asm/asm.h>
	12	#include <asm/asmmacro.h>
	13	#include <asm/regdef.h>
	14	#include <asm/mipsregs.h>
	15	#include <asm/stackframe.h>
	16	#include <asm/isadep.h>
	17	#include <asm/thread_info.h>
	18	#include <asm/war.h>
41c594ab RB	19	#ifdef CONFIG_MIPS_MT_SMTC
	20	#include <asm/mipsmtregs.h>
	21	#endif
1da177e4 LT	22
1da177e4 LT	23	#ifdef CONFIG_PREEMPT
c2648527	24	.macro preempt_stop
1da177e4 LT	25	.endm
1da177e4 LT	26	#else
c2648527 TS	27	.macro preempt_stop
c2648527 TS	28	local_irq_disable
1da177e4 LT	29	.endm
	30	#define resume_kernel restore_all
	31	#endif
	32
	33	.text
	34	.align 5
	35	FEXPORT(ret_from_exception)
	36	preempt_stop
	37	FEXPORT(ret_from_irq)
	38	LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
	39	andi t0, t0, KU_USER
	40	beqz t0, resume_kernel
	41
c2648527 TS	42	resume_userspace:
c2648527 TS	43	local_irq_disable # make sure we dont miss an
1da177e4 LT	44	# interrupt setting need_resched
	45	# between sampling and return
	46	LONG_L a2, TI_FLAGS($28) # current->work
c2648527 TS	47	andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace)
c2648527 TS	48	bnez t0, work_pending
1da177e4 LT	49	j restore_all
	50
	51	#ifdef CONFIG_PREEMPT
c2648527	52	resume_kernel:
a18815ab	53	local_irq_disable
1da177e4 LT	54	lw t0, TI_PRE_COUNT($28)
	55	bnez t0, restore_all
	56	need_resched:
	57	LONG_L t0, TI_FLAGS($28)
	58	andi t1, t0, _TIF_NEED_RESCHED
	59	beqz t1, restore_all
	60	LONG_L t0, PT_STATUS(sp) # Interrupts off?
	61	andi t0, 1
	62	beqz t0, restore_all
a18815ab	63	jal preempt_schedule_irq
cdaed73a	64	b need_resched
1da177e4 LT	65	#endif
	66
	67	FEXPORT(ret_from_fork)
36c8b586	68	jal schedule_tail # a0 = struct task_struct *prev
1da177e4 LT	69
	70	FEXPORT(syscall_exit)
	71	local_irq_disable # make sure need_resched and
	72	# signals dont change between
	73	# sampling and return
	74	LONG_L a2, TI_FLAGS($28) # current->work
	75	li t0, _TIF_ALLWORK_MASK
	76	and t0, a2, t0
	77	bnez t0, syscall_exit_work
	78
	79	FEXPORT(restore_all) # restore full frame
41c594ab RB	80	#ifdef CONFIG_MIPS_MT_SMTC
41c594ab RB	81	/* Detect and execute deferred IPI "interrupts" */
41c594ab RB	82	jal deferred_smtc_ipi
	83	/* Re-arm any temporarily masked interrupts not explicitly "acked" */
	84	mfc0 v0, CP0_TCSTATUS
	85	ori v1, v0, TCSTATUS_IXMT
	86	mtc0 v1, CP0_TCSTATUS
	87	andi v0, TCSTATUS_IXMT
4277ff5e	88	_ehb
41c594ab RB	89	mfc0 t0, CP0_TCCONTEXT
	90	DMT 9 # dmt t1
	91	jal mips_ihb
	92	mfc0 t2, CP0_STATUS
	93	andi t3, t0, 0xff00
	94	or t2, t2, t3
	95	mtc0 t2, CP0_STATUS
4277ff5e	96	_ehb
41c594ab RB	97	andi t1, t1, VPECONTROL_TE
	98	beqz t1, 1f
	99	EMT
	100	1:
	101	mfc0 v1, CP0_TCSTATUS
477654fc	102	/* We set IXMT above, XOR should clear it here */
41c594ab RB	103	xori v1, v1, TCSTATUS_IXMT
	104	or v1, v0, v1
	105	mtc0 v1, CP0_TCSTATUS
4277ff5e	106	_ehb
41c594ab RB	107	xor t0, t0, t3
	108	mtc0 t0, CP0_TCCONTEXT
	109	#endif /* CONFIG_MIPS_MT_SMTC */
1da177e4 LT	110	.set noat
	111	RESTORE_TEMP
	112	RESTORE_AT
	113	RESTORE_STATIC
	114	FEXPORT(restore_partial) # restore partial frame
192ef366 RB	115	#ifdef CONFIG_TRACE_IRQFLAGS
	116	SAVE_STATIC
	117	SAVE_AT
	118	SAVE_TEMP
	119	LONG_L v0, PT_STATUS(sp)
	120	and v0, 1
	121	beqz v0, 1f
	122	jal trace_hardirqs_on
	123	b 2f
	124	1: jal trace_hardirqs_off
	125	2:
	126	RESTORE_TEMP
	127	RESTORE_AT
	128	RESTORE_STATIC
	129	#endif
1da177e4 LT	130	RESTORE_SOME
	131	RESTORE_SP_AND_RET
	132	.set at
	133
c2648527 TS	134	work_pending:
c2648527 TS	135	andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
1da177e4 LT	136	beqz t0, work_notifysig
	137	work_resched:
	138	jal schedule
	139
c2648527	140	local_irq_disable # make sure need_resched and
1da177e4 LT	141	# signals dont change between
	142	# sampling and return
	143	LONG_L a2, TI_FLAGS($28)
	144	andi t0, a2, _TIF_WORK_MASK # is there any work to be done
	145	# other than syscall tracing?
	146	beqz t0, restore_all
	147	andi t0, a2, _TIF_NEED_RESCHED
	148	bnez t0, work_resched
	149
	150	work_notifysig: # deal with pending signals and
	151	# notify-resume requests
	152	move a0, sp
	153	li a1, 0
	154	jal do_notify_resume # a2 already loaded
0bf0e3e2	155	j resume_userspace
1da177e4 LT	156
	157	FEXPORT(syscall_exit_work_partial)
	158	SAVE_STATIC
c2648527 TS	159	syscall_exit_work:
	160	li t0, _TIF_SYSCALL_TRACE \| _TIF_SYSCALL_AUDIT
	161	and t0, a2 # a2 is preloaded with TI_FLAGS
	162	beqz t0, work_pending # trace bit set?
1da177e4 LT	163	local_irq_enable # could let do_syscall_trace()
	164	# call schedule() instead
	165	move a0, sp
	166	li a1, 1
	167	jal do_syscall_trace
	168	b resume_userspace
bce1a286 RB	169
	170	#if defined(CONFIG_CPU_MIPSR2) \|\| defined(CONFIG_MIPS_MT)
	171
	172	/*
	173	* MIPS32R2 Instruction Hazard Barrier - must be called
	174	*
	175	* For C code use the inline version named instruction_hazard().
	176	*/
	177	LEAF(mips_ihb)
	178	.set mips32r2
	179	jr.hb ra
	180	nop
	181	END(mips_ihb)
	182
	183	#endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */