[mirror_ubuntu-bionic-kernel.git] / arch / mips / kernel / entry.S

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
 * Copyright (C) 2001 MIPS Technologies, Inc.
 */

#include <asm/asm.h>
#include <asm/asmmacro.h>
#include <asm/regdef.h>
#include <asm/mipsregs.h>
#include <asm/stackframe.h>
#include <asm/isadep.h>
#include <asm/thread_info.h>
#include <asm/war.h>
#ifdef CONFIG_MIPS_MT_SMTC
#include <asm/mipsmtregs.h>
#endif

#ifndef CONFIG_PREEMPT
#define resume_kernel	restore_all
#else
#define __ret_from_irq	ret_from_exception
#endif

	.text
	.align	5
#ifndef CONFIG_PREEMPT
FEXPORT(ret_from_exception)
	local_irq_disable			# preempt stop
	b	__ret_from_irq
#endif
FEXPORT(ret_from_irq)
	LONG_S	s0, TI_REGS($28)
FEXPORT(__ret_from_irq)
	LONG_L	t0, PT_STATUS(sp)		# returning to kernel mode?
	andi	t0, t0, KU_USER
	beqz	t0, resume_kernel

resume_userspace:
	local_irq_disable		# make sure we dont miss an
					# interrupt setting need_resched
					# between sampling and return
	LONG_L	a2, TI_FLAGS($28)	# current->work
	andi	t0, a2, _TIF_WORK_MASK	# (ignoring syscall_trace)
	bnez	t0, work_pending
	j	restore_all

#ifdef CONFIG_PREEMPT
resume_kernel:
	local_irq_disable
	lw	t0, TI_PRE_COUNT($28)
	bnez	t0, restore_all
need_resched:
	LONG_L	t0, TI_FLAGS($28)
	andi	t1, t0, _TIF_NEED_RESCHED
	beqz	t1, restore_all
	LONG_L	t0, PT_STATUS(sp)		# Interrupts off?
	andi	t0, 1
	beqz	t0, restore_all
	jal	preempt_schedule_irq
	b	need_resched
#endif

FEXPORT(ret_from_fork)
	jal	schedule_tail		# a0 = struct task_struct *prev

FEXPORT(syscall_exit)
	local_irq_disable		# make sure need_resched and
					# signals dont change between
					# sampling and return
	LONG_L	a2, TI_FLAGS($28)	# current->work
	li	t0, _TIF_ALLWORK_MASK
	and	t0, a2, t0
	bnez	t0, syscall_exit_work

restore_all:				# restore full frame
#ifdef CONFIG_MIPS_MT_SMTC
#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
/* Re-arm any temporarily masked interrupts not explicitly "acked" */
	mfc0	v0, CP0_TCSTATUS
	ori	v1, v0, TCSTATUS_IXMT
	mtc0	v1, CP0_TCSTATUS
	andi	v0, TCSTATUS_IXMT
	_ehb
	mfc0	t0, CP0_TCCONTEXT
	DMT	9				# dmt t1
	jal	mips_ihb
	mfc0	t2, CP0_STATUS
	andi	t3, t0, 0xff00
	or	t2, t2, t3
	mtc0	t2, CP0_STATUS
	_ehb
	andi	t1, t1, VPECONTROL_TE
	beqz	t1, 1f
	EMT
1:
	mfc0	v1, CP0_TCSTATUS
	/* We set IXMT above, XOR should clear it here */
	xori	v1, v1, TCSTATUS_IXMT
	or	v1, v0, v1
	mtc0	v1, CP0_TCSTATUS
	_ehb
	xor	t0, t0, t3
	mtc0	t0, CP0_TCCONTEXT
#endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */
/* Detect and execute deferred IPI "interrupts" */
	LONG_L	s0, TI_REGS($28)
	LONG_S	sp, TI_REGS($28)
	jal	deferred_smtc_ipi
	LONG_S	s0, TI_REGS($28)
#endif /* CONFIG_MIPS_MT_SMTC */
	.set	noat
	RESTORE_TEMP
	RESTORE_AT
	RESTORE_STATIC
restore_partial:		# restore partial frame
#ifdef CONFIG_TRACE_IRQFLAGS
	SAVE_STATIC
	SAVE_AT
	SAVE_TEMP
	LONG_L	v0, PT_STATUS(sp)
#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
	and	v0, ST0_IEP
#else
	and	v0, ST0_IE
#endif
	beqz	v0, 1f
	jal	trace_hardirqs_on
	b	2f
1:	jal	trace_hardirqs_off
2:
	RESTORE_TEMP
	RESTORE_AT
	RESTORE_STATIC
#endif
	RESTORE_SOME
	RESTORE_SP_AND_RET
	.set	at

work_pending:
	andi	t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
	beqz	t0, work_notifysig
work_resched:
	jal	schedule

	local_irq_disable		# make sure need_resched and
					# signals dont change between
					# sampling and return
	LONG_L	a2, TI_FLAGS($28)
	andi	t0, a2, _TIF_WORK_MASK	# is there any work to be done
					# other than syscall tracing?
	beqz	t0, restore_all
	andi	t0, a2, _TIF_NEED_RESCHED
	bnez	t0, work_resched

work_notifysig:				# deal with pending signals and
					# notify-resume requests
	move	a0, sp
	li	a1, 0
	jal	do_notify_resume	# a2 already loaded
	j	resume_userspace

FEXPORT(syscall_exit_partial)
	local_irq_disable		# make sure need_resched doesn't
					# change between and return
	LONG_L	a2, TI_FLAGS($28)	# current->work
	li	t0, _TIF_ALLWORK_MASK
	and	t0, a2
	beqz	t0, restore_partial
	SAVE_STATIC
syscall_exit_work:
	LONG_L	t0, PT_STATUS(sp)		# returning to kernel mode?
	andi	t0, t0, KU_USER
	beqz	t0, resume_kernel
	li	t0, _TIF_WORK_SYSCALL_EXIT
	and	t0, a2			# a2 is preloaded with TI_FLAGS
	beqz	t0, work_pending	# trace bit set?
	local_irq_enable		# could let syscall_trace_leave()
					# call schedule() instead
	move	a0, sp
	jal	syscall_trace_leave
	b	resume_userspace

#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT)

/*
 * MIPS32R2 Instruction Hazard Barrier - must be called
 *
 * For C code use the inline version named instruction_hazard().
 */
LEAF(mips_ihb)
	.set	mips32r2
	jr.hb	ra
	nop
	END(mips_ihb)

#endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
	7	* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
	8	* Copyright (C) 2001 MIPS Technologies, Inc.
	9	*/
1da177e4 LT	10
	11	#include <asm/asm.h>
	12	#include <asm/asmmacro.h>
	13	#include <asm/regdef.h>
	14	#include <asm/mipsregs.h>
	15	#include <asm/stackframe.h>
	16	#include <asm/isadep.h>
	17	#include <asm/thread_info.h>
	18	#include <asm/war.h>
41c594ab RB	19	#ifdef CONFIG_MIPS_MT_SMTC
	20	#include <asm/mipsmtregs.h>
	21	#endif
1da177e4	22
f431baa5	23	#ifndef CONFIG_PREEMPT
1da177e4	24	#define resume_kernel restore_all
7da8a581 FBH	25	#else
7da8a581 FBH	26	#define __ret_from_irq ret_from_exception
1da177e4 LT	27	#endif
	28
	29	.text
	30	.align 5
7da8a581	31	#ifndef CONFIG_PREEMPT
1da177e4	32	FEXPORT(ret_from_exception)
7da8a581 FBH	33	local_irq_disable # preempt stop
7da8a581 FBH	34	b __ret_from_irq
f431baa5	35	#endif
7da8a581 FBH	36	FEXPORT(ret_from_irq)
	37	LONG_S s0, TI_REGS($28)
	38	FEXPORT(__ret_from_irq)
1da177e4 LT	39	LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
	40	andi t0, t0, KU_USER
	41	beqz t0, resume_kernel
	42
c2648527 TS	43	resume_userspace:
c2648527 TS	44	local_irq_disable # make sure we dont miss an
1da177e4 LT	45	# interrupt setting need_resched
	46	# between sampling and return
	47	LONG_L a2, TI_FLAGS($28) # current->work
c2648527 TS	48	andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace)
c2648527 TS	49	bnez t0, work_pending
1da177e4 LT	50	j restore_all
	51
	52	#ifdef CONFIG_PREEMPT
c2648527	53	resume_kernel:
a18815ab	54	local_irq_disable
1da177e4 LT	55	lw t0, TI_PRE_COUNT($28)
	56	bnez t0, restore_all
	57	need_resched:
	58	LONG_L t0, TI_FLAGS($28)
	59	andi t1, t0, _TIF_NEED_RESCHED
	60	beqz t1, restore_all
	61	LONG_L t0, PT_STATUS(sp) # Interrupts off?
	62	andi t0, 1
	63	beqz t0, restore_all
a18815ab	64	jal preempt_schedule_irq
cdaed73a	65	b need_resched
1da177e4 LT	66	#endif
	67
	68	FEXPORT(ret_from_fork)
36c8b586	69	jal schedule_tail # a0 = struct task_struct *prev
1da177e4 LT	70
	71	FEXPORT(syscall_exit)
	72	local_irq_disable # make sure need_resched and
	73	# signals dont change between
	74	# sampling and return
	75	LONG_L a2, TI_FLAGS($28) # current->work
	76	li t0, _TIF_ALLWORK_MASK
	77	and t0, a2, t0
	78	bnez t0, syscall_exit_work
	79
45111b53	80	restore_all: # restore full frame
41c594ab	81	#ifdef CONFIG_MIPS_MT_SMTC
0db34215	82	#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
41c594ab RB	83	/* Re-arm any temporarily masked interrupts not explicitly "acked" */
	84	mfc0 v0, CP0_TCSTATUS
	85	ori v1, v0, TCSTATUS_IXMT
	86	mtc0 v1, CP0_TCSTATUS
	87	andi v0, TCSTATUS_IXMT
4277ff5e	88	_ehb
41c594ab RB	89	mfc0 t0, CP0_TCCONTEXT
	90	DMT 9 # dmt t1
	91	jal mips_ihb
	92	mfc0 t2, CP0_STATUS
	93	andi t3, t0, 0xff00
	94	or t2, t2, t3
	95	mtc0 t2, CP0_STATUS
4277ff5e	96	_ehb
41c594ab RB	97	andi t1, t1, VPECONTROL_TE
	98	beqz t1, 1f
	99	EMT
	100	1:
	101	mfc0 v1, CP0_TCSTATUS
477654fc	102	/* We set IXMT above, XOR should clear it here */
41c594ab RB	103	xori v1, v1, TCSTATUS_IXMT
	104	or v1, v0, v1
	105	mtc0 v1, CP0_TCSTATUS
4277ff5e	106	_ehb
41c594ab RB	107	xor t0, t0, t3
41c594ab RB	108	mtc0 t0, CP0_TCCONTEXT
0db34215	109	#endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */
d2bb01b0 KK	110	/* Detect and execute deferred IPI "interrupts" */
	111	LONG_L s0, TI_REGS($28)
	112	LONG_S sp, TI_REGS($28)
	113	jal deferred_smtc_ipi
	114	LONG_S s0, TI_REGS($28)
41c594ab	115	#endif /* CONFIG_MIPS_MT_SMTC */
1da177e4 LT	116	.set noat
	117	RESTORE_TEMP
	118	RESTORE_AT
	119	RESTORE_STATIC
45111b53	120	restore_partial: # restore partial frame
192ef366 RB	121	#ifdef CONFIG_TRACE_IRQFLAGS
	122	SAVE_STATIC
	123	SAVE_AT
	124	SAVE_TEMP
	125	LONG_L v0, PT_STATUS(sp)
cbde5ebc CD	126	#if defined(CONFIG_CPU_R3000) \|\| defined(CONFIG_CPU_TX39XX)
	127	and v0, ST0_IEP
	128	#else
	129	and v0, ST0_IE
	130	#endif
192ef366 RB	131	beqz v0, 1f
	132	jal trace_hardirqs_on
	133	b 2f
	134	1: jal trace_hardirqs_off
	135	2:
	136	RESTORE_TEMP
	137	RESTORE_AT
	138	RESTORE_STATIC
	139	#endif
1da177e4 LT	140	RESTORE_SOME
	141	RESTORE_SP_AND_RET
	142	.set at
	143
c2648527 TS	144	work_pending:
c2648527 TS	145	andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
1da177e4 LT	146	beqz t0, work_notifysig
	147	work_resched:
	148	jal schedule
	149
c2648527	150	local_irq_disable # make sure need_resched and
1da177e4 LT	151	# signals dont change between
	152	# sampling and return
	153	LONG_L a2, TI_FLAGS($28)
	154	andi t0, a2, _TIF_WORK_MASK # is there any work to be done
	155	# other than syscall tracing?
	156	beqz t0, restore_all
	157	andi t0, a2, _TIF_NEED_RESCHED
	158	bnez t0, work_resched
	159
	160	work_notifysig: # deal with pending signals and
	161	# notify-resume requests
	162	move a0, sp
	163	li a1, 0
	164	jal do_notify_resume # a2 already loaded
0bf0e3e2	165	j resume_userspace
1da177e4	166
45111b53 AV	167	FEXPORT(syscall_exit_partial)
	168	local_irq_disable # make sure need_resched doesn't
	169	# change between and return
	170	LONG_L a2, TI_FLAGS($28) # current->work
	171	li t0, _TIF_ALLWORK_MASK
	172	and t0, a2
	173	beqz t0, restore_partial
1da177e4	174	SAVE_STATIC
c2648527	175	syscall_exit_work:
bfc83647 AV	176	LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
	177	andi t0, t0, KU_USER
	178	beqz t0, resume_kernel
c19c20ac	179	li t0, _TIF_WORK_SYSCALL_EXIT
c2648527 TS	180	and t0, a2 # a2 is preloaded with TI_FLAGS
c2648527 TS	181	beqz t0, work_pending # trace bit set?
8b659a39	182	local_irq_enable # could let syscall_trace_leave()
1da177e4 LT	183	# call schedule() instead
1da177e4 LT	184	move a0, sp
8b659a39	185	jal syscall_trace_leave
1da177e4	186	b resume_userspace
bce1a286 RB	187
	188	#if defined(CONFIG_CPU_MIPSR2) \|\| defined(CONFIG_MIPS_MT)
	189
	190	/*
	191	* MIPS32R2 Instruction Hazard Barrier - must be called
	192	*
	193	* For C code use the inline version named instruction_hazard().
	194	*/
	195	LEAF(mips_ihb)
	196	.set mips32r2
	197	jr.hb ra
	198	nop
	199	END(mips_ihb)
	200
	201	#endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */