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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Code to handle x86 style IRQs plus some generic interrupt stuff. | |
7 | * | |
8 | * Copyright (C) 1992 Linus Torvalds | |
9 | * Copyright (C) 1994 - 2000 Ralf Baechle | |
10 | */ | |
1da177e4 LT |
11 | #include <linux/kernel.h> |
12 | #include <linux/delay.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/kernel_stat.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/proc_fs.h> | |
18 | #include <linux/slab.h> | |
19 | #include <linux/mm.h> | |
20 | #include <linux/random.h> | |
21 | #include <linux/sched.h> | |
22 | #include <linux/seq_file.h> | |
23 | #include <linux/kallsyms.h> | |
24 | ||
25 | #include <asm/atomic.h> | |
26 | #include <asm/system.h> | |
27 | #include <asm/uaccess.h> | |
28 | ||
29 | /* | |
30 | * 'what should we do if we get a hw irq event on an illegal vector'. | |
31 | * each architecture has to answer this themselves. | |
32 | */ | |
33 | void ack_bad_irq(unsigned int irq) | |
34 | { | |
35 | printk("unexpected IRQ # %d\n", irq); | |
36 | } | |
37 | ||
38 | atomic_t irq_err_count; | |
39 | ||
41c594ab RB |
40 | #ifdef CONFIG_MIPS_MT_SMTC |
41 | /* | |
42 | * SMTC Kernel needs to manipulate low-level CPU interrupt mask | |
43 | * in do_IRQ. These are passed in setup_irq_smtc() and stored | |
44 | * in this table. | |
45 | */ | |
46 | unsigned long irq_hwmask[NR_IRQS]; | |
47 | #endif /* CONFIG_MIPS_MT_SMTC */ | |
48 | ||
1da177e4 LT |
49 | #undef do_IRQ |
50 | ||
51 | /* | |
52 | * do_IRQ handles all normal device IRQ's (the special | |
53 | * SMP cross-CPU interrupts have their own specific | |
54 | * handlers). | |
55 | */ | |
56 | asmlinkage unsigned int do_IRQ(unsigned int irq, struct pt_regs *regs) | |
57 | { | |
58 | irq_enter(); | |
59 | ||
41c594ab | 60 | __DO_IRQ_SMTC_HOOK(); |
1da177e4 LT |
61 | __do_IRQ(irq, regs); |
62 | ||
63 | irq_exit(); | |
64 | ||
65 | return 1; | |
66 | } | |
67 | ||
68 | /* | |
69 | * Generic, controller-independent functions: | |
70 | */ | |
71 | ||
72 | int show_interrupts(struct seq_file *p, void *v) | |
73 | { | |
74 | int i = *(loff_t *) v, j; | |
75 | struct irqaction * action; | |
76 | unsigned long flags; | |
77 | ||
78 | if (i == 0) { | |
79 | seq_printf(p, " "); | |
394e3902 AM |
80 | for_each_online_cpu(j) |
81 | seq_printf(p, "CPU%d ",j); | |
1da177e4 LT |
82 | seq_putc(p, '\n'); |
83 | } | |
84 | ||
85 | if (i < NR_IRQS) { | |
86 | spin_lock_irqsave(&irq_desc[i].lock, flags); | |
87 | action = irq_desc[i].action; | |
42a3b4f2 | 88 | if (!action) |
1da177e4 LT |
89 | goto skip; |
90 | seq_printf(p, "%3d: ",i); | |
91 | #ifndef CONFIG_SMP | |
92 | seq_printf(p, "%10u ", kstat_irqs(i)); | |
93 | #else | |
394e3902 AM |
94 | for_each_online_cpu(j) |
95 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | |
1da177e4 | 96 | #endif |
d1bef4ed | 97 | seq_printf(p, " %14s", irq_desc[i].chip->typename); |
1da177e4 LT |
98 | seq_printf(p, " %s", action->name); |
99 | ||
100 | for (action=action->next; action; action = action->next) | |
101 | seq_printf(p, ", %s", action->name); | |
102 | ||
103 | seq_putc(p, '\n'); | |
104 | skip: | |
105 | spin_unlock_irqrestore(&irq_desc[i].lock, flags); | |
106 | } else if (i == NR_IRQS) { | |
107 | seq_putc(p, '\n'); | |
108 | seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); | |
109 | } | |
110 | return 0; | |
111 | } | |
112 | ||
93373ed4 RB |
113 | asmlinkage void spurious_interrupt(struct pt_regs *regs) |
114 | { | |
115 | atomic_inc(&irq_err_count); | |
116 | } | |
117 | ||
1da177e4 LT |
118 | #ifdef CONFIG_KGDB |
119 | extern void breakpoint(void); | |
120 | extern void set_debug_traps(void); | |
121 | ||
122 | static int kgdb_flag = 1; | |
123 | static int __init nokgdb(char *str) | |
124 | { | |
125 | kgdb_flag = 0; | |
126 | return 1; | |
127 | } | |
128 | __setup("nokgdb", nokgdb); | |
129 | #endif | |
130 | ||
131 | void __init init_IRQ(void) | |
132 | { | |
133 | int i; | |
134 | ||
135 | for (i = 0; i < NR_IRQS; i++) { | |
136 | irq_desc[i].status = IRQ_DISABLED; | |
137 | irq_desc[i].action = NULL; | |
138 | irq_desc[i].depth = 1; | |
d1bef4ed | 139 | irq_desc[i].chip = &no_irq_type; |
1da177e4 | 140 | spin_lock_init(&irq_desc[i].lock); |
41c594ab RB |
141 | #ifdef CONFIG_MIPS_MT_SMTC |
142 | irq_hwmask[i] = 0; | |
143 | #endif /* CONFIG_MIPS_MT_SMTC */ | |
1da177e4 LT |
144 | } |
145 | ||
146 | arch_init_irq(); | |
147 | ||
148 | #ifdef CONFIG_KGDB | |
149 | if (kgdb_flag) { | |
150 | printk("Wait for gdb client connection ...\n"); | |
151 | set_debug_traps(); | |
152 | breakpoint(); | |
153 | } | |
154 | #endif | |
155 | } |