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1da177e4 LT |
1 | /* |
2 | * linux/arch/mips/kernel/proc.c | |
3 | * | |
4 | * Copyright (C) 1995, 1996, 2001 Ralf Baechle | |
5 | * Copyright (C) 2001 MIPS Technologies, Inc. | |
6 | */ | |
7 | #include <linux/config.h> | |
8 | #include <linux/delay.h> | |
9 | #include <linux/kernel.h> | |
10 | #include <linux/sched.h> | |
11 | #include <linux/seq_file.h> | |
12 | #include <asm/bootinfo.h> | |
13 | #include <asm/cpu.h> | |
14 | #include <asm/cpu-features.h> | |
15 | #include <asm/mipsregs.h> | |
16 | #include <asm/processor.h> | |
17 | #include <asm/watch.h> | |
18 | ||
19 | unsigned int vced_count, vcei_count; | |
20 | ||
21 | static const char *cpu_name[] = { | |
22 | [CPU_UNKNOWN] "unknown", | |
23 | [CPU_R2000] "R2000", | |
24 | [CPU_R3000] "R3000", | |
25 | [CPU_R3000A] "R3000A", | |
26 | [CPU_R3041] "R3041", | |
27 | [CPU_R3051] "R3051", | |
28 | [CPU_R3052] "R3052", | |
29 | [CPU_R3081] "R3081", | |
30 | [CPU_R3081E] "R3081E", | |
31 | [CPU_R4000PC] "R4000PC", | |
32 | [CPU_R4000SC] "R4000SC", | |
33 | [CPU_R4000MC] "R4000MC", | |
34 | [CPU_R4200] "R4200", | |
35 | [CPU_R4400PC] "R4400PC", | |
36 | [CPU_R4400SC] "R4400SC", | |
37 | [CPU_R4400MC] "R4400MC", | |
38 | [CPU_R4600] "R4600", | |
39 | [CPU_R6000] "R6000", | |
40 | [CPU_R6000A] "R6000A", | |
41 | [CPU_R8000] "R8000", | |
42 | [CPU_R10000] "R10000", | |
43 | [CPU_R12000] "R12000", | |
44 | [CPU_R4300] "R4300", | |
45 | [CPU_R4650] "R4650", | |
46 | [CPU_R4700] "R4700", | |
47 | [CPU_R5000] "R5000", | |
48 | [CPU_R5000A] "R5000A", | |
49 | [CPU_R4640] "R4640", | |
50 | [CPU_NEVADA] "Nevada", | |
51 | [CPU_RM7000] "RM7000", | |
52 | [CPU_RM9000] "RM9000", | |
53 | [CPU_R5432] "R5432", | |
54 | [CPU_4KC] "MIPS 4Kc", | |
55 | [CPU_5KC] "MIPS 5Kc", | |
56 | [CPU_R4310] "R4310", | |
57 | [CPU_SB1] "SiByte SB1", | |
58 | [CPU_TX3912] "TX3912", | |
59 | [CPU_TX3922] "TX3922", | |
60 | [CPU_TX3927] "TX3927", | |
61 | [CPU_AU1000] "Au1000", | |
62 | [CPU_AU1500] "Au1500", | |
e3ad1c23 PP |
63 | [CPU_AU1100] "Au1100", |
64 | [CPU_AU1550] "Au1550", | |
65 | [CPU_AU1200] "Au1200", | |
1da177e4 LT |
66 | [CPU_4KEC] "MIPS 4KEc", |
67 | [CPU_4KSC] "MIPS 4KSc", | |
68 | [CPU_VR41XX] "NEC Vr41xx", | |
69 | [CPU_R5500] "R5500", | |
70 | [CPU_TX49XX] "TX49xx", | |
71 | [CPU_20KC] "MIPS 20Kc", | |
72 | [CPU_24K] "MIPS 24K", | |
73 | [CPU_25KF] "MIPS 25Kf", | |
74 | [CPU_VR4111] "NEC VR4111", | |
75 | [CPU_VR4121] "NEC VR4121", | |
76 | [CPU_VR4122] "NEC VR4122", | |
77 | [CPU_VR4131] "NEC VR4131", | |
78 | [CPU_VR4133] "NEC VR4133", | |
79 | [CPU_VR4181] "NEC VR4181", | |
80 | [CPU_VR4181A] "NEC VR4181A", | |
81 | [CPU_SR71000] "Sandcraft SR71000" | |
82 | }; | |
83 | ||
84 | ||
85 | static int show_cpuinfo(struct seq_file *m, void *v) | |
86 | { | |
87 | unsigned int version = current_cpu_data.processor_id; | |
88 | unsigned int fp_vers = current_cpu_data.fpu_id; | |
89 | unsigned long n = (unsigned long) v - 1; | |
90 | char fmt [64]; | |
91 | ||
92 | #ifdef CONFIG_SMP | |
93 | if (!cpu_isset(n, cpu_online_map)) | |
94 | return 0; | |
95 | #endif | |
96 | ||
97 | /* | |
98 | * For the first processor also print the system type | |
99 | */ | |
100 | if (n == 0) | |
101 | seq_printf(m, "system type\t\t: %s\n", get_system_type()); | |
102 | ||
103 | seq_printf(m, "processor\t\t: %ld\n", n); | |
104 | sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n", | |
105 | cpu_has_fpu ? " FPU V%d.%d" : ""); | |
106 | seq_printf(m, fmt, cpu_name[current_cpu_data.cputype <= CPU_LAST ? | |
107 | current_cpu_data.cputype : CPU_UNKNOWN], | |
108 | (version >> 4) & 0x0f, version & 0x0f, | |
109 | (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); | |
110 | seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n", | |
0ac35480 RB |
111 | cpu_data[n].udelay_val / (500000/HZ), |
112 | (cpu_data[n].udelay_val / (5000/HZ)) % 100); | |
1da177e4 LT |
113 | seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no"); |
114 | seq_printf(m, "microsecond timers\t: %s\n", | |
115 | cpu_has_counter ? "yes" : "no"); | |
116 | seq_printf(m, "tlb_entries\t\t: %d\n", current_cpu_data.tlbsize); | |
117 | seq_printf(m, "extra interrupt vector\t: %s\n", | |
118 | cpu_has_divec ? "yes" : "no"); | |
119 | seq_printf(m, "hardware watchpoint\t: %s\n", | |
120 | cpu_has_watch ? "yes" : "no"); | |
121 | ||
122 | sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", | |
123 | cpu_has_vce ? "%u" : "not available"); | |
124 | seq_printf(m, fmt, 'D', vced_count); | |
125 | seq_printf(m, fmt, 'I', vcei_count); | |
126 | ||
127 | return 0; | |
128 | } | |
129 | ||
130 | static void *c_start(struct seq_file *m, loff_t *pos) | |
131 | { | |
132 | unsigned long i = *pos; | |
133 | ||
134 | return i < NR_CPUS ? (void *) (i + 1) : NULL; | |
135 | } | |
136 | ||
137 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
138 | { | |
139 | ++*pos; | |
140 | return c_start(m, pos); | |
141 | } | |
142 | ||
143 | static void c_stop(struct seq_file *m, void *v) | |
144 | { | |
145 | } | |
146 | ||
147 | struct seq_operations cpuinfo_op = { | |
148 | .start = c_start, | |
149 | .next = c_next, | |
150 | .stop = c_stop, | |
151 | .show = show_cpuinfo, | |
152 | }; |