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MIPS: kernel: Fix typo
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CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
40ac5d47 7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
1da177e4
LT
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 * Copyright (C) 2004 Thiemo Seufer
34c2f668 10 * Copyright (C) 2013 Imagination Technologies Ltd.
1da177e4 11 */
1da177e4 12#include <linux/errno.h>
1da177e4 13#include <linux/sched.h>
7bcf7717 14#include <linux/tick.h>
1da177e4
LT
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
cae39d13 19#include <linux/export.h>
1da177e4 20#include <linux/ptrace.h>
1da177e4
LT
21#include <linux/mman.h>
22#include <linux/personality.h>
23#include <linux/sys.h>
1da177e4
LT
24#include <linux/init.h>
25#include <linux/completion.h>
63077519 26#include <linux/kallsyms.h>
94109102 27#include <linux/random.h>
9791554b 28#include <linux/prctl.h>
1da177e4 29
94109102 30#include <asm/asm.h>
1da177e4
LT
31#include <asm/bootinfo.h>
32#include <asm/cpu.h>
e50c0a8f 33#include <asm/dsp.h>
1da177e4 34#include <asm/fpu.h>
1db1af84 35#include <asm/msa.h>
1da177e4 36#include <asm/pgtable.h>
1da177e4
LT
37#include <asm/mipsregs.h>
38#include <asm/processor.h>
60be939c 39#include <asm/reg.h>
1da177e4
LT
40#include <asm/uaccess.h>
41#include <asm/io.h>
42#include <asm/elf.h>
43#include <asm/isadep.h>
44#include <asm/inst.h>
1df0f0ff 45#include <asm/stacktrace.h>
856839b7 46#include <asm/irq_regs.h>
1da177e4 47
cdbedc61
TG
48#ifdef CONFIG_HOTPLUG_CPU
49void arch_cpu_idle_dead(void)
1da177e4 50{
cdbedc61 51 /* What the heck is this check doing ? */
8dd92891 52 if (!cpumask_test_cpu(smp_processor_id(), &cpu_callin_map))
cdbedc61
TG
53 play_dead();
54}
55#endif
1b2bc75c 56
1da177e4 57asmlinkage void ret_from_fork(void);
8f54bcac 58asmlinkage void ret_from_kernel_thread(void);
1da177e4
LT
59
60void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
61{
62 unsigned long status;
63
64 /* New thread loses kernel privileges. */
bbaf238b 65 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
1da177e4
LT
66 status |= KU_USER;
67 regs->cp0_status = status;
76e5846d
JH
68 lose_fpu(0);
69 clear_thread_flag(TIF_MSA_CTX_LIVE);
1da177e4 70 clear_used_math();
a3056b1c 71 init_dsp();
1da177e4
LT
72 regs->cp0_epc = pc;
73 regs->regs[29] = sp;
1da177e4
LT
74}
75
76void exit_thread(void)
77{
78}
79
39148e94
JH
80int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
81{
82 /*
83 * Save any process state which is live in hardware registers to the
84 * parent context prior to duplication. This prevents the new child
85 * state becoming stale if the parent is preempted before copy_thread()
86 * gets a chance to save the parent's live hardware registers to the
87 * child context.
88 */
89 preempt_disable();
90
91 if (is_msa_enabled())
92 save_msa(current);
93 else if (is_fpu_owner())
94 _save_fp(current);
95
96 save_dsp(current);
97
98 preempt_enable();
99
100 *dst = *src;
101 return 0;
102}
103
e2c5aaa5
AD
104/*
105 * Copy architecture-specific thread state
106 */
6f2c55b8 107int copy_thread(unsigned long clone_flags, unsigned long usp,
e2c5aaa5 108 unsigned long kthread_arg, struct task_struct *p)
1da177e4 109{
75bb07e7 110 struct thread_info *ti = task_thread_info(p);
afa86fc4 111 struct pt_regs *childregs, *regs = current_pt_regs();
484889fc 112 unsigned long childksp;
3c37026d 113 p->set_child_tid = p->clear_child_tid = NULL;
1da177e4 114
75bb07e7 115 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
1da177e4 116
1da177e4
LT
117 /* set up new TSS. */
118 childregs = (struct pt_regs *) childksp - 1;
484889fc
DD
119 /* Put the stack after the struct pt_regs. */
120 childksp = (unsigned long) childregs;
8f54bcac
AV
121 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
122 if (unlikely(p->flags & PF_KTHREAD)) {
e2c5aaa5 123 /* kernel thread */
8f54bcac
AV
124 unsigned long status = p->thread.cp0_status;
125 memset(childregs, 0, sizeof(struct pt_regs));
126 ti->addr_limit = KERNEL_DS;
127 p->thread.reg16 = usp; /* fn */
e2c5aaa5 128 p->thread.reg17 = kthread_arg;
8f54bcac
AV
129 p->thread.reg29 = childksp;
130 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
131#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
132 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
133 ((status & (ST0_KUC | ST0_IEC)) << 2);
134#else
135 status |= ST0_EXL;
136#endif
137 childregs->cp0_status = status;
138 return 0;
139 }
e2c5aaa5
AD
140
141 /* user thread */
1da177e4 142 *childregs = *regs;
70342287
RB
143 childregs->regs[7] = 0; /* Clear error flag */
144 childregs->regs[2] = 0; /* Child gets zero as return value */
64b3122d
AV
145 if (usp)
146 childregs->regs[29] = usp;
8f54bcac 147 ti->addr_limit = USER_DS;
1da177e4 148
1da177e4
LT
149 p->thread.reg29 = (unsigned long) childregs;
150 p->thread.reg31 = (unsigned long) ret_from_fork;
151
152 /*
153 * New tasks lose permission to use the fpu. This accelerates context
154 * switching for most programs since they don't use the fpu.
155 */
1da177e4 156 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
1da177e4 157
1da177e4 158 clear_tsk_thread_flag(p, TIF_USEDFPU);
7daef8f2
PB
159 clear_tsk_thread_flag(p, TIF_USEDMSA);
160 clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
1da177e4 161
f088fc84 162#ifdef CONFIG_MIPS_MT_FPAFF
6657fe0a 163 clear_tsk_thread_flag(p, TIF_FPUBOUND);
f088fc84
RB
164#endif /* CONFIG_MIPS_MT_FPAFF */
165
3c37026d
RB
166 if (clone_flags & CLONE_SETTLS)
167 ti->tp_value = regs->regs[7];
168
1da177e4
LT
169 return 0;
170}
171
36ecafc5
GF
172#ifdef CONFIG_CC_STACKPROTECTOR
173#include <linux/stackprotector.h>
174unsigned long __stack_chk_guard __read_mostly;
175EXPORT_SYMBOL(__stack_chk_guard);
176#endif
177
b5943182
FBH
178struct mips_frame_info {
179 void *func;
180 unsigned long func_size;
181 int frame_size;
182 int pc_offset;
183};
dc953df1 184
5000653e
TW
185#define J_TARGET(pc,target) \
186 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
187
c0efbb6d
FBH
188static inline int is_ra_save_ins(union mips_instruction *ip)
189{
34c2f668
LY
190#ifdef CONFIG_CPU_MICROMIPS
191 union mips_instruction mmi;
192
193 /*
194 * swsp ra,offset
195 * swm16 reglist,offset(sp)
196 * swm32 reglist,offset(sp)
197 * sw32 ra,offset(sp)
198 * jradiussp - NOT SUPPORTED
199 *
200 * microMIPS is way more fun...
201 */
202 if (mm_insn_16bit(ip->halfword[0])) {
203 mmi.word = (ip->halfword[0] << 16);
635c9907
RB
204 return (mmi.mm16_r5_format.opcode == mm_swsp16_op &&
205 mmi.mm16_r5_format.rt == 31) ||
206 (mmi.mm16_m_format.opcode == mm_pool16c_op &&
207 mmi.mm16_m_format.func == mm_swm16_op);
34c2f668
LY
208 }
209 else {
210 mmi.halfword[0] = ip->halfword[1];
211 mmi.halfword[1] = ip->halfword[0];
635c9907
RB
212 return (mmi.mm_m_format.opcode == mm_pool32b_op &&
213 mmi.mm_m_format.rd > 9 &&
214 mmi.mm_m_format.base == 29 &&
215 mmi.mm_m_format.func == mm_swm32_func) ||
216 (mmi.i_format.opcode == mm_sw32_op &&
217 mmi.i_format.rs == 29 &&
218 mmi.i_format.rt == 31);
34c2f668
LY
219 }
220#else
c0efbb6d
FBH
221 /* sw / sd $ra, offset($sp) */
222 return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
223 ip->i_format.rs == 29 &&
224 ip->i_format.rt == 31;
34c2f668 225#endif
c0efbb6d
FBH
226}
227
e7438c4b 228static inline int is_jump_ins(union mips_instruction *ip)
c0efbb6d 229{
34c2f668
LY
230#ifdef CONFIG_CPU_MICROMIPS
231 /*
232 * jr16,jrc,jalr16,jalr16
233 * jal
234 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
235 * jraddiusp - NOT SUPPORTED
236 *
237 * microMIPS is kind of more fun...
238 */
239 union mips_instruction mmi;
240
241 mmi.word = (ip->halfword[0] << 16);
242
243 if ((mmi.mm16_r5_format.opcode == mm_pool16c_op &&
244 (mmi.mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) ||
245 ip->j_format.opcode == mm_jal32_op)
246 return 1;
247 if (ip->r_format.opcode != mm_pool32a_op ||
248 ip->r_format.func != mm_pool32axf_op)
249 return 0;
635c9907 250 return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
34c2f668 251#else
e7438c4b
TW
252 if (ip->j_format.opcode == j_op)
253 return 1;
c0efbb6d
FBH
254 if (ip->j_format.opcode == jal_op)
255 return 1;
256 if (ip->r_format.opcode != spec_op)
257 return 0;
258 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
34c2f668 259#endif
c0efbb6d
FBH
260}
261
262static inline int is_sp_move_ins(union mips_instruction *ip)
263{
34c2f668
LY
264#ifdef CONFIG_CPU_MICROMIPS
265 /*
266 * addiusp -imm
267 * addius5 sp,-imm
268 * addiu32 sp,sp,-imm
269 * jradiussp - NOT SUPPORTED
270 *
271 * microMIPS is not more fun...
272 */
273 if (mm_insn_16bit(ip->halfword[0])) {
274 union mips_instruction mmi;
275
276 mmi.word = (ip->halfword[0] << 16);
635c9907
RB
277 return (mmi.mm16_r3_format.opcode == mm_pool16d_op &&
278 mmi.mm16_r3_format.simmediate && mm_addiusp_func) ||
279 (mmi.mm16_r5_format.opcode == mm_pool16d_op &&
280 mmi.mm16_r5_format.rt == 29);
34c2f668 281 }
635c9907
RB
282 return ip->mm_i_format.opcode == mm_addiu32_op &&
283 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29;
34c2f668 284#else
c0efbb6d
FBH
285 /* addiu/daddiu sp,sp,-imm */
286 if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
287 return 0;
288 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
289 return 1;
34c2f668 290#endif
c0efbb6d
FBH
291 return 0;
292}
293
f66686f7 294static int get_frame_info(struct mips_frame_info *info)
1da177e4 295{
34c2f668
LY
296#ifdef CONFIG_CPU_MICROMIPS
297 union mips_instruction *ip = (void *) (((char *) info->func) - 1);
298#else
c0efbb6d 299 union mips_instruction *ip = info->func;
34c2f668 300#endif
29b376ff
FBH
301 unsigned max_insns = info->func_size / sizeof(union mips_instruction);
302 unsigned i;
c0efbb6d 303
1da177e4 304 info->pc_offset = -1;
63077519 305 info->frame_size = 0;
1da177e4 306
29b376ff
FBH
307 if (!ip)
308 goto err;
309
310 if (max_insns == 0)
311 max_insns = 128U; /* unknown function size */
312 max_insns = min(128U, max_insns);
313
c0efbb6d
FBH
314 for (i = 0; i < max_insns; i++, ip++) {
315
e7438c4b 316 if (is_jump_ins(ip))
63077519 317 break;
0cceb4aa
FBH
318 if (!info->frame_size) {
319 if (is_sp_move_ins(ip))
34c2f668
LY
320 {
321#ifdef CONFIG_CPU_MICROMIPS
322 if (mm_insn_16bit(ip->halfword[0]))
323 {
324 unsigned short tmp;
325
326 if (ip->halfword[0] & mm_addiusp_func)
327 {
328 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
329 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
330 } else {
331 tmp = (ip->halfword[0] >> 1);
332 info->frame_size = -(signed short)(tmp & 0xf);
333 }
334 ip = (void *) &ip->halfword[1];
335 ip--;
336 } else
337#endif
0cceb4aa 338 info->frame_size = - ip->i_format.simmediate;
34c2f668 339 }
0cceb4aa 340 continue;
63077519 341 }
0cceb4aa 342 if (info->pc_offset == -1 && is_ra_save_ins(ip)) {
63077519
AN
343 info->pc_offset =
344 ip->i_format.simmediate / sizeof(long);
0cceb4aa 345 break;
1da177e4
LT
346 }
347 }
f66686f7
AN
348 if (info->frame_size && info->pc_offset >= 0) /* nested */
349 return 0;
350 if (info->pc_offset < 0) /* leaf */
351 return 1;
a90c59e6 352 /* prologue seems bogus... */
29b376ff 353err:
f66686f7 354 return -1;
1da177e4
LT
355}
356
b5943182
FBH
357static struct mips_frame_info schedule_mfi __read_mostly;
358
5000653e
TW
359#ifdef CONFIG_KALLSYMS
360static unsigned long get___schedule_addr(void)
361{
362 return kallsyms_lookup_name("__schedule");
363}
364#else
365static unsigned long get___schedule_addr(void)
366{
367 union mips_instruction *ip = (void *)schedule;
368 int max_insns = 8;
369 int i;
370
371 for (i = 0; i < max_insns; i++, ip++) {
372 if (ip->j_format.opcode == j_op)
373 return J_TARGET(ip, ip->j_format.target);
374 }
375 return 0;
376}
377#endif
378
1da177e4
LT
379static int __init frame_info_init(void)
380{
b5943182 381 unsigned long size = 0;
63077519 382#ifdef CONFIG_KALLSYMS
b5943182 383 unsigned long ofs;
5000653e
TW
384#endif
385 unsigned long addr;
b5943182 386
5000653e
TW
387 addr = get___schedule_addr();
388 if (!addr)
389 addr = (unsigned long)schedule;
390
391#ifdef CONFIG_KALLSYMS
392 kallsyms_lookup_size_offset(addr, &size, &ofs);
63077519 393#endif
5000653e 394 schedule_mfi.func = (void *)addr;
b5943182
FBH
395 schedule_mfi.func_size = size;
396
397 get_frame_info(&schedule_mfi);
6057a798
FBH
398
399 /*
400 * Without schedule() frame info, result given by
401 * thread_saved_pc() and get_wchan() are not reliable.
402 */
b5943182 403 if (schedule_mfi.pc_offset < 0)
6057a798 404 printk("Can't analyze schedule() prologue at %p\n", schedule);
63077519 405
1da177e4
LT
406 return 0;
407}
408
409arch_initcall(frame_info_init);
410
411/*
412 * Return saved PC of a blocked thread.
413 */
414unsigned long thread_saved_pc(struct task_struct *tsk)
415{
416 struct thread_struct *t = &tsk->thread;
417
418 /* New born processes are a special case */
419 if (t->reg31 == (unsigned long) ret_from_fork)
420 return t->reg31;
b5943182 421 if (schedule_mfi.pc_offset < 0)
1da177e4 422 return 0;
b5943182 423 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
1da177e4
LT
424}
425
1da177e4 426
f66686f7 427#ifdef CONFIG_KALLSYMS
94ea09c6
DK
428/* generic stack unwinding function */
429unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
430 unsigned long *sp,
431 unsigned long pc,
432 unsigned long *ra)
f66686f7 433{
f66686f7 434 struct mips_frame_info info;
f66686f7 435 unsigned long size, ofs;
4d157d5e 436 int leaf;
1924600c
AN
437 extern void ret_from_irq(void);
438 extern void ret_from_exception(void);
f66686f7 439
f66686f7
AN
440 if (!stack_page)
441 return 0;
442
1924600c
AN
443 /*
444 * If we reached the bottom of interrupt context,
445 * return saved pc in pt_regs.
446 */
447 if (pc == (unsigned long)ret_from_irq ||
448 pc == (unsigned long)ret_from_exception) {
449 struct pt_regs *regs;
450 if (*sp >= stack_page &&
451 *sp + sizeof(*regs) <= stack_page + THREAD_SIZE - 32) {
452 regs = (struct pt_regs *)*sp;
453 pc = regs->cp0_epc;
a816b306 454 if (!user_mode(regs) && __kernel_text_address(pc)) {
1924600c
AN
455 *sp = regs->regs[29];
456 *ra = regs->regs[31];
457 return pc;
458 }
459 }
460 return 0;
461 }
55b74283 462 if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
f66686f7 463 return 0;
1fd69098 464 /*
25985edc 465 * Return ra if an exception occurred at the first instruction
1fd69098 466 */
1924600c
AN
467 if (unlikely(ofs == 0)) {
468 pc = *ra;
469 *ra = 0;
470 return pc;
471 }
f66686f7
AN
472
473 info.func = (void *)(pc - ofs);
474 info.func_size = ofs; /* analyze from start to ofs */
4d157d5e
FBH
475 leaf = get_frame_info(&info);
476 if (leaf < 0)
f66686f7 477 return 0;
4d157d5e
FBH
478
479 if (*sp < stack_page ||
480 *sp + info.frame_size > stack_page + THREAD_SIZE - 32)
f66686f7
AN
481 return 0;
482
4d157d5e
FBH
483 if (leaf)
484 /*
485 * For some extreme cases, get_frame_info() can
486 * consider wrongly a nested function as a leaf
487 * one. In that cases avoid to return always the
488 * same value.
489 */
1924600c 490 pc = pc != *ra ? *ra : 0;
4d157d5e
FBH
491 else
492 pc = ((unsigned long *)(*sp))[info.pc_offset];
493
494 *sp += info.frame_size;
1924600c 495 *ra = 0;
4d157d5e 496 return __kernel_text_address(pc) ? pc : 0;
f66686f7 497}
94ea09c6
DK
498EXPORT_SYMBOL(unwind_stack_by_address);
499
500/* used by show_backtrace() */
501unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
502 unsigned long pc, unsigned long *ra)
503{
504 unsigned long stack_page = (unsigned long)task_stack_page(task);
505 return unwind_stack_by_address(stack_page, sp, pc, ra);
506}
f66686f7 507#endif
b5943182
FBH
508
509/*
510 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
511 */
512unsigned long get_wchan(struct task_struct *task)
513{
514 unsigned long pc = 0;
515#ifdef CONFIG_KALLSYMS
516 unsigned long sp;
1924600c 517 unsigned long ra = 0;
b5943182
FBH
518#endif
519
520 if (!task || task == current || task->state == TASK_RUNNING)
521 goto out;
522 if (!task_stack_page(task))
523 goto out;
524
525 pc = thread_saved_pc(task);
526
527#ifdef CONFIG_KALLSYMS
528 sp = task->thread.reg29 + schedule_mfi.frame_size;
529
530 while (in_sched_functions(pc))
1924600c 531 pc = unwind_stack(task, &sp, pc, &ra);
b5943182
FBH
532#endif
533
534out:
535 return pc;
536}
94109102
FBH
537
538/*
539 * Don't forget that the stack pointer must be aligned on a 8 bytes
540 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
541 */
542unsigned long arch_align_stack(unsigned long sp)
543{
544 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
545 sp -= get_random_int() & ~PAGE_MASK;
546
547 return sp & ALMASK;
548}
856839b7
ES
549
550static void arch_dump_stack(void *info)
551{
552 struct pt_regs *regs;
553
554 regs = get_irq_regs();
555
556 if (regs)
557 show_regs(regs);
558
559 dump_stack();
560}
561
562void arch_trigger_all_cpu_backtrace(bool include_self)
563{
564 smp_call_function(arch_dump_stack, NULL, 1);
565}
9791554b
PB
566
567int mips_get_process_fp_mode(struct task_struct *task)
568{
569 int value = 0;
570
571 if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
572 value |= PR_FP_MODE_FR;
573 if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
574 value |= PR_FP_MODE_FRE;
575
576 return value;
577}
578
6b832257
PB
579static void prepare_for_fp_mode_switch(void *info)
580{
581 struct mm_struct *mm = info;
582
583 if (current->mm == mm)
584 lose_fpu(1);
585}
586
9791554b
PB
587int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
588{
589 const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
9791554b 590 struct task_struct *t;
6b832257 591 int max_users;
9791554b
PB
592
593 /* Check the value is valid */
594 if (value & ~known_bits)
595 return -EOPNOTSUPP;
596
597 /* Avoid inadvertently triggering emulation */
598 if ((value & PR_FP_MODE_FR) && cpu_has_fpu &&
599 !(current_cpu_data.fpu_id & MIPS_FPIR_F64))
600 return -EOPNOTSUPP;
601 if ((value & PR_FP_MODE_FRE) && cpu_has_fpu && !cpu_has_fre)
602 return -EOPNOTSUPP;
603
13e45f09
MC
604 /* FR = 0 not supported in MIPS R6 */
605 if (!(value & PR_FP_MODE_FR) && cpu_has_fpu && cpu_has_mips_r6)
606 return -EOPNOTSUPP;
607
bd239f1e
PB
608 /* Proceed with the mode switch */
609 preempt_disable();
610
9791554b
PB
611 /* Save FP & vector context, then disable FPU & MSA */
612 if (task->signal == current->signal)
613 lose_fpu(1);
614
615 /* Prevent any threads from obtaining live FP context */
616 atomic_set(&task->mm->context.fp_mode_switching, 1);
617 smp_mb__after_atomic();
618
619 /*
6b832257
PB
620 * If there are multiple online CPUs then force any which are running
621 * threads in this process to lose their FPU context, which they can't
622 * regain until fp_mode_switching is cleared later.
9791554b
PB
623 */
624 if (num_online_cpus() > 1) {
6b832257
PB
625 /* No need to send an IPI for the local CPU */
626 max_users = (task->mm == current->mm) ? 1 : 0;
9791554b 627
6b832257
PB
628 if (atomic_read(&current->mm->mm_users) > max_users)
629 smp_call_function(prepare_for_fp_mode_switch,
630 (void *)current->mm, 1);
9791554b
PB
631 }
632
633 /*
634 * There are now no threads of the process with live FP context, so it
635 * is safe to proceed with the FP mode switch.
636 */
637 for_each_thread(task, t) {
638 /* Update desired FP register width */
639 if (value & PR_FP_MODE_FR) {
640 clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
641 } else {
642 set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
643 clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
644 }
645
646 /* Update desired FP single layout */
647 if (value & PR_FP_MODE_FRE)
648 set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
649 else
650 clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
651 }
652
653 /* Allow threads to use FP again */
654 atomic_set(&task->mm->context.fp_mode_switching, 0);
bd239f1e 655 preempt_enable();
9791554b
PB
656
657 return 0;
658}