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MIPS: MSP71xx: remove inline marking of EXPORT_SYMBOL functions
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CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
40ac5d47 7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
1da177e4
LT
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 * Copyright (C) 2004 Thiemo Seufer
34c2f668 10 * Copyright (C) 2013 Imagination Technologies Ltd.
1da177e4 11 */
1da177e4 12#include <linux/errno.h>
1da177e4 13#include <linux/sched.h>
7bcf7717 14#include <linux/tick.h>
1da177e4
LT
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
cae39d13 19#include <linux/export.h>
1da177e4 20#include <linux/ptrace.h>
1da177e4
LT
21#include <linux/mman.h>
22#include <linux/personality.h>
23#include <linux/sys.h>
24#include <linux/user.h>
1da177e4
LT
25#include <linux/init.h>
26#include <linux/completion.h>
63077519 27#include <linux/kallsyms.h>
94109102 28#include <linux/random.h>
1da177e4 29
94109102 30#include <asm/asm.h>
1da177e4
LT
31#include <asm/bootinfo.h>
32#include <asm/cpu.h>
e50c0a8f 33#include <asm/dsp.h>
1da177e4
LT
34#include <asm/fpu.h>
35#include <asm/pgtable.h>
1da177e4
LT
36#include <asm/mipsregs.h>
37#include <asm/processor.h>
38#include <asm/uaccess.h>
39#include <asm/io.h>
40#include <asm/elf.h>
41#include <asm/isadep.h>
42#include <asm/inst.h>
1df0f0ff 43#include <asm/stacktrace.h>
1da177e4 44
cdbedc61
TG
45#ifdef CONFIG_HOTPLUG_CPU
46void arch_cpu_idle_dead(void)
1da177e4 47{
cdbedc61
TG
48 /* What the heck is this check doing ? */
49 if (!cpu_isset(smp_processor_id(), cpu_callin_map))
50 play_dead();
51}
52#endif
1b2bc75c 53
cdbedc61
TG
54void arch_cpu_idle(void)
55{
9cc12363 56#ifdef CONFIG_MIPS_MT_SMTC
cdbedc61 57 extern void smtc_idle_loop_hook(void);
447deafb 58
cdbedc61 59 smtc_idle_loop_hook();
1b2bc75c 60#endif
cdbedc61
TG
61 if (cpu_wait)
62 (*cpu_wait)();
63 else
64 local_irq_enable();
1da177e4
LT
65}
66
67asmlinkage void ret_from_fork(void);
8f54bcac 68asmlinkage void ret_from_kernel_thread(void);
1da177e4
LT
69
70void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
71{
72 unsigned long status;
73
74 /* New thread loses kernel privileges. */
bbaf238b 75 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
875d43e7 76#ifdef CONFIG_64BIT
293c5bd1 77 status |= test_thread_flag(TIF_32BIT_REGS) ? 0 : ST0_FR;
1da177e4
LT
78#endif
79 status |= KU_USER;
80 regs->cp0_status = status;
81 clear_used_math();
e04582b7 82 clear_fpu_owner();
e50c0a8f
RB
83 if (cpu_has_dsp)
84 __init_dsp();
1da177e4
LT
85 regs->cp0_epc = pc;
86 regs->regs[29] = sp;
1da177e4
LT
87}
88
89void exit_thread(void)
90{
91}
92
93void flush_thread(void)
94{
95}
96
6f2c55b8 97int copy_thread(unsigned long clone_flags, unsigned long usp,
afa86fc4 98 unsigned long arg, struct task_struct *p)
1da177e4 99{
75bb07e7 100 struct thread_info *ti = task_thread_info(p);
afa86fc4 101 struct pt_regs *childregs, *regs = current_pt_regs();
484889fc 102 unsigned long childksp;
3c37026d 103 p->set_child_tid = p->clear_child_tid = NULL;
1da177e4 104
75bb07e7 105 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
1da177e4
LT
106
107 preempt_disable();
108
e50c0a8f 109 if (is_fpu_owner())
1da177e4 110 save_fp(p);
e50c0a8f
RB
111
112 if (cpu_has_dsp)
113 save_dsp(p);
1da177e4
LT
114
115 preempt_enable();
116
117 /* set up new TSS. */
118 childregs = (struct pt_regs *) childksp - 1;
484889fc
DD
119 /* Put the stack after the struct pt_regs. */
120 childksp = (unsigned long) childregs;
8f54bcac
AV
121 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
122 if (unlikely(p->flags & PF_KTHREAD)) {
123 unsigned long status = p->thread.cp0_status;
124 memset(childregs, 0, sizeof(struct pt_regs));
125 ti->addr_limit = KERNEL_DS;
126 p->thread.reg16 = usp; /* fn */
127 p->thread.reg17 = arg;
128 p->thread.reg29 = childksp;
129 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
130#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
131 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
132 ((status & (ST0_KUC | ST0_IEC)) << 2);
133#else
134 status |= ST0_EXL;
135#endif
136 childregs->cp0_status = status;
137 return 0;
138 }
1da177e4 139 *childregs = *regs;
70342287
RB
140 childregs->regs[7] = 0; /* Clear error flag */
141 childregs->regs[2] = 0; /* Child gets zero as return value */
64b3122d
AV
142 if (usp)
143 childregs->regs[29] = usp;
8f54bcac 144 ti->addr_limit = USER_DS;
1da177e4 145
1da177e4
LT
146 p->thread.reg29 = (unsigned long) childregs;
147 p->thread.reg31 = (unsigned long) ret_from_fork;
148
149 /*
150 * New tasks lose permission to use the fpu. This accelerates context
151 * switching for most programs since they don't use the fpu.
152 */
1da177e4 153 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
1da177e4 154
9cc12363 155#ifdef CONFIG_MIPS_MT_SMTC
f088fc84 156 /*
9cc12363
KK
157 * SMTC restores TCStatus after Status, and the CU bits
158 * are aliased there.
f088fc84 159 */
9cc12363
KK
160 childregs->cp0_tcstatus &= ~(ST0_CU2|ST0_CU1);
161#endif
1da177e4
LT
162 clear_tsk_thread_flag(p, TIF_USEDFPU);
163
f088fc84 164#ifdef CONFIG_MIPS_MT_FPAFF
6657fe0a 165 clear_tsk_thread_flag(p, TIF_FPUBOUND);
f088fc84
RB
166#endif /* CONFIG_MIPS_MT_FPAFF */
167
3c37026d
RB
168 if (clone_flags & CLONE_SETTLS)
169 ti->tp_value = regs->regs[7];
170
1da177e4
LT
171 return 0;
172}
173
174/* Fill in the fpu structure for a core dump.. */
175int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)
176{
177 memcpy(r, &current->thread.fpu, sizeof(current->thread.fpu));
178
179 return 1;
180}
181
d56efda4 182void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs)
1da177e4
LT
183{
184 int i;
185
186 for (i = 0; i < EF_R0; i++)
187 gp[i] = 0;
188 gp[EF_R0] = 0;
189 for (i = 1; i <= 31; i++)
190 gp[EF_R0 + i] = regs->regs[i];
191 gp[EF_R26] = 0;
192 gp[EF_R27] = 0;
193 gp[EF_LO] = regs->lo;
194 gp[EF_HI] = regs->hi;
195 gp[EF_CP0_EPC] = regs->cp0_epc;
196 gp[EF_CP0_BADVADDR] = regs->cp0_badvaddr;
197 gp[EF_CP0_STATUS] = regs->cp0_status;
198 gp[EF_CP0_CAUSE] = regs->cp0_cause;
199#ifdef EF_UNUSED0
200 gp[EF_UNUSED0] = 0;
201#endif
202}
203
49a89efb 204int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
71e0e556 205{
40bc9c67 206 elf_dump_regs(*regs, task_pt_regs(tsk));
71e0e556
RB
207 return 1;
208}
209
49a89efb 210int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpr)
1da177e4
LT
211{
212 memcpy(fpr, &t->thread.fpu, sizeof(current->thread.fpu));
213
214 return 1;
215}
216
b5943182
FBH
217/*
218 *
219 */
220struct mips_frame_info {
221 void *func;
222 unsigned long func_size;
223 int frame_size;
224 int pc_offset;
225};
dc953df1 226
c0efbb6d
FBH
227static inline int is_ra_save_ins(union mips_instruction *ip)
228{
34c2f668
LY
229#ifdef CONFIG_CPU_MICROMIPS
230 union mips_instruction mmi;
231
232 /*
233 * swsp ra,offset
234 * swm16 reglist,offset(sp)
235 * swm32 reglist,offset(sp)
236 * sw32 ra,offset(sp)
237 * jradiussp - NOT SUPPORTED
238 *
239 * microMIPS is way more fun...
240 */
241 if (mm_insn_16bit(ip->halfword[0])) {
242 mmi.word = (ip->halfword[0] << 16);
243 return ((mmi.mm16_r5_format.opcode == mm_swsp16_op &&
244 mmi.mm16_r5_format.rt == 31) ||
245 (mmi.mm16_m_format.opcode == mm_pool16c_op &&
246 mmi.mm16_m_format.func == mm_swm16_op));
247 }
248 else {
249 mmi.halfword[0] = ip->halfword[1];
250 mmi.halfword[1] = ip->halfword[0];
251 return ((mmi.mm_m_format.opcode == mm_pool32b_op &&
252 mmi.mm_m_format.rd > 9 &&
253 mmi.mm_m_format.base == 29 &&
254 mmi.mm_m_format.func == mm_swm32_func) ||
255 (mmi.i_format.opcode == mm_sw32_op &&
256 mmi.i_format.rs == 29 &&
257 mmi.i_format.rt == 31));
258 }
259#else
c0efbb6d
FBH
260 /* sw / sd $ra, offset($sp) */
261 return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
262 ip->i_format.rs == 29 &&
263 ip->i_format.rt == 31;
34c2f668 264#endif
c0efbb6d
FBH
265}
266
267static inline int is_jal_jalr_jr_ins(union mips_instruction *ip)
268{
34c2f668
LY
269#ifdef CONFIG_CPU_MICROMIPS
270 /*
271 * jr16,jrc,jalr16,jalr16
272 * jal
273 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
274 * jraddiusp - NOT SUPPORTED
275 *
276 * microMIPS is kind of more fun...
277 */
278 union mips_instruction mmi;
279
280 mmi.word = (ip->halfword[0] << 16);
281
282 if ((mmi.mm16_r5_format.opcode == mm_pool16c_op &&
283 (mmi.mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) ||
284 ip->j_format.opcode == mm_jal32_op)
285 return 1;
286 if (ip->r_format.opcode != mm_pool32a_op ||
287 ip->r_format.func != mm_pool32axf_op)
288 return 0;
289 return (((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op);
290#else
c0efbb6d
FBH
291 if (ip->j_format.opcode == jal_op)
292 return 1;
293 if (ip->r_format.opcode != spec_op)
294 return 0;
295 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
34c2f668 296#endif
c0efbb6d
FBH
297}
298
299static inline int is_sp_move_ins(union mips_instruction *ip)
300{
34c2f668
LY
301#ifdef CONFIG_CPU_MICROMIPS
302 /*
303 * addiusp -imm
304 * addius5 sp,-imm
305 * addiu32 sp,sp,-imm
306 * jradiussp - NOT SUPPORTED
307 *
308 * microMIPS is not more fun...
309 */
310 if (mm_insn_16bit(ip->halfword[0])) {
311 union mips_instruction mmi;
312
313 mmi.word = (ip->halfword[0] << 16);
314 return ((mmi.mm16_r3_format.opcode == mm_pool16d_op &&
315 mmi.mm16_r3_format.simmediate && mm_addiusp_func) ||
316 (mmi.mm16_r5_format.opcode == mm_pool16d_op &&
317 mmi.mm16_r5_format.rt == 29));
318 }
319 return (ip->mm_i_format.opcode == mm_addiu32_op &&
320 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29);
321#else
c0efbb6d
FBH
322 /* addiu/daddiu sp,sp,-imm */
323 if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
324 return 0;
325 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
326 return 1;
34c2f668 327#endif
c0efbb6d
FBH
328 return 0;
329}
330
f66686f7 331static int get_frame_info(struct mips_frame_info *info)
1da177e4 332{
34c2f668
LY
333#ifdef CONFIG_CPU_MICROMIPS
334 union mips_instruction *ip = (void *) (((char *) info->func) - 1);
335#else
c0efbb6d 336 union mips_instruction *ip = info->func;
34c2f668 337#endif
29b376ff
FBH
338 unsigned max_insns = info->func_size / sizeof(union mips_instruction);
339 unsigned i;
c0efbb6d 340
1da177e4 341 info->pc_offset = -1;
63077519 342 info->frame_size = 0;
1da177e4 343
29b376ff
FBH
344 if (!ip)
345 goto err;
346
347 if (max_insns == 0)
348 max_insns = 128U; /* unknown function size */
349 max_insns = min(128U, max_insns);
350
c0efbb6d
FBH
351 for (i = 0; i < max_insns; i++, ip++) {
352
353 if (is_jal_jalr_jr_ins(ip))
63077519 354 break;
0cceb4aa
FBH
355 if (!info->frame_size) {
356 if (is_sp_move_ins(ip))
34c2f668
LY
357 {
358#ifdef CONFIG_CPU_MICROMIPS
359 if (mm_insn_16bit(ip->halfword[0]))
360 {
361 unsigned short tmp;
362
363 if (ip->halfword[0] & mm_addiusp_func)
364 {
365 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
366 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
367 } else {
368 tmp = (ip->halfword[0] >> 1);
369 info->frame_size = -(signed short)(tmp & 0xf);
370 }
371 ip = (void *) &ip->halfword[1];
372 ip--;
373 } else
374#endif
0cceb4aa 375 info->frame_size = - ip->i_format.simmediate;
34c2f668 376 }
0cceb4aa 377 continue;
63077519 378 }
0cceb4aa 379 if (info->pc_offset == -1 && is_ra_save_ins(ip)) {
63077519
AN
380 info->pc_offset =
381 ip->i_format.simmediate / sizeof(long);
0cceb4aa 382 break;
1da177e4
LT
383 }
384 }
f66686f7
AN
385 if (info->frame_size && info->pc_offset >= 0) /* nested */
386 return 0;
387 if (info->pc_offset < 0) /* leaf */
388 return 1;
389 /* prologue seems boggus... */
29b376ff 390err:
f66686f7 391 return -1;
1da177e4
LT
392}
393
b5943182
FBH
394static struct mips_frame_info schedule_mfi __read_mostly;
395
1da177e4
LT
396static int __init frame_info_init(void)
397{
b5943182 398 unsigned long size = 0;
63077519 399#ifdef CONFIG_KALLSYMS
b5943182 400 unsigned long ofs;
b5943182 401
55b74283 402 kallsyms_lookup_size_offset((unsigned long)schedule, &size, &ofs);
63077519 403#endif
b5943182
FBH
404 schedule_mfi.func = schedule;
405 schedule_mfi.func_size = size;
406
407 get_frame_info(&schedule_mfi);
6057a798
FBH
408
409 /*
410 * Without schedule() frame info, result given by
411 * thread_saved_pc() and get_wchan() are not reliable.
412 */
b5943182 413 if (schedule_mfi.pc_offset < 0)
6057a798 414 printk("Can't analyze schedule() prologue at %p\n", schedule);
63077519 415
1da177e4
LT
416 return 0;
417}
418
419arch_initcall(frame_info_init);
420
421/*
422 * Return saved PC of a blocked thread.
423 */
424unsigned long thread_saved_pc(struct task_struct *tsk)
425{
426 struct thread_struct *t = &tsk->thread;
427
428 /* New born processes are a special case */
429 if (t->reg31 == (unsigned long) ret_from_fork)
430 return t->reg31;
b5943182 431 if (schedule_mfi.pc_offset < 0)
1da177e4 432 return 0;
b5943182 433 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
1da177e4
LT
434}
435
1da177e4 436
f66686f7 437#ifdef CONFIG_KALLSYMS
94ea09c6
DK
438/* generic stack unwinding function */
439unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
440 unsigned long *sp,
441 unsigned long pc,
442 unsigned long *ra)
f66686f7 443{
f66686f7 444 struct mips_frame_info info;
f66686f7 445 unsigned long size, ofs;
4d157d5e 446 int leaf;
1924600c
AN
447 extern void ret_from_irq(void);
448 extern void ret_from_exception(void);
f66686f7 449
f66686f7
AN
450 if (!stack_page)
451 return 0;
452
1924600c
AN
453 /*
454 * If we reached the bottom of interrupt context,
455 * return saved pc in pt_regs.
456 */
457 if (pc == (unsigned long)ret_from_irq ||
458 pc == (unsigned long)ret_from_exception) {
459 struct pt_regs *regs;
460 if (*sp >= stack_page &&
461 *sp + sizeof(*regs) <= stack_page + THREAD_SIZE - 32) {
462 regs = (struct pt_regs *)*sp;
463 pc = regs->cp0_epc;
464 if (__kernel_text_address(pc)) {
465 *sp = regs->regs[29];
466 *ra = regs->regs[31];
467 return pc;
468 }
469 }
470 return 0;
471 }
55b74283 472 if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
f66686f7 473 return 0;
1fd69098 474 /*
25985edc 475 * Return ra if an exception occurred at the first instruction
1fd69098 476 */
1924600c
AN
477 if (unlikely(ofs == 0)) {
478 pc = *ra;
479 *ra = 0;
480 return pc;
481 }
f66686f7
AN
482
483 info.func = (void *)(pc - ofs);
484 info.func_size = ofs; /* analyze from start to ofs */
4d157d5e
FBH
485 leaf = get_frame_info(&info);
486 if (leaf < 0)
f66686f7 487 return 0;
4d157d5e
FBH
488
489 if (*sp < stack_page ||
490 *sp + info.frame_size > stack_page + THREAD_SIZE - 32)
f66686f7
AN
491 return 0;
492
4d157d5e
FBH
493 if (leaf)
494 /*
495 * For some extreme cases, get_frame_info() can
496 * consider wrongly a nested function as a leaf
497 * one. In that cases avoid to return always the
498 * same value.
499 */
1924600c 500 pc = pc != *ra ? *ra : 0;
4d157d5e
FBH
501 else
502 pc = ((unsigned long *)(*sp))[info.pc_offset];
503
504 *sp += info.frame_size;
1924600c 505 *ra = 0;
4d157d5e 506 return __kernel_text_address(pc) ? pc : 0;
f66686f7 507}
94ea09c6
DK
508EXPORT_SYMBOL(unwind_stack_by_address);
509
510/* used by show_backtrace() */
511unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
512 unsigned long pc, unsigned long *ra)
513{
514 unsigned long stack_page = (unsigned long)task_stack_page(task);
515 return unwind_stack_by_address(stack_page, sp, pc, ra);
516}
f66686f7 517#endif
b5943182
FBH
518
519/*
520 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
521 */
522unsigned long get_wchan(struct task_struct *task)
523{
524 unsigned long pc = 0;
525#ifdef CONFIG_KALLSYMS
526 unsigned long sp;
1924600c 527 unsigned long ra = 0;
b5943182
FBH
528#endif
529
530 if (!task || task == current || task->state == TASK_RUNNING)
531 goto out;
532 if (!task_stack_page(task))
533 goto out;
534
535 pc = thread_saved_pc(task);
536
537#ifdef CONFIG_KALLSYMS
538 sp = task->thread.reg29 + schedule_mfi.frame_size;
539
540 while (in_sched_functions(pc))
1924600c 541 pc = unwind_stack(task, &sp, pc, &ra);
b5943182
FBH
542#endif
543
544out:
545 return pc;
546}
94109102
FBH
547
548/*
549 * Don't forget that the stack pointer must be aligned on a 8 bytes
550 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
551 */
552unsigned long arch_align_stack(unsigned long sp)
553{
554 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
555 sp -= get_random_int() & ~PAGE_MASK;
556
557 return sp & ALMASK;
558}