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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1992 Ross Biro | |
7 | * Copyright (C) Linus Torvalds | |
8 | * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle | |
9 | * Copyright (C) 1996 David S. Miller | |
10 | * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com | |
11 | * Copyright (C) 1999 MIPS Technologies, Inc. | |
12 | * Copyright (C) 2000 Ulf Carlsson | |
13 | * | |
14 | * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit | |
15 | * binaries. | |
16 | */ | |
17 | #include <linux/compiler.h> | |
5d9a76cd | 18 | #include <linux/compat.h> |
1da177e4 LT |
19 | #include <linux/kernel.h> |
20 | #include <linux/sched.h> | |
21 | #include <linux/mm.h> | |
22 | #include <linux/errno.h> | |
23 | #include <linux/ptrace.h> | |
24 | #include <linux/smp.h> | |
25 | #include <linux/smp_lock.h> | |
26 | #include <linux/user.h> | |
27 | #include <linux/security.h> | |
28 | ||
29 | #include <asm/cpu.h> | |
e50c0a8f | 30 | #include <asm/dsp.h> |
1da177e4 LT |
31 | #include <asm/fpu.h> |
32 | #include <asm/mipsregs.h> | |
101b3531 | 33 | #include <asm/mipsmtregs.h> |
1da177e4 LT |
34 | #include <asm/pgtable.h> |
35 | #include <asm/page.h> | |
36 | #include <asm/system.h> | |
37 | #include <asm/uaccess.h> | |
38 | #include <asm/bootinfo.h> | |
39 | ||
49a89efb RB |
40 | int ptrace_getregs(struct task_struct *child, __s64 __user *data); |
41 | int ptrace_setregs(struct task_struct *child, __s64 __user *data); | |
ea3d710f | 42 | |
49a89efb RB |
43 | int ptrace_getfpregs(struct task_struct *child, __u32 __user *data); |
44 | int ptrace_setfpregs(struct task_struct *child, __u32 __user *data); | |
ea3d710f | 45 | |
1da177e4 LT |
46 | /* |
47 | * Tracing a 32-bit process with a 64-bit strace and vice versa will not | |
48 | * work. I don't know how to fix this. | |
49 | */ | |
5d9a76cd TB |
50 | long compat_arch_ptrace(struct task_struct *child, compat_long_t request, |
51 | compat_ulong_t caddr, compat_ulong_t cdata) | |
1da177e4 | 52 | { |
5d9a76cd TB |
53 | int addr = caddr; |
54 | int data = cdata; | |
1da177e4 LT |
55 | int ret; |
56 | ||
1da177e4 LT |
57 | switch (request) { |
58 | /* when I and D space are separate, these will need to be fixed. */ | |
59 | case PTRACE_PEEKTEXT: /* read word at location addr. */ | |
60 | case PTRACE_PEEKDATA: { | |
61 | unsigned int tmp; | |
62 | int copied; | |
63 | ||
64 | copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0); | |
65 | ret = -EIO; | |
66 | if (copied != sizeof(tmp)) | |
67 | break; | |
3055acb0 | 68 | ret = put_user(tmp, (unsigned int __user *) (unsigned long) data); |
1da177e4 LT |
69 | break; |
70 | } | |
71 | ||
ea3d710f DJ |
72 | /* |
73 | * Read 4 bytes of the other process' storage | |
74 | * data is a pointer specifying where the user wants the | |
75 | * 4 bytes copied into | |
76 | * addr is a pointer in the user's storage that contains an 8 byte | |
77 | * address in the other process of the 4 bytes that is to be read | |
78 | * (this is run in a 32-bit process looking at a 64-bit process) | |
79 | * when I and D space are separate, these will need to be fixed. | |
80 | */ | |
81 | case PTRACE_PEEKTEXT_3264: | |
82 | case PTRACE_PEEKDATA_3264: { | |
83 | u32 tmp; | |
84 | int copied; | |
85 | u32 __user * addrOthers; | |
86 | ||
87 | ret = -EIO; | |
88 | ||
89 | /* Get the addr in the other process that we want to read */ | |
90 | if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0) | |
91 | break; | |
92 | ||
93 | copied = access_process_vm(child, (u64)addrOthers, &tmp, | |
94 | sizeof(tmp), 0); | |
95 | if (copied != sizeof(tmp)) | |
96 | break; | |
97 | ret = put_user(tmp, (u32 __user *) (unsigned long) data); | |
98 | break; | |
99 | } | |
100 | ||
1da177e4 LT |
101 | /* Read the word at location addr in the USER area. */ |
102 | case PTRACE_PEEKUSR: { | |
103 | struct pt_regs *regs; | |
104 | unsigned int tmp; | |
105 | ||
40bc9c67 | 106 | regs = task_pt_regs(child); |
1da177e4 LT |
107 | ret = 0; /* Default return value. */ |
108 | ||
109 | switch (addr) { | |
110 | case 0 ... 31: | |
111 | tmp = regs->regs[addr]; | |
112 | break; | |
113 | case FPR_BASE ... FPR_BASE + 31: | |
114 | if (tsk_used_math(child)) { | |
115 | fpureg_t *fregs = get_fpu_regs(child); | |
116 | ||
117 | /* | |
118 | * The odd registers are actually the high | |
119 | * order bits of the values stored in the even | |
120 | * registers - unless we're using r2k_switch.S. | |
121 | */ | |
122 | if (addr & 1) | |
123 | tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32); | |
124 | else | |
125 | tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff); | |
126 | } else { | |
127 | tmp = -1; /* FP not yet used */ | |
128 | } | |
129 | break; | |
130 | case PC: | |
131 | tmp = regs->cp0_epc; | |
132 | break; | |
133 | case CAUSE: | |
134 | tmp = regs->cp0_cause; | |
135 | break; | |
136 | case BADVADDR: | |
137 | tmp = regs->cp0_badvaddr; | |
138 | break; | |
139 | case MMHI: | |
140 | tmp = regs->hi; | |
141 | break; | |
142 | case MMLO: | |
143 | tmp = regs->lo; | |
144 | break; | |
145 | case FPC_CSR: | |
eae89076 | 146 | tmp = child->thread.fpu.fcr31; |
1da177e4 LT |
147 | break; |
148 | case FPC_EIR: { /* implementation / version register */ | |
149 | unsigned int flags; | |
41c594ab RB |
150 | #ifdef CONFIG_MIPS_MT_SMTC |
151 | unsigned int irqflags; | |
152 | unsigned int mtflags; | |
153 | #endif /* CONFIG_MIPS_MT_SMTC */ | |
1da177e4 | 154 | |
e04582b7 | 155 | preempt_disable(); |
3055acb0 | 156 | if (!cpu_has_fpu) { |
e04582b7 | 157 | preempt_enable(); |
3055acb0 | 158 | tmp = 0; |
1da177e4 | 159 | break; |
3055acb0 | 160 | } |
1da177e4 | 161 | |
41c594ab RB |
162 | #ifdef CONFIG_MIPS_MT_SMTC |
163 | /* Read-modify-write of Status must be atomic */ | |
164 | local_irq_save(irqflags); | |
165 | mtflags = dmt(); | |
166 | #endif /* CONFIG_MIPS_MT_SMTC */ | |
167 | ||
101b3531 RB |
168 | if (cpu_has_mipsmt) { |
169 | unsigned int vpflags = dvpe(); | |
170 | flags = read_c0_status(); | |
171 | __enable_fpu(); | |
172 | __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp)); | |
173 | write_c0_status(flags); | |
174 | evpe(vpflags); | |
175 | } else { | |
176 | flags = read_c0_status(); | |
177 | __enable_fpu(); | |
178 | __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp)); | |
179 | write_c0_status(flags); | |
180 | } | |
41c594ab RB |
181 | #ifdef CONFIG_MIPS_MT_SMTC |
182 | emt(mtflags); | |
183 | local_irq_restore(irqflags); | |
184 | #endif /* CONFIG_MIPS_MT_SMTC */ | |
101b3531 | 185 | preempt_enable(); |
1da177e4 LT |
186 | break; |
187 | } | |
3055acb0 AN |
188 | case DSP_BASE ... DSP_BASE + 5: { |
189 | dspreg_t *dregs; | |
190 | ||
e50c0a8f RB |
191 | if (!cpu_has_dsp) { |
192 | tmp = 0; | |
193 | ret = -EIO; | |
5d9a76cd | 194 | goto out; |
e50c0a8f | 195 | } |
3055acb0 | 196 | dregs = __get_dsp_regs(child); |
6c355852 | 197 | tmp = (unsigned long) (dregs[addr - DSP_BASE]); |
e50c0a8f | 198 | break; |
3055acb0 | 199 | } |
e50c0a8f RB |
200 | case DSP_CONTROL: |
201 | if (!cpu_has_dsp) { | |
202 | tmp = 0; | |
203 | ret = -EIO; | |
5d9a76cd | 204 | goto out; |
e50c0a8f RB |
205 | } |
206 | tmp = child->thread.dsp.dspcontrol; | |
207 | break; | |
1da177e4 LT |
208 | default: |
209 | tmp = 0; | |
210 | ret = -EIO; | |
5d9a76cd | 211 | goto out; |
1da177e4 | 212 | } |
3055acb0 | 213 | ret = put_user(tmp, (unsigned __user *) (unsigned long) data); |
1da177e4 LT |
214 | break; |
215 | } | |
216 | ||
217 | /* when I and D space are separate, this will have to be fixed. */ | |
218 | case PTRACE_POKETEXT: /* write the word at location addr. */ | |
219 | case PTRACE_POKEDATA: | |
220 | ret = 0; | |
221 | if (access_process_vm(child, addr, &data, sizeof(data), 1) | |
222 | == sizeof(data)) | |
223 | break; | |
224 | ret = -EIO; | |
225 | break; | |
226 | ||
ea3d710f DJ |
227 | /* |
228 | * Write 4 bytes into the other process' storage | |
229 | * data is the 4 bytes that the user wants written | |
230 | * addr is a pointer in the user's storage that contains an | |
231 | * 8 byte address in the other process where the 4 bytes | |
232 | * that is to be written | |
233 | * (this is run in a 32-bit process looking at a 64-bit process) | |
234 | * when I and D space are separate, these will need to be fixed. | |
235 | */ | |
236 | case PTRACE_POKETEXT_3264: | |
237 | case PTRACE_POKEDATA_3264: { | |
238 | u32 __user * addrOthers; | |
239 | ||
240 | /* Get the addr in the other process that we want to write into */ | |
241 | ret = -EIO; | |
242 | if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0) | |
243 | break; | |
244 | ret = 0; | |
245 | if (access_process_vm(child, (u64)addrOthers, &data, | |
246 | sizeof(data), 1) == sizeof(data)) | |
247 | break; | |
248 | ret = -EIO; | |
249 | break; | |
250 | } | |
251 | ||
1da177e4 LT |
252 | case PTRACE_POKEUSR: { |
253 | struct pt_regs *regs; | |
254 | ret = 0; | |
40bc9c67 | 255 | regs = task_pt_regs(child); |
1da177e4 LT |
256 | |
257 | switch (addr) { | |
258 | case 0 ... 31: | |
259 | regs->regs[addr] = data; | |
260 | break; | |
261 | case FPR_BASE ... FPR_BASE + 31: { | |
262 | fpureg_t *fregs = get_fpu_regs(child); | |
263 | ||
264 | if (!tsk_used_math(child)) { | |
265 | /* FP not yet used */ | |
eae89076 AN |
266 | memset(&child->thread.fpu, ~0, |
267 | sizeof(child->thread.fpu)); | |
268 | child->thread.fpu.fcr31 = 0; | |
1da177e4 LT |
269 | } |
270 | /* | |
271 | * The odd registers are actually the high order bits | |
272 | * of the values stored in the even registers - unless | |
273 | * we're using r2k_switch.S. | |
274 | */ | |
275 | if (addr & 1) { | |
276 | fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff; | |
277 | fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32; | |
278 | } else { | |
279 | fregs[addr - FPR_BASE] &= ~0xffffffffLL; | |
280 | /* Must cast, lest sign extension fill upper | |
281 | bits! */ | |
282 | fregs[addr - FPR_BASE] |= (unsigned int)data; | |
283 | } | |
284 | break; | |
285 | } | |
286 | case PC: | |
287 | regs->cp0_epc = data; | |
288 | break; | |
289 | case MMHI: | |
290 | regs->hi = data; | |
291 | break; | |
292 | case MMLO: | |
293 | regs->lo = data; | |
294 | break; | |
295 | case FPC_CSR: | |
eae89076 | 296 | child->thread.fpu.fcr31 = data; |
1da177e4 | 297 | break; |
3055acb0 AN |
298 | case DSP_BASE ... DSP_BASE + 5: { |
299 | dspreg_t *dregs; | |
300 | ||
e50c0a8f RB |
301 | if (!cpu_has_dsp) { |
302 | ret = -EIO; | |
303 | break; | |
304 | } | |
305 | ||
3055acb0 | 306 | dregs = __get_dsp_regs(child); |
e50c0a8f RB |
307 | dregs[addr - DSP_BASE] = data; |
308 | break; | |
3055acb0 | 309 | } |
e50c0a8f RB |
310 | case DSP_CONTROL: |
311 | if (!cpu_has_dsp) { | |
312 | ret = -EIO; | |
313 | break; | |
314 | } | |
315 | child->thread.dsp.dspcontrol = data; | |
316 | break; | |
1da177e4 LT |
317 | default: |
318 | /* The rest are not allowed. */ | |
319 | ret = -EIO; | |
320 | break; | |
321 | } | |
322 | break; | |
323 | } | |
324 | ||
ea3d710f | 325 | case PTRACE_GETREGS: |
62b14c24 | 326 | ret = ptrace_getregs(child, (__s64 __user *) (__u64) data); |
ea3d710f DJ |
327 | break; |
328 | ||
329 | case PTRACE_SETREGS: | |
62b14c24 | 330 | ret = ptrace_setregs(child, (__s64 __user *) (__u64) data); |
ea3d710f DJ |
331 | break; |
332 | ||
333 | case PTRACE_GETFPREGS: | |
49a89efb | 334 | ret = ptrace_getfpregs(child, (__u32 __user *) (__u64) data); |
ea3d710f DJ |
335 | break; |
336 | ||
337 | case PTRACE_SETFPREGS: | |
49a89efb | 338 | ret = ptrace_setfpregs(child, (__u32 __user *) (__u64) data); |
ea3d710f DJ |
339 | break; |
340 | ||
1da177e4 LT |
341 | case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ |
342 | case PTRACE_CONT: { /* restart after signal. */ | |
343 | ret = -EIO; | |
7ed20e1a | 344 | if (!valid_signal(data)) |
1da177e4 LT |
345 | break; |
346 | if (request == PTRACE_SYSCALL) { | |
347 | set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
348 | } | |
349 | else { | |
350 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
351 | } | |
352 | child->exit_code = data; | |
353 | wake_up_process(child); | |
354 | ret = 0; | |
355 | break; | |
356 | } | |
357 | ||
358 | /* | |
359 | * make the child exit. Best I can do is send it a sigkill. | |
360 | * perhaps it should be put in the status that it wants to | |
361 | * exit. | |
362 | */ | |
363 | case PTRACE_KILL: | |
364 | ret = 0; | |
365 | if (child->exit_state == EXIT_ZOMBIE) /* already dead */ | |
366 | break; | |
367 | child->exit_code = SIGKILL; | |
368 | wake_up_process(child); | |
369 | break; | |
370 | ||
3c37026d | 371 | case PTRACE_GET_THREAD_AREA: |
dc8f6029 | 372 | ret = put_user(task_thread_info(child)->tp_value, |
3c37026d RB |
373 | (unsigned int __user *) (unsigned long) data); |
374 | break; | |
375 | ||
1da177e4 LT |
376 | case PTRACE_DETACH: /* detach a process that was attached. */ |
377 | ret = ptrace_detach(child, data); | |
378 | break; | |
379 | ||
09276d90 RB |
380 | case PTRACE_GETEVENTMSG: |
381 | ret = put_user(child->ptrace_message, | |
382 | (unsigned int __user *) (unsigned long) data); | |
383 | break; | |
384 | ||
ea3d710f | 385 | case PTRACE_GET_THREAD_AREA_3264: |
dc8f6029 | 386 | ret = put_user(task_thread_info(child)->tp_value, |
ea3d710f DJ |
387 | (unsigned long __user *) (unsigned long) data); |
388 | break; | |
389 | ||
1da177e4 LT |
390 | default: |
391 | ret = ptrace_request(child, request, addr, data); | |
392 | break; | |
393 | } | |
1da177e4 | 394 | out: |
1da177e4 LT |
395 | return ret; |
396 | } |